Solar cell
By setting up different types of semiconductor layers on the front and back of the solar cell and connecting metal gate lines in series with side connection lines, the problems of low efficiency and poor stability of existing solar cells are solved, and efficient carrier collection and conversion efficiency are improved.
Patent Information
- Application Number
- CN202422229458.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-11
- Publication Date
- 2025-06-27
- Estimated Expiration
- 2034-09-11
AI Technical Summary
Existing solar cells have problems such as low efficiency, poor stability and complex component production, especially the dual-electrode structure has a long carrier transmission distance and few paths, resulting in high series resistance and low conversion efficiency.
By setting up different types of semiconductor layers on the front and back of the battery, and connecting metal gate lines corresponding to semiconductor layers of the same type on the front and back sides using side connection lines to form an efficient carrier collection structure.
It realizes efficient collection of carriers, improves the filling factor and conversion efficiency of the battery, simplifies the series connection process of components, and improves production efficiency and component performance.
Smart Images
Figure CN223040507U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of solar cell preparation, and particularly relates to a solar cell. Background Art
[0002] Photovoltaic power generation technology has developed rapidly and has great market potential. However, existing batteries have problems such as low efficiency, poor stability, and complex component manufacturing. Most existing photovoltaic cells have a double-electrode structure, with a long carrier transport distance and few paths, resulting in a high series resistance and a low conversion efficiency. In addition, the battery performance is greatly affected by the grid lines, and the stability is poor. Moreover, in the production process of solar cells, the solder tapes need to be connected in series on the front and back sides, resulting in a large distance between the battery chips and being prone to damage, affecting the component power. And nowadays, the newly developed battery structures are complex, and the testing and component welding and series connection processes are also very complex. Summary of the Utility Model
[0003] The utility model provides a solar cell, which improves the fill factor and conversion efficiency of the battery and makes the battery structure more conducive to testing and assembly.
[0004] The utility model discloses a solar cell, comprising: a semi-finished solar cell, which has opposite first and second surfaces;
[0005] A first semiconductor layer or a second semiconductor layer is provided on the first surface; the first semiconductor layer and the second semiconductor layer are semiconductor layers of different types;
[0006] A third semiconductor layer and a fourth semiconductor layer are provided on the second surface in a spaced-apart arrangement; the third semiconductor and the fourth semiconductor are semiconductor layers of different types;
[0007] Any semiconductor layer is in direct or indirect contact with a metal grid line;
[0008] The metal grid lines corresponding to the same type of semiconductor layers on different surfaces are connected by side connection lines.
[0009] Further, it includes two of the third semiconductor layers and two of the fourth semiconductor layers.
[0010] Further, the first semiconductor layer and the second semiconductor layer are arranged on the first surface of the semi-finished solar cell in a spaced-apart arrangement.
[0011] Further, it includes two of the first semiconductor layers and two of the second semiconductor layers.
[0012] Further, the semi-finished solar cell has opposite first and second side surfaces;
[0013] Metal gate lines corresponding to the same type of semiconductor layers on different surfaces are connected by side connection lines laid on the first side;
[0014] Metal gate lines corresponding to the same type of semiconductor layers on different surfaces are connected by side connection lines laid on the second side.
[0015] Furthermore, the semiconductor layer includes a doped layer and a compound semiconductor layer.
[0016] Furthermore, the material of the side connection line is any one of paste, solder paste, and conductive adhesive.
[0017] Furthermore, the material of the metal gate line is any one of paste, solder paste, and conductive adhesive.
[0018] Furthermore, the area of any one of the semiconductor layers is greater than or equal to the area of the metal gate line.
[0019] Furthermore, the metal gate line is disposed on the surface of the semiconductor layer.
[0020] Furthermore, it further includes a transparent conductive layer, and the transparent conductive layer is disposed between any semiconductor layer and the metal gate line corresponding to the semiconductor layer.
[0021] Compared with the prior art, the present utility model has at least the following technical effects:
[0022] By respectively providing different types of semiconductor layers on the front and back of the battery, and using side connection lines to connect in series the metal gate lines corresponding to the same type of semiconductor layers on the front and back of the battery, this battery structure can achieve efficient collection of carriers, improve the fill factor and conversion efficiency of the battery, and is conducive to the testing of solar cells and the production of components, realizing direct seamless splicing of silicon wafers without additional solder ribbon connection, simplifying the series connection process of components, and improving production efficiency and component performance. Description of the Drawings
[0023] Figure 1 It is a schematic structural diagram of a solar cell in an embodiment of the present utility model;
[0024] Figure 2 It is a schematic structural diagram of the combination of a single semiconductor layer and a metal gate line provided on the first surface of a solar cell in an embodiment of the present utility model;
[0025] Figure 3 It is a schematic structural diagram of the combination of two different semiconductor layers and a metal gate line when two different semiconductor layers are provided on the surface of a solar cell in an embodiment of the present utility model;
[0026] Figure 4Another structural schematic diagram of a solar cell in an embodiment of the present utility model;
[0027] Figure 5 Another structural schematic diagram of a solar cell in an embodiment of the present utility model;
[0028] Figure 6 Another structural schematic diagram of a solar cell in an embodiment of the present utility model. Detailed implementation manners
[0029] The following will describe a solar cell of the present utility model in conjunction with the schematic diagrams, in which the preferred embodiments of the present utility model are shown. It should be understood that those skilled in the art can modify the present utility model described herein while still achieving the advantageous effects of the present utility model. Therefore, the following description should be understood as a broad guidance for those skilled in the art and not as a limitation to the present utility model.
[0030] In the following paragraphs, the present utility model will be described more specifically by way of example with reference to the accompanying drawings. The advantages and features of the present utility model will be clearer according to the following description. It should be noted that the drawings are all in very simplified forms and use non-precise scales, only for the purpose of conveniently and clearly assisting in explaining the purpose of the embodiments of the present utility model.
[0031] In the description of the present utility model, it should be understood that the orientation or positional relationships indicated by the terms "center", "longitudinal", "transverse", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the protection scope of the present utility model. The embodiments of the present utility model will be described in detail below with reference to the drawings.
[0032] Please refer to Figure 1 , this embodiment discloses a solar cell, specifically including:
[0033] A semi-finished solar cell 1, the semi-finished solar cell 1 having opposite first and second surfaces; a first semiconductor layer 2 or a second semiconductor layer 7 is provided on the first surface; the first semiconductor layer 2 and the second semiconductor layer 7 are semiconductor layers of different types; a third semiconductor layer 3 and a fourth semiconductor layer 4 are arranged in sequence and at intervals on the second surface; the third semiconductor and the fourth semiconductor are semiconductor layers of different types; any semiconductor layer is in direct or indirect contact with a metal grid line 5; the metal grid lines 5 corresponding to the same type of semiconductor layers on different surfaces are connected by side connection lines 6.
[0034] In this embodiment, by respectively establishing different types of semiconductor layers on the front and back of the battery, and using the side connection line 6 to connect in series the metal grid lines 5 corresponding to the same type of semiconductor layers on the front and back, this battery structure can achieve efficient carrier collection, improve the fill factor and conversion efficiency of the battery, and is conducive to the testing of solar cells and the production of components. It realizes direct seamless splicing of silicon wafers without additional solder ribbon connection, simplifies the series connection process of components, and improves production efficiency and component performance.
[0035] It can be understood that the purpose of setting the side connection line 6 on a side surface of the solar cell is that when the metal grid lines 5 corresponding to the same type of semiconductor layers on the back and front of the semi-finished solar cell 1 are connected through the side connection line 6, a low-resistance electrical connection can be provided between the front and back of the solar cell, enabling electrons to be more smoothly transmitted between the front and back, or holes to be more smoothly transmitted between the front and back, realizing efficient carrier collection.
[0036] In this embodiment, the semi-finished solar cell 1 refers to a solar cell that has not been deposited with a doping layer and has not been welded with metal grid lines. The type of the solar cell is not limited here. For example, it can be: HJT (heterojunction solar cell), HBC (heterojunction back contact cell), TOPCon (tunnel oxide passivated contact solar cell), and PERC (passivated emitter and rear cell). The final finished solar cell may include other film layers such as a passivation layer, a transparent conductive layer, and an antireflection layer.
[0037] In this embodiment, direct contact means directly laying the metal grid line 5 on the surface of the semiconductor layer, and indirect contact means that the semiconductor layer contacts the metal grid line 5 through other thin film layers. For example, contacting the metal grid line 5 through a TCO (transparent conductive film layer). In addition, different types refer to semiconductor layers of different doping types and semiconductor layers composed of different compound materials.
[0038] In this embodiment, the first surface is the light-facing surface of the solar cell, and the second surface is the backlight-facing surface of the solar cell.
[0039] In this embodiment, please refer to Figures 1-3, the first semiconductor layer 2 and the second semiconductor layer 7 are an n-type semiconductor layer and a p-type semiconductor layer respectively, or the first semiconductor layer 2 and the second semiconductor layer 7 are a p-type semiconductor layer and an n-type semiconductor layer respectively. Similarly, the third semiconductor layer 3 and the fourth semiconductor layer 4 are an n-type semiconductor layer and a p-type semiconductor layer respectively, or the third semiconductor layer 3 and the fourth semiconductor layer 4 are an n-type semiconductor layer and a p-type semiconductor layer respectively. By disposing the first semiconductor layer 2 or the second semiconductor layer 7 on the light-facing surface of the solar cell, and arranging the third semiconductor layer 3 and the fourth semiconductor layer 4 at intervals in sequence on the backlight surface, metal grid lines 5 are deposited on the surfaces of the first semiconductor layer 2 and / or the second semiconductor layer 7, the third semiconductor layer 3 and the fourth semiconductor layer 4, thereby realizing a three-electrode structure, reducing the carrier collection path and increasing the carrier transmission path, and improving the photoelectric conversion efficiency of the solar cell.
[0040] In this embodiment, the semiconductor layer includes a doped layer, and the material of the doped layer can be selected from any one of amorphous silicon, microcrystalline silicon, polycrystalline silicon, single crystal silicon or compound semiconductor. The above p-type doped layer can be doped with elements such as boron (B), aluminum (Al) or gallium (Ga), and the n-type doped layer can be doped with elements such as phosphorus (P), arsenic (As) or antimony (Sb). For example: the first semiconductor layer 2 and the third semiconductor layer 3 are p-type doped layers, and the doping element is aluminum, and the second semiconductor layer 7 and the fourth semiconductor layer 4 are n-type doped layers, and the doping element is phosphorus. Each doped layer (whether it is the first, second, third or fourth doped layer) can select one of the above materials according to specific design and performance requirements, or select a doped layer with other doping elements.
[0041] Furthermore, in this embodiment, the semiconductor layer further includes a compound semiconductor layer, and the compound semiconductor layer can be selected from materials such as gallium arsenide (GaAs), indium phosphide (InP) and gallium nitride (GaN). For example: the first semiconductor layer 2 and the third semiconductor layer 3 are gallium arsenide layers, and the second semiconductor layer 7 and the fourth semiconductor layer 4 are gallium nitride layers. Each compound semiconductor layer (whether it is the first, second, third or fourth doped layer) can select one of the above materials according to specific design and performance requirements, or select a semiconductor layer composed of other compound materials.
[0042] Furthermore, please refer to Figure 4, in this embodiment, the first semiconductor layer 2 and the second semiconductor layer 7 may also be arranged at intervals in sequence on the first surface of the semi-finished solar cell 1, the third semiconductor layer 3 and the fourth semiconductor layer 4 may be arranged at intervals in sequence on the second surface, and metal grid lines 5 may be deposited on the surfaces of the first semiconductor layer 2, the second semiconductor layer 7, the third semiconductor layer 3 and the fourth semiconductor layer 4 to implement a four-electrode structure, further reducing the carrier collection path and increasing the carrier transmission path, thereby improving the photoelectric conversion efficiency of the solar cell.
[0043] In this embodiment, the number of semiconductor layers provided in the solar cell is not specifically limited herein and can be selected according to actual situations. Generally speaking, 30-120 semiconductor layers can be provided on the front and back sides of a 210mm * 105mm solar cell respectively. For example, 40 semiconductor layers are provided on the front side and 50 semiconductor layers are provided on the back side.
[0044] In this embodiment, the types of semiconductor layers on the front and back sides can correspond one by one. For example: an n-type amorphous silicon doped layer and a p-type amorphous silicon doped layer are arranged at intervals in sequence on the first surface; an n-type amorphous silicon doped layer and a p-type amorphous silicon doped layer are also arranged at intervals in sequence on the second surface. The types of semiconductor layers on the front and back sides can also not correspond one by one. For example: an n-type microcrystalline silicon doped layer and a p-type amorphous silicon doped layer are arranged at intervals in sequence on the first surface; a p-type amorphous silicon doped layer and an n-type amorphous silicon doped layer are arranged at intervals in sequence on the second surface. In addition, the widths of the semiconductor layers on the front and back sides can be the same or different.
[0045] In this embodiment, the side connection line 6 is laid on two opposite sides of the semi-finished solar cell 1. The side connection line 6 can be laid comprehensively on any side. Comprehensive laying means that the laying area of the side connection line 6 is the same as the side area or slightly smaller than the side area; it can also be laid according to the area size of the semiconductor layer. For example: the laying area of the side connection line 6 is the same as the area size of any semiconductor layer or slightly smaller than the area of the semiconductor layer.
[0046] Further, in this embodiment, the metal grid lines 5 corresponding to one type of the same type of semiconductor layers on different surfaces of the solar cell 1 are connected by the side connection line 6 provided on one side of the solar cell. The metal grid lines 5 corresponding to the other type of the same type of semiconductor layers are connected by the side connection line 6 provided on the other side of the solar cell.
[0047] Preferably, if only one layer of semiconductor layer is provided on the first surface, the metal grid lines 5 corresponding to one type of the same type of semiconductor layers on the two surfaces can also be connected simultaneously by the side connection lines 6 on the two sides.
[0048] In a specific embodiment, please refer to Figure 1 , the solar cell has a three - electrode structure, and the side connection lines 6 are fully laid on two sides, connecting the metal grid lines 5 corresponding to the same - type semiconductor layers on the back and front of the semi - finished solar cell 1 through the two side connection lines 6.
[0049] In another specific embodiment, please refer to Figure 2 and Figure 3 , the solar cell has a four - electrode structure, and the types of the semiconductor layers on the front and back sides can correspond one by one. On one side of the solar cell, the area of the side connection line 6 is less than or equal to the area of the semiconductor layer. On one side, the side connection line 6 is used to connect the metal grid lines 5 corresponding to the same - type semiconductor layers on the back and front of the semi - finished solar cell 1, and on the other side, the side connection line 6 is used to connect the metal grid lines 5 corresponding to another type of the same - type semiconductor layers on the back and front of the semi - finished solar cell 1.
[0050] In another specific embodiment, please refer to Figure 4 , the solar cell has a four - electrode structure, and the types of the semiconductor layers on the front and back sides do not correspond one by one. The side connection lines 6 are fully laid on two sides. On one side, the side connection line 6 is used to connect the metal grid lines 5 corresponding to the same - type semiconductor layers on the back and front of the semi - finished solar cell 1, and on the other side, the side connection line 6 is used to connect the metal grid lines 5 corresponding to another type of the same - type semiconductor layers on the back and front of the semi - finished solar cell 1.
[0051] Furthermore, in this embodiment, the material of the side connection line 6 can be any one of paste, solder paste, and conductive adhesive.
[0052] Furthermore, in this embodiment, the width of the side connection line 6 is not specifically limited here and can be wider or narrower than the grid line.
[0053] Furthermore, in this embodiment, the spacing between the first semiconductor layer 2 and the second semiconductor layer 7 and between the third semiconductor layer 3 and the fourth semiconductor layer 4 provided on the first surface and the second surface is generally 0, that is, different types of semiconductors are closely arranged to reduce the parasitic resistance between the semiconductor layers. A certain spacing can also be set between the first semiconductor layer 2 and the second semiconductor layer 7 and between the third semiconductor layer 3 and the fourth semiconductor layer 4 to reduce the loss of the semiconductor material layer.
[0054] Furthermore, in this embodiment, the area of any of the semiconductor layers is larger than the area of the metal grid line 5.
[0055] In this embodiment, the material of the metal grid line 5 can be any one of paste, solder paste, and conductive adhesive.
[0056] Further, in this embodiment, the side connection line 6 and the grid line can be fabricated by means such as screen printing, laser transfer printing, electroplating copper, and stacked grid. In addition, during the manufacturing process, the side connection line 6 and the grid line can be fabricated simultaneously. For example, during screen printing, the grid line and the side connection line 6 can be printed at one time.
[0057] Preferably, the preferred preparation method of the grid line is the stacked soldering process. The grid line prepared by the stacked soldering process, due to its high precision, low thickness, high conductivity, and compatibility with the double-sided structure, can make the prepared grid line more suitable for the double-sided BC cell structure.
[0058] In this embodiment, the cells suitable for the above grid line structure include but are not limited to: HJT, HBC, TOPCon, and PERC.
[0059] In a specific embodiment, a tunneling oxide layer, an n-doped polysilicon layer and a p-doped polysilicon layer arranged at intervals, a passivation layer, and a transparent conductive layer are sequentially stacked on the front surface of the semi-finished solar cell 1; a tunneling oxide layer, an n-doped polysilicon layer and a p-doped polysilicon layer arranged at intervals, a passivation layer, and a transparent conductive layer are sequentially stacked on the back surface of the semi-finished solar cell 1. The metal grid line 5 is arranged on the surface of any n-doped polysilicon layer and p-doped polysilicon layer by the stacked soldering process. The metal grid lines 5 corresponding to the same type of semiconductor layers on the front and back surfaces of the solar cell are connected together through the side connection line 6, thereby forming an HBC cell with a four-electrode structure.
[0060] In another specific embodiment, an intrinsic amorphous silicon layer, an n-doped polysilicon layer or a p-doped polysilicon layer, and a transparent conductive layer are sequentially stacked on the front surface of the semi-finished solar cell 1; a tunneling oxide layer, an n-doped polysilicon layer and a p-doped polysilicon layer arranged at intervals, a passivation layer, and a transparent conductive layer are sequentially stacked on the back surface of the semi-finished solar cell 1. The metal grid line 5 is arranged on the surface of any n-doped polysilicon layer and p-doped polysilicon layer by the stacked soldering process. The metal grid lines 5 corresponding to the same type of semiconductor layers on the front and back surfaces of the solar cell are connected together through the side connection line 6, thereby forming a solar cell with a three-electrode HJT and HBC structure.
[0061] In summary, in this embodiment, different types of doped layers are respectively arranged on the front and back sides of the battery to form a solar cell with a double BC structure, and the metal grid lines 5 of the same type on the front and back sides of the battery are connected in series by using the side connection line 6, so as to achieve efficient collection of carriers, improve the fill factor and conversion efficiency of the battery. At the same time, this battery structure is beneficial to the testing of solar cells and the production of components, realizes direct seamless splicing of silicon wafers, does not require additional solder tape connection, simplifies the series connection process of components, and improves production efficiency and component performance.
[0062] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these modifications and variations.
Claims
1. A solar cell, characterized in that: include: A semi-finished solar cell having a first surface and a second surface opposite to each other; A first semiconductor layer or a second semiconductor layer is provided on the first surface; The first semiconductor layer and the second semiconductor layer are semiconductor layers of different types; A third semiconductor layer and a fourth semiconductor layer are arranged in sequence and spaced apart from each other on the second surface; the third semiconductor layer and the fourth semiconductor layer are semiconductor layers of different types; Any semiconductor layer is in direct or indirect contact with a metal gate line; The metal grid lines corresponding to the semiconductor layers of the same type on different surfaces are connected via side connection lines.
2. The solar cell according to claim 1, wherein: The first semiconductor layer and the second semiconductor layer are sequentially arranged at intervals on the first surface of the semi-finished solar cell.
3. The solar cell according to claim 1, wherein: The semi-finished solar cell has a first side and a second side opposite to each other; The metal gate lines corresponding to the semiconductor layers of the same type on different surfaces are connected via side connection lines laid on the first side surface; The metal grid lines corresponding to another semiconductor layer of the same type on different surfaces are connected via side connection lines laid on the second side surface.
4. The solar cell according to claim 1, wherein: The semiconductor layer includes a doping layer and a compound semiconductor layer.
5. The solar cell according to claim 4, characterized in that The material of the doping layer is any one of amorphous silicon, microcrystalline silicon, polycrystalline silicon or single crystal silicon.
6. The solar cell according to claim 1, wherein: The material of the side connection line is any one of slurry, solder paste and conductive glue.
7. The solar cell according to claim 1, wherein: The material of the metal grid line is any one of slurry, solder paste and conductive glue.
8. The solar cell according to claim 1, wherein: The area of any semiconductor layer is greater than or equal to the area of the metal gate line.
9. The solar cell according to claim 1, wherein: The metal gate line is arranged on the surface of the semiconductor layer.
10. The solar cell according to claim 1, wherein: It also includes a transparent conductive layer, which is arranged between any semiconductor layer and a metal grid line corresponding to any semiconductor layer.