Dual charging control circuit
By designing a dual charging control circuit, combining the MOS driver module and the MOS tube module, dual control of hardware and software is realized, the risks brought about by software control in existing solar charging technologies are solved, charging reliability is improved and overcharging risks are reduced.
Patent Information
- Application Number
- CN202421957678.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-13
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2034-08-13
AI Technical Summary
In existing solar charging technology, the risks brought by software control lead to out of control of the charging, which easily leads to battery charging failure or fullness.
A dual charging control circuit is designed, combining the MOS driver module and the MOS tube module, and the reliable switching management of the charging circuit is achieved through dual control of hardware and software.
It effectively reduces the software control risks of solar charging, improves charging reliability, and reduces the risk of overcharging the battery.
Smart Images

Figure CN223052778U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of charging technologies, and particularly to a dual charging control circuit. Background Art
[0002] There are usually two ways to use solar energy: 1. Grid-connected power generation; 2. Off-grid energy storage. The solar energy in this case mainly relates to the field of solar energy storage. Solar energy storage mainly stores the energy of solar energy in a battery and releases it at an appropriate time. Energy storage mainly applies solar charging technology.
[0003] The main topological structure of current solar charging is a charging circuit composed of MOS transistors and controlled by an MCU. Since the MCU algorithm is a human-designed algorithm, there is always a certain risk. When the algorithm is not properly processed, it is extremely easy to cause out-of-control charging, such as overcharging or fully charging the battery. Therefore, by controlling the charging function through software and hardware simultaneously, the system reliability can be greatly improved and charging accidents can be avoided. Therefore, a dual charging control circuit is designed. Summary of the Invention
[0004] This application provides a dual charging control circuit to solve the problem of the risk brought by software control in existing solar charging technologies, achieving improved charging reliability and reducing the risk of overcharging the storage battery.
[0005] This application provides a dual charging control circuit, including: a MOS driving module and a MOS transistor module;
[0006] The MOS driving module is responsible for driving the switch of the MOS driving transistor, and the MOS transistor module is responsible for the switch of the main circuit of the charging circuit;
[0007] The MOS driving module includes: resistor R21, resistor R29, resistor R32, resistor R30, resistor R27, resistor R31, NPN transistor Q4, PNP transistor Q3, diode D8; resistor R21 is connected in series between the pin of the MCU and the base of PNP transistor Q3, the base of PNP transistor Q3 is connected to VCC, the emitter of PNP transistor Q3 is connected to one end of resistor R29, the other end of resistor R29 is connected to one end of resistor R30, one end of resistor R32, and the base of NPN transistor Q4; the other end of resistor R32 is connected to the negative pole of the solar panel, the other end of resistor R30 is connected to the collector of NPN transistor Q4, resistor R27 is connected in series between 15V and the emitter of NPN transistor Q4, resistor R31 is connected in series between the emitter and collector of NPN transistor Q4 and KEY1, the positive pole of diode D8 is connected to the collector of NPN transistor Q4, and the negative pole of NPN transistor D4 is connected to KEY1.
[0008] Preferably, the MOS transistor module includes: an N-channel MOS transistor Q9 and a MOS transistor Q10, where: the MOS transistors Q9 and Q10 are connected in series between the negative electrode of the solar panel and the negative electrode of the storage battery, and the MOS transistors Q9 and Q10 share a driving circuit.
[0009] Preferably, the gates of the MOS transistors Q9 and Q10 are connected in parallel and connected to KEY1 of the MOS driving module. The source S of the MOS transistor Q10 is connected to the drain D of the MOS transistor Q9. The drain of the MOS transistor Q10 is connected to the negative electrode of the solar panel, and the source of the MOS transistor Q9 is connected to the negative electrode of the storage battery.
[0010] Preferably, the resistor R21 and the PNP transistor Q3 form a PNP emitter circuit, and the resistor R29 and the NPN transistor Q4 form an NPN emitter circuit.
[0011] Preferably, the resistor R31 is a current-limiting resistor for MOS transistor driving.
[0012] Beneficial effects:
[0013] (1) The present utility model effectively reduces the risks brought by software control of solar charging, improves charging reliability, and reduces the risk of overcharging of the storage battery.
[0014] (2) In the present utility model, the MOS transistors Q9 and Q10 are connected in series between the negative electrode of the solar panel and the negative electrode of the storage battery, and the body diodes of the two are arranged relatively, aiming to effectively perform bidirectional control of the negative electrode of the solar panel and the negative electrode of the storage battery.
[0015] The above description is only an overview of the technical solutions of the embodiments of the present application. In order to be able to understand the technical means of the embodiments of the present application more clearly, it can be implemented according to the content of the description. And in order to make the above and other purposes, features and advantages of the embodiments of the present application more obvious and understandable, the following specifically illustrates the specific embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained according to these drawings without creative efforts.
[0017] Figure 1 It is the circuit schematic diagram of the present utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0018] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the following will clearly and completely describe the technical solutions in the embodiments of this application with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, rather than all of them. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in this application without creative efforts belong to the scope of protection of this application.
[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs; the terms used in the description of this application are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the description and claims of this application and the accompanying drawings are intended to cover non-exclusive inclusion.
[0020] Referring to "embodiments" herein means that the specific features, structures, or characteristics described in connection with the embodiments can be included in at least one embodiment of this application. The phrase "embodiments" appearing in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.
[0021] In the description of this application, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected", and "coupled" should be understood in a broad sense. For example, the "connection" or "coupling" of mechanical structures can refer to a physical connection. For example, a physical connection can be a fixed connection, such as a fixed connection through a fixing member, such as a screw, bolt, or other fixing member; a physical connection can also be a detachable connection, such as a snap connection or a snap-fit connection; a physical connection can also be an integral connection, such as a connection formed by welding, bonding, or integral molding. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0022] To enable those in the technical field of this application to better understand the solutions of this application, the following will clearly and completely describe the technical solutions in the embodiments of this application with reference to the accompanying drawings.
[0023] Please refer to Figure 1 , this application discloses a dual charging control circuit, including: a MOS driving module and a MOS transistor module;
[0024] The MOS driving module is responsible for driving the switching of the MOS driving transistor, and the MOS transistor module is responsible for the switching of the main circuit of the charging circuit. The MOS driving module is controlled by the CPU and hardware, and the two share a CPU control pin, which are turned on and off simultaneously;
[0025] The MOS driving module includes: resistor R21, resistor R29, resistor R32, resistor R30, resistor R27, resistor R31, NPN transistor Q4, PNP transistor Q3, diode D8; the resistor R21 is connected in series between the MCU pin and the base of the PNP transistor Q3, the base of the PNP transistor Q3 is connected to VCC, the emitter of the PNP transistor Q3 is connected to one end of the resistor R29, and the other end of the resistor R29 is connected to one end of the resistor R30, one end of the resistor R32, and the base of the NPN transistor Q4; the other end of the resistor R32 is connected to the negative pole of the solar panel, the other end of the resistor R30 is connected to the collector of the NPN transistor Q4, the resistor R27 is connected in series between 15V and the emitter of the NPN transistor Q4, the resistor R31 is connected in series between the emitter and KEY1 of the NPN transistor Q4, the positive pole of the diode D8 is connected to the collector of the NPN transistor Q4, and the negative pole of the NPN transistor D4 is connected to KEY1. The resistor R21 and the PNP transistor Q3 form a PNP emitter circuit, the resistor R29 and the NPN transistor Q4 form an NPN emitter circuit, and the resistor R31 is the MOS transistor drive current limiting resistor.
[0026] With the above technical solution, the MOS transistor can be reliably turned on or off. When the CPU (one end of the resistor R21) outputs a high level, the PNP transistor Q3 is turned off, the NPN transistor Q4 is turned off, and 15V provides a drive voltage for the MOS transistor through the resistor R27 and the resistor R31, and the MOS transistors Q9 and Q10 are turned on; when the CPU (one end of the resistor R21) outputs a low level, the PNP transistor Q3 is turned on, the NPN transistor Q4 is turned on, and the gate of the MOS transistor is pulled low by the NPN transistor Q4, and the MOS transistors Q9 and Q10 are turned off. This is a software control method, and the working mode of the MOS transistor and the MCU are in opposite working states.
[0027] When the CPU (one end of the resistor R21) outputs a low level, the PNP transistor Q3 is turned on, the NPN transistor Q4 is turned on, and the gate of the MOS transistor is pulled low by the NPN transistor Q4, and the MOS transistors Q9 and Q10 are turned off. At this time, if the voltage of the solar panel is lower than the voltage of the battery, since the positive poles of the solar panel and the battery are common positive, the negative potential of the solar panel is greater than the negative potential of the battery. Therefore, the NPN transistor Q4 is turned on, further turning off the MOS transistors Q9 and Q10. This is a hardware control method
[0028] In the present utility model, the MOS transistor module includes an N-channel MOS transistor Q9 and a MOS transistor Q10, where: the MOS transistors Q9 and Q10 are connected in series between the negative electrode of the solar panel and the negative electrode of the storage battery, and the MOS transistors Q9 and Q10 share a driving circuit; the gates of the MOS transistors Q9 and Q10 are connected in parallel and connected to KEY1 of the MOS driving module, the source S of the MOS transistor Q10 is connected to the drain D of the MOS transistor Q9, the drain of the MOS transistor Q10 is connected to the negative electrode of the solar panel, and the source of the MOS transistor Q9 is connected to the negative electrode of the storage battery. The MOS transistors Q9 and Q10 are connected in series between the negative electrode of the solar panel and the negative electrode of the storage battery, and the body diodes of the two are arranged oppositely, aiming to effectively perform bidirectional control of the negative electrode of the solar panel and the negative electrode of the storage battery.
[0029] Working principle: In the initial state: the MOS transistor is in the closed state. When the system determines that it enters the charging state, the MCU sets a low level, the MOS transistor is turned on, and the solar panel and the storage battery are in a parallel state, and charging starts.
[0030] During the charging process: the MCU periodically sets a high level to turn off the charging to detect the voltage of the solar panel. If the voltage of the solar panel is higher than the voltage of the storage battery, the charging is resumed.
[0031] Turning off the charging: When the voltage of the solar panel is lower than the voltage of the storage battery, when the MCU sets a high level, the software control takes effect and the MOS transistor is turned off; at the same time when the MOS transistor is turned off, the hardware turns off the charging circuit is triggered, and a voltage difference is formed between the negative electrode of the solar panel and GND2, and the level of the negative electrode is higher than the level of GND2. This voltage difference forms a base current on the NPN transistor Q4, and the direction of the current is: the negative electrode of the solar panel - NPN transistor Q4(be) - GND2 - the body diode of the MOS transistor Q9 - the negative electrode of the storage battery, the NPN transistor Q4 is turned on, and the gates of Q9 and Q10 are pulled low, and the MOS transistors Q9 and Q10 are turned off.
[0032] In summary, the present utility model effectively reduces the risks brought by the software control of solar charging, improves the charging reliability, and reduces the risk of overcharging of the storage battery.
[0033] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the various embodiments of the present application.
Claims
1. A dual charging control circuit, characterized in that: include: Including MOS driver module and MOS tube module; The MOS driver module is responsible for driving the switch of the MOS driver tube, and the MOS tube module is responsible for the switch of the main loop of the charging circuit; The MOS driving module includes: resistor R21, resistor R29, resistor R32, resistor R30, resistor R27, resistor R31, NPN transistor Q4, PNP transistor Q3, and diode D8; the resistor R21 is connected in series to the MCU pin and the base of the PNP transistor Q3, the base of the PNP transistor Q3 is connected to VCC, the emitter of the PNP transistor Q3 is connected to one end of the resistor R29, the other end of the resistor R29 is connected to one end of the resistor R30, and the diode D8 is connected to the MCU pin. One end of the resistor R32 is connected to the base of the NPN transistor Q4; the other end of the resistor R32 is connected to the negative electrode of the solar panel, the other end of the resistor R30 is connected to the collector of the NPN transistor Q4, the resistor R27 is connected in series between 15V and the emitter of the NPN transistor Q4, the resistor R31 is connected in series between the emitter of the NPN transistor Q4 and KEY1, the positive electrode of the diode D8 is connected to the collector of the NPN transistor Q4, and the negative electrode of the NPN transistor D4 is connected to KEY1.
2. A dual charging control circuit according to claim 1, characterized in that: The MOS tube module includes: N-channel MOS tube Q9 and MOS tube Q10, wherein: the MOS tube Q9 and MOS tube Q10 are connected in series between the negative electrode of the solar panel and the negative electrode of the battery, and the MOS tube Q9 and MOS tube Q10 share a driving circuit.
3. A dual charging control circuit according to claim 2, characterized in that: The gates of the MOS transistors Q9 and Q10 are connected in parallel and connected to KEY1 of the MOS driving module. The source S of the MOS transistor Q10 is connected to the drain D of the MOS transistor Q9. The drain of the MOS transistor Q10 is connected to the negative electrode of the solar panel. The source of the MOS transistor Q9 is connected to the negative electrode of the battery.
4. A dual charging control circuit according to claim 1, characterized in that: The resistor R21 and the PNP transistor Q3 form a PNP emission circuit, and the resistor R29 and the NPN transistor Q4 form an NPN emission circuit.
5. A dual charging control circuit according to claim 1, characterized in that: The resistor R31 is a current limiting resistor for driving the MOS tube.