Amplifier circuit system

Abstract

The utility model provides an amplifier circuit system, which relates to the technical field of communication, and comprises an amplifying circuit and a stabilizing circuit, the stabilizing circuit comprises an input stabilizing circuit and / or an output stabilizing circuit, the input stabilizing circuit comprises a first negative resistance counteracting sub-circuit and a first zero resistance counteracting sub-circuit, and the output stabilizing circuit comprises a second negative resistance counteracting sub-circuit and a second zero resistance counteracting sub-circuit. The real part of the input impedance of the amplifier circuit system is made to be larger than zero through the input stabilizing circuit; the output stabilizing circuit comprises a second negative resistance counteracting sub-circuit and a second zero resistance counteracting sub-circuit, and the real part of the output impedance of the amplifier circuit system is larger than zero through the output stabilizing circuit. By implementing the technical scheme provided by the utility model, the technical problem that the stability of the amplifier is poor in the prior art is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of communication, and particularly relates to an amplifier circuit system. Background Art

[0002] An amplifier is not always absolutely stable in all frequency domains. The stability factor of an amplifier is a function of frequency, and when it is absolutely stable, the stability factor StabFact > 1. Generally, an amplifier circuit is relatively easy to be stable at low frequencies and difficult to be stable at high frequencies. However, in practical applications, it may be necessary to be stable in the unstable frequency band, and many applications require to broaden the absolute stability of the amplifier in the high-frequency band. For example, taking a radio frequency microwave amplifier as an example, in the related art, in order to improve the gain performance, some negative resistance circuits may be introduced inside, or the design is improper, or after long-term use, aging causes the real part of the input and output complex impedance to be negative or 0, resulting in the amplifier being in a non-absolutely stable state. It can be seen that the amplifier in the related art has the problem of poor stability.

[0003] Aiming at the technical problem of poor stability of the amplifier existing in the related art, no effective solution has been proposed yet. Summary of the Utility Model

[0004] The utility model provides an amplifier circuit system to at least solve the technical problem of poor stability of the amplifier existing in the related art.

[0005] The present utility model provides an amplifier circuit system, comprising: an amplifying circuit, a stabilizing circuit, the stabilizing circuit including an input stabilizing circuit and / or an output stabilizing circuit, wherein the input stabilizing circuit is connected between an input port and an input end of the amplifying circuit, and the output stabilizing circuit is connected between an output end of the amplifying circuit and an output port, and wherein the amplifier circuit system includes an input port and an output port; the input stabilizing circuit includes a first negative resistance cancellation sub-circuit and a first zero resistance cancellation sub-circuit, wherein the first negative resistance cancellation sub-circuit is configured to cancel the input impedance of the amplifying circuit when the real part of the input impedance of the amplifying circuit is less than zero, so that the real part of the input impedance of the amplifier circuit system is greater than zero, and the first zero resistance cancellation sub-circuit is configured to cancel the input impedance of the amplifying circuit when the real part of the input impedance of the amplifying circuit is equal to zero, so that the real part of the input impedance of the amplifier circuit system is greater than zero; the output stabilizing circuit includes a second negative resistance cancellation sub-circuit and a second zero resistance cancellation sub-circuit, wherein the second negative resistance cancellation sub-circuit is configured to cancel the output impedance of the amplifying circuit when the real part of the output impedance of the amplifying circuit is less than zero, so that the real part of the output impedance of the amplifier circuit system is greater than zero, and the second zero resistance cancellation sub-circuit is configured to cancel the output impedance of the amplifying circuit when the real part of the output impedance of the amplifying circuit is equal to zero, so that the real part of the output impedance of the amplifier circuit system is greater than zero.

[0006] By adopting the above technical solution, a stabilizing circuit is added on the basis of the original amplifying circuit. The stabilizing circuit can include an input stabilizing circuit and / or an output stabilizing circuit. Among them, the first negative resistance cancellation sub-circuit in the input stabilizing circuit takes effect when the real part of the input impedance of the amplifying circuit is less than zero, and is used to cancel the input impedance of the amplifying circuit and make the real part of the input impedance of the amplifier circuit system greater than zero. The first zero resistance cancellation sub-circuit in the input stabilizing circuit takes effect when the real part of the input impedance of the amplifying circuit is equal to zero, and is used to cancel the input impedance of the amplifying circuit and make the real part of the input impedance of the amplifier circuit system greater than zero. That is, when the real part of the input impedance of the original amplifying circuit is negative or 0, the purpose of improving the stability of the amplifier circuit system can be achieved through the input stabilizing circuit; similarly, when the real part of the output impedance of the original amplifying circuit is negative or 0, the purpose of improving the stability of the amplifier circuit system can be achieved through the output stabilizing circuit; when the real parts of the input impedance and the output impedance of the original amplifying circuit are both negative or 0, the effect of improving the stability of the amplifier circuit system can be achieved through the combined action of the input stabilizing circuit and the output stabilizing circuit.

[0007] Optionally, the first zero-resistance cancellation sub-circuit is connected between the input port and the input terminal of the amplifier circuit, and the first negative-resistance cancellation sub-circuit is connected between the input port and the ground terminal; or, the first zero-resistance cancellation sub-circuit is connected between the input port and the input terminal of the amplifier circuit, and the first negative-resistance cancellation sub-circuit is connected between the input terminal of the amplifier circuit and the ground terminal.

[0008] By adopting the above technical solution, the first zero-resistance cancellation sub-circuit is connected in series between the input port and the input terminal of the amplifier circuit, and the first negative-resistance cancellation sub-circuit is connected in parallel to the ground terminal. Specifically, the first negative-resistance cancellation sub-circuit can be connected between the input port and the ground terminal, and can also be connected between the input terminal of the amplifier circuit and the ground terminal, that is, the front and back order of the first zero-resistance cancellation sub-circuit and the first negative-resistance cancellation sub-circuit can be interchanged.

[0009] Optionally, the second zero-resistance cancellation sub-circuit is connected between the output port and the output terminal of the amplifier circuit, and the second negative-resistance cancellation sub-circuit is connected between the output port and the ground terminal; or, the second zero-resistance cancellation sub-circuit is connected between the output port and the output terminal of the amplifier circuit, and the second negative-resistance cancellation sub-circuit is connected between the output terminal of the amplifier circuit and the ground terminal.

[0010] By adopting the above technical solution, the second zero-resistance cancellation sub-circuit is connected in series between the output port and the output terminal of the amplifier circuit, and the second negative-resistance cancellation sub-circuit is connected in parallel to the ground terminal. Specifically, the second negative-resistance cancellation sub-circuit can be connected between the output port and the ground terminal, and can also be connected between the output terminal of the amplifier circuit and the ground terminal, that is, the front and back order of the second zero-resistance cancellation sub-circuit and the second negative-resistance cancellation sub-circuit can be interchanged.

[0011] Optionally, the real part of the complex impedance of the first zero-resistance cancellation sub-circuit is greater than zero, and the real part of the complex impedance of the first negative-resistance cancellation sub-circuit is greater than zero; and / or, the real part of the complex impedance of the second zero-resistance cancellation sub-circuit is greater than zero, and the real part of the complex impedance of the second negative-resistance cancellation sub-circuit is greater than zero.

[0012] By adopting the above technical solution, the real part of the complex impedance of the first zero-resistance cancellation sub-circuit and the real part of the complex impedance of the first negative-resistance cancellation sub-circuit are both greater than zero, that is, the corresponding resistance values are positive; and / or, the real part of the complex impedance of the second zero-resistance cancellation sub-circuit and the real part of the complex impedance of the second negative-resistance cancellation sub-circuit are both greater than zero, that is, the corresponding resistance values are positive.

[0013] Optionally, when the characteristic impedance of the amplifier circuit system is Z0, the impedance of the first zero-resistance cancellation sub-circuit and the impedance of the first negative-resistance cancellation sub-circuit are both equal to Z0; and / or, the impedance of the second zero-resistance cancellation sub-circuit and the impedance of the second negative-resistance cancellation sub-circuit are both equal to Z0.

[0014] By adopting the above technical solution, the real part of the complex impedance of the input impedance and the output impedance of the amplifier circuit system can be ensured not to be negative or zero by the input stabilization circuit and / or the output stabilization circuit. Preferably, by setting the impedance of the first zero-resistance cancellation sub-circuit and the impedance of the first negative-resistance cancellation sub-circuit to be both equal to Z0, and / or by setting the impedance of the second zero-resistance cancellation sub-circuit and the impedance of the second negative-resistance cancellation sub-circuit to be both equal to Z0, better results in both the stability factor and the output gain can be obtained.

[0015] Optionally, the characteristic impedance of the output line of the amplifier circuit system is equal to one of the following: 50Ω, 75Ω, 200Ω.

[0016] By adopting the above technical solution, the characteristic impedance of the output line of the present amplifier circuit system can be 50Ω or 75Ω or 200Ω, or can also be other characteristic impedance values.

[0017] Optionally, the first zero-resistance cancellation sub-circuit includes a first device, wherein the real part of the complex impedance of the first device is greater than zero; the first negative-resistance cancellation sub-circuit includes a second device, wherein the real part of the complex impedance of the second device is greater than zero.

[0018] By adopting the above technical solution, the first zero-resistance cancellation sub-circuit in the input stabilization circuit can include a first device, the real part of the complex impedance of which is greater than zero, and the first negative-resistance cancellation sub-circuit includes a second device, the real part of the complex impedance of which is greater than zero, so as to ensure that the real part of the input impedance of the amplifier circuit system is greater than zero.

[0019] Optionally, the first device is a pure positive-resistance device or an inductor device with a parasitic positive resistance; the second device is a pure positive-resistance device or an inductor device with a parasitic positive resistance.

[0020] By adopting the above technical solution, the first device can be a pure resistor, for example, a resistor device with a positive resistance value, or the first device can also be an inductor device with a parasitic resistor, and the resistance value of the parasitic resistor is positive.

[0021] Optionally, the second zero-resistance cancellation sub-circuit includes a third device, and the second negative-resistance cancellation sub-circuit includes a fourth device, wherein the real part of the complex impedance of the third device is greater than zero, and the real part of the complex impedance of the fourth device is greater than zero; the third device is a pure positive-resistance device or an inductor device with a parasitic positive resistance, and the fourth device is a pure positive-resistance device or an inductor device with a parasitic positive resistance.

[0022] By adopting the above technical solution, the second zero-resistance cancellation sub-circuit in the output stabilization circuit may include a third device, the real part of the complex impedance of which is greater than zero, and the second negative-resistance cancellation sub-circuit includes a fourth device, the real part of the complex impedance of which is greater than zero; the third device may be a pure resistor, such as a resistor device with a positive resistance value, or the third device may also be an inductor device with a parasitic resistor, the resistance value of which is positive; similarly, the fourth device may be a pure resistor, such as a resistor device with a positive resistance value, or the fourth device may also be an inductor device with a parasitic resistor, the resistance value of which is positive. This can ensure that the real part of the output impedance of the amplifier circuit system is greater than zero.

[0023] Optionally, the operating frequency of the amplifier circuit system is 0 - 20 GHz.

[0024] By adopting the above technical solution, the operating frequency of the amplifier circuit system is 0 - 20 GHz, that is, it can operate in a relatively wide frequency range. In the related art, an amplifier may only meet the stability requirements in a relatively low frequency range, but it is difficult to meet the stability requirements when the frequency is relatively high. For example, the stability is poor when the frequency is 10 GHz - 20 GHz.

[0025] In summary, one or more technical solutions provided in the embodiments of the present invention have at least the following technical effects or advantages:

[0026] 1. By adding a stabilization circuit, the stability of the amplifier circuit system can be improved.

[0027] 2. By means of the input stabilization circuit, the real part of the input impedance of the amplifier circuit system can be made greater than zero; by means of the output stabilization circuit, the real part of the output impedance of the amplifier circuit system can be made greater than zero.

[0028] 3. The amplifier circuit system provided by the present invention can meet the stability requirements in a relatively wide frequency range, that is, it has a wider frequency-domain stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a structural block diagram of an amplifier circuit system provided by an embodiment of the present invention;

[0030] Figure 2 is a structural block diagram of a broadband amplifier circuit provided by an embodiment of the present invention;

[0031] Figure 3 is an ADS simulation example diagram of an amplifier in the related art;

[0032] Figure 4 is an example diagram of the simulation result of an amplifier in the related art;

[0033] Figure 5 It is the first amplifier circuit simulation example diagram provided by the embodiment of the present utility model;

[0034] Figure 6 It is the first amplifier circuit simulation result example diagram provided by the embodiment of the present utility model;

[0035] Figure 7 It is the second amplifier circuit simulation example diagram provided by the embodiment of the present utility model;

[0036] Figure 8 It is the second amplifier circuit simulation result example diagram provided by the embodiment of the present utility model;

[0037] Figure 9 It is the third amplifier circuit simulation example diagram provided by the embodiment of the present utility model;

[0038] Figure 10 It is the third amplifier circuit simulation result example diagram provided by the embodiment of the present utility model;

[0039] Figure 11 It is the fourth amplifier circuit simulation example diagram provided by the embodiment of the present utility model;

[0040] Figure 12 It is the fourth amplifier circuit simulation result example diagram provided by the embodiment of the present utility model.

[0041] Reference numerals:

[0042] 11 - Amplification circuit, 12 - Stabilization circuit, 1201 - Input stabilization circuit, 1202 - Output stabilization circuit, 120101 - First zero - resistance cancellation sub - circuit, 120102 - First negative - resistance cancellation sub - circuit, 120201 - Second zero - resistance cancellation sub - circuit, 120202 - Second negative - resistance cancellation sub - circuit. Detailed implementation manners

[0043] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of this specification. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments.

[0044] In the description of the embodiments of the present utility model, words such as "for example" or "for illustration" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "for example" or "for illustration" in the embodiments of the present utility model should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Precisely, the use of words such as "for example" or "for illustration" is intended to present relevant concepts in a specific manner.

[0045] In the description of the embodiments of the present utility model, the meaning of the term "a plurality of" refers to two or more. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. The terms "comprise", "include", "have" and their variants all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0046] The present utility model provides an amplifier circuit system. Referring to Figure 1 , Figure 1 FIG. is a structural block diagram of an amplifier circuit system provided by an embodiment of the present utility model. The system includes: an amplification circuit 11, a stabilization circuit 12. The stabilization circuit 12 includes an input stabilization circuit 1201 and / or an output stabilization circuit 1202. Among them,

[0047] The input stabilization circuit 1201 is connected between the input port and the input end of the amplification circuit 11, and the output stabilization circuit 1202 is connected between the output end of the amplification circuit 11 and the output port. Among them, the amplifier circuit system includes an input port and an output port;

[0048] The input stabilization circuit 1201 includes a first negative resistance cancellation sub-circuit 120102 and a first zero resistance cancellation sub-circuit 120101. Among them, the first negative resistance cancellation sub-circuit 120102 is configured to cancel the input impedance of the amplification circuit 11 when the real part of the input impedance of the amplification circuit 11 is less than zero, so that the real part of the input impedance of the amplifier circuit system is greater than zero. The first zero resistance cancellation sub-circuit 120101 is configured to cancel the input impedance of the amplification circuit 11 when the real part of the input impedance of the amplification circuit 11 is equal to zero, so that the real part of the input impedance of the amplifier circuit system is greater than zero;

[0049] The output stabilization circuit 1202 includes a second negative resistance cancellation sub-circuit 120202 and a second zero resistance cancellation sub-circuit 120201. Among them, the second negative resistance cancellation sub-circuit 120202 is configured to cancel the output impedance of the amplification circuit 11 when the real part of the output impedance of the amplification circuit 11 is less than zero, so that the real part of the output impedance of the amplifier circuit system is greater than zero. The second zero resistance cancellation sub-circuit 120201 is configured to cancel the output impedance of the amplification circuit 11 when the real part of the output impedance of the amplification circuit 11 is equal to zero, so that the real part of the output impedance of the amplifier circuit system is greater than zero.

[0050] In the above embodiments, a stabilization circuit 12 is added on the basis of the original amplifier circuit 11. The stabilization circuit 12 may include an input stabilization circuit 1201 and / or an output stabilization circuit 1202. Among them, the first zero-resistance cancellation sub-circuit 120101 in the input stabilization circuit 1201 functions when the real part of the input impedance of the amplifier circuit 11 is equal to zero, and is used to cancel the input impedance of the amplifier circuit 11 and make the real part of the input impedance of the amplifier circuit system greater than zero. The first negative-resistance cancellation sub-circuit 120102 in the input stabilization circuit 1201 functions when the real part of the input impedance of the amplifier circuit 11 is less than zero, and is used to cancel the input impedance of the amplifier circuit 11 and make the real part of the input impedance of the amplifier circuit system greater than zero. That is, when the real part of the input impedance of the original amplifier circuit 11 is negative or 0, the input stabilization circuit 1201 can be used to achieve the purpose of improving the stability of the amplifier circuit system. Similarly, when the real part of the output impedance of the original amplifier circuit 11 is negative or 0, the output stabilization circuit 1202 can be used to achieve the purpose of improving the stability of the amplifier circuit system. Specifically, the second zero-resistance cancellation sub-circuit 120201 in the output stabilization circuit 1202 functions when the real part of the output impedance of the amplifier circuit 11 is equal to zero, and is used to cancel the output impedance of the amplifier circuit 11 and make the real part of the output impedance of the amplifier circuit system greater than zero. The second negative-resistance cancellation sub-circuit 120202 in the output stabilization circuit 1202 functions when the real part of the output impedance of the amplifier circuit 11 is less than zero, and is used to cancel the output impedance of the amplifier circuit 11 and make the real part of the output impedance of the amplifier circuit system greater than zero. When the real parts of both the input impedance and the output impedance of the original amplifier circuit 11 are negative or 0, the combined action of the input stabilization circuit 1201 and the output stabilization circuit 1202 can achieve the effect of improving the stability of the amplifier circuit system.

[0051] In an alternative embodiment, the first zero-resistance cancellation sub-circuit 120101 is connected between the input port and the input terminal of the amplifier circuit 11, and the first negative-resistance cancellation sub-circuit 120102 is connected between the input port and the ground terminal; or, the first zero-resistance cancellation sub-circuit 120101 is connected between the input port and the input terminal of the amplifier circuit 11, and the first negative-resistance cancellation sub-circuit 120102 is connected between the input terminal of the amplifier circuit and the ground terminal.

[0052] In the above embodiments, the first zero-resistance cancellation sub-circuit 120101 is connected in series between the input port and the input terminal of the amplifier circuit 11, and the first negative-resistance cancellation sub-circuit 120102 is connected in parallel to the ground terminal. Specifically, the first negative-resistance cancellation sub-circuit 120102 can be connected between the input port and the ground terminal, or can be connected between the input terminal of the amplifier circuit 11 and the ground terminal. That is, the front and rear order of the first zero-resistance cancellation sub-circuit 120101 and the first negative-resistance cancellation sub-circuit 120102 can be interchanged, which means that the first negative-resistance cancellation sub-circuit 120102 can be placed in front of or behind the first zero-resistance cancellation sub-circuit 120101.

[0053] In an alternative embodiment, the second zero-resistance cancellation sub-circuit 120201 is connected between the output port and the output terminal of the amplifier circuit 11, and the second negative-resistance cancellation sub-circuit 120202 is connected between the output port and the ground terminal; or, the second zero-resistance cancellation sub-circuit 120201 is connected between the output port and the output terminal of the amplifier circuit 11, and the second negative-resistance cancellation sub-circuit 120202 is connected between the output terminal of the amplifier circuit 11 and the ground terminal.

[0054] In the above embodiments, the second zero-resistance cancellation sub-circuit 120201 is connected in series between the output port and the output terminal of the amplifier circuit 11, and the second negative-resistance cancellation sub-circuit 120202 is connected in parallel to the ground terminal. Specifically, the second negative-resistance cancellation sub-circuit 120202 can be connected between the output port and the ground terminal, or can be connected between the output terminal of the amplifier circuit 11 and the ground terminal. That is, the front and rear order of the second zero-resistance cancellation sub-circuit 120201 and the second negative-resistance cancellation sub-circuit 120202 can be interchanged, which means that the second negative-resistance cancellation sub-circuit 120202 can be placed in front of or behind the second zero-resistance cancellation sub-circuit 120201.

[0055] In an alternative embodiment, the real part of the complex impedance of the first zero-resistance cancellation sub-circuit 120101 is greater than zero, and the real part of the complex impedance of the first negative-resistance cancellation sub-circuit 120102 is greater than zero; and / or, the real part of the complex impedance of the second zero-resistance cancellation sub-circuit 120201 is greater than zero, and the real part of the complex impedance of the second negative-resistance cancellation sub-circuit 120202 is greater than zero.

[0056] In the above embodiments, the real parts of the complex impedances of the first zero-resistance cancellation sub-circuit 120101 and the first negative-resistance cancellation sub-circuit 120102 are both greater than zero, that is, the corresponding resistance values are positive; and / or, the real parts of the complex impedances of the second zero-resistance cancellation sub-circuit 120201 and the second negative-resistance cancellation sub-circuit 120202 are both greater than zero, that is, the corresponding resistance values are positive. In practical applications, the real part of the input impedance of the amplifier circuit may be negative or 0, or the real part of the output impedance may be negative or 0. Of course, it is also possible that both the real part of the input impedance and the real part of the output impedance are negative or 0. Then, the input stability circuit 1201 and the output stability circuit 1202 can be selected according to needs. For example, when the real part of the input impedance is negative or 0 and the real part of the output impedance is greater than 0, the stability circuit 12 includes the input stability circuit 1201; when the real part of the output impedance is negative or 0 and the real part of the input impedance is greater than 0, the stability circuit 12 includes the output stability circuit 1202; and when the real part of the input impedance is negative or 0 and the real part of the output impedance is negative or 0, the stability circuit 12 includes the input stability circuit 1201 and the output stability circuit 1202.

[0057] In an alternative embodiment, when the characteristic impedance of the amplifier circuit system is Z0, the real parts of the complex impedances of the first zero-resistance cancellation sub-circuit 120101 and the first negative-resistance cancellation sub-circuit 120102 are both equal to Z0; and / or, the real parts of the complex impedances of the second zero-resistance cancellation sub-circuit 120201 and the second negative-resistance cancellation sub-circuit 120202 are both equal to Z0.

[0058] In the above embodiments, by means of the input stability circuit 1201 and / or the output stability circuit 1202, it can be ensured that the real parts of the complex impedances of the input impedance and the output impedance of the amplifier circuit system no longer appear negative or 0. Preferably, by setting the real parts of the complex impedances of the first zero-resistance cancellation sub-circuit 120101 and the first negative-resistance cancellation sub-circuit 120102 to be both equal to Z0, and / or setting the real parts of the complex impedances of the second zero-resistance cancellation sub-circuit 120201 and the second negative-resistance cancellation sub-circuit 120202 to be both equal to Z0, better results in both the stability coefficient and the output gain can be obtained.

[0059] In an alternative embodiment, the characteristic impedance of the output line of the amplifier circuit system is equal to one of the following: 50Ω, 75Ω, 200Ω.

[0060] In the above embodiments, the characteristic impedance of the output line of the present amplifier circuit system can be 50Ω or 75Ω or 200Ω, or other characteristic impedance values.

[0061] In an alternative embodiment, the first zero-resistance cancellation sub-circuit 120101 includes a first device, wherein the real part of the complex impedance of the first device is greater than zero; the first negative-resistance cancellation sub-circuit 120102 includes a second device, wherein the real part of the complex impedance of the second device is greater than zero.

[0062] In the above embodiment, the first zero-resistance cancellation sub-circuit 120101 in the input stabilization circuit 1201 may include a first device, the real part of the complex impedance of which is greater than zero, and the first negative-resistance cancellation sub-circuit 120102 includes a second device, the real part of the complex impedance of which is greater than zero, so as to ensure that the real part of the input impedance of the amplifier circuit system is greater than zero. The first device is not limited to a single electronic component, and may also be a combination of multiple devices. For example, it may be a pure resistor, or a combination of a resistor and an inductor (or other devices), etc. Similarly, the second device is not limited to a single electronic component, and may also be a combination of multiple devices.

[0063] In an alternative embodiment, the first device is a pure positive-resistance device or an inductor device with a parasitic positive resistance; the second device is a pure positive-resistance device or an inductor device with a parasitic positive resistance.

[0064] In the above embodiment, the first device may be a pure resistor, such as a resistor device with a positive resistance value, or the first device may also be an inductor device with a parasitic resistor, the resistance value of which is positive, or the first device is a capacitor device with a parasitic positive resistance, etc.; the second device is similar.

[0065] In an alternative embodiment, the second zero-resistance cancellation sub-circuit 120201 includes a third device, and the second negative-resistance cancellation sub-circuit 120202 includes a fourth device, wherein the real part of the complex impedance of the third device is greater than zero, and the real part of the complex impedance of the fourth device is greater than zero; the third device is a pure positive-resistance device or an inductor device with a parasitic positive resistance, and the fourth device is a pure positive-resistance device or an inductor device with a parasitic positive resistance.

[0066] In the above embodiment, the second zero-resistance cancellation sub-circuit 120201 in the output stabilization circuit 1202 may include a third device, the real part of the complex impedance of which is greater than zero, and the second negative-resistance cancellation sub-circuit 120202 includes a fourth device, the real part of the complex impedance of which is greater than zero; the third device may be a pure resistor, such as a resistor device with a positive resistance value, or the third device may also be an inductor device with a parasitic resistor, the resistance value of which is positive; similarly, the fourth device may be a pure resistor, such as a resistor device with a positive resistance value, or the fourth device may also be an inductor device with a parasitic resistor, the resistance value of which is positive. This can ensure that the real part of the output impedance of the amplifier circuit system is greater than zero.

[0067] In an alternative embodiment, the operating frequency of the amplifier circuit system is 0 - 20 GHz.

[0068] In the above embodiment, the operating frequency of the amplifier circuit system is 0 - 20 GHz, that is, it can operate in a relatively wide frequency range. However, in related technologies, an amplifier may only meet the stability requirements at a lower frequency range, and it is difficult to meet the stability requirements when the frequency is relatively high. For example, the stability is poor when the frequency is 10 GHz - 20 GHz.

[0069] It should be noted that the above-described embodiments are only a part of the embodiments of the present invention, rather than all embodiments. The present invention will be specifically described below in conjunction with specific embodiments.

[0070] In related technologies, for a radio frequency microwave amplifier circuit, when it is designed improperly or a negative resistance circuit is intentionally introduced to increase the gain but not properly processed, the real part of the input or output complex impedance will be negative or 0. According to verification and simulation, such an amplifier circuit is in a non-absolutely stable state, and long-term use will cause damage or even burnout of the amplifier device, and in severe cases, it may lead to safety accidents.

[0071] Aiming at the defects in the stability of the amplifier in related technologies, the present invention makes the entire composite amplifier system in an absolutely stable state by adding a unique stable circuit before and after the amplifier, thereby solving the device problem and the safety problem.

[0072] Figure 2 is a structural block diagram of a broadband amplifier circuit provided by an embodiment of the present invention, including: an amplification circuit 11, an input stability circuit 1201, and an output stability circuit 1202. Among them, the input stability circuit 1201 includes a first zero-resistance cancellation sub-circuit 120101 and a first negative-resistance cancellation sub-circuit 120102, and the output stability circuit 1202 includes a second zero-resistance cancellation sub-circuit 120201 and a second negative-resistance cancellation sub-circuit 120202. Figure 2 In, Z0 in the input port and the output port can be understood as the characteristic impedance of the transmission line of the amplifier circuit system. It should be noted that Figure 2 is taken as an example of the case where the real parts of the input impedance and the output impedance of the amplification circuit are both negative or 0. In actual applications, it can be designed according to actual situations. For example, if the real part of the input impedance is greater than 0, the input stability circuit 1201 may not be added.

[0073] Such as Figure 2 As shown, this is a radio frequency microwave system with a characteristic impedance of Z0. The input port and the output port are as shown in the figure, and the impedance of the input port and the output port are both Z0.

[0074] Resistance: The real part of the complex impedance; Negative resistance: Negative dynamic resistance, whose physical meaning characterizes that the slope of the volt-ampere characteristic curve of the device is negative.

[0075] The intermediate circuit (i.e., the amplifier circuit, such as Figure 2 the 11 in it) is a non-absolutely stable amplifier circuit (derived from the absolute stability criterion K > 1, K ≤ 1 is obtained), and its main characteristics are that the real parts of the input and output complex impedances are negative or 0.

[0076] Secondly, there is the stable circuit 12, including the input stable circuit 1201 and the output stable circuit 1202; each sub-circuit in the stable circuit 12 can be represented as a complex impedance, and the specific calculation conditions that need to be met are given.

[0077] The non-absolutely stable amplifier circuit and the two stable circuits before and after form an absolutely stable amplifier circuit system. The amplifier system between the two ports: input stable circuit + unstable amplifier + output stable circuit. After simulation verification, StabFact > 1, so the problem of its non-absolutely stable (StabFact ≤ 1) is solved.

[0078] Each stable circuit includes a negative resistance cancellation resistor (with a positive real part of the complex impedance) circuit connected in parallel to the ground, and a zero resistance cancellation resistor (with a positive real part of the complex impedance) circuit connected in series to the circuit. Among them, the negative resistance cancellation resistor circuits are such as Figure 2 the 120102 and 120202 in it, and the zero resistance cancellation resistor circuits are such as Figure 2 the 120101 and 120201 in it.

[0079] Because the stability factor StabFact is a function of frequency, the real parts of the complex impedances of the amplifier input and output < 0 or = 0 may occur at multiple frequency points. At this time, multiple pairs of parallel negative resistance cancellation resistor circuits plus series zero resistance cancellation circuits are required. The parallel negative resistance cancellation circuit can be placed in front of or behind the series zero resistance cancellation resistor circuit.

[0080] The parallel negative resistance cancellation resistor circuit is used to solve the situation where StabFact ≤ 1 caused by the real part of the complex impedance of the amplifier input or output < 0, as long as the real part of the complex impedance of the negative resistance cancellation resistor circuit > 0.

[0081] The series zero resistance cancellation resistor circuit is used to solve the situation where StabFact ≤ 1 caused by the real part of the complex impedance of the amplifier input or output being 0, as long as the real part of the complex impedance of the zero resistance cancellation resistor circuit > 0.

[0082] The parallel and series resistors are positive real-valued resistors with unrestricted values. The combination of the two ensures that there is no situation where the real part of the complex impedance at the input and output of the amplifier composite system is ≤ 0. At the same time, the two resistors jointly control two parameters: the amplifier gain and the stability factor. Users can make a trade-off according to their needs when selecting the resistance value combination, and specifically, but not limited to, using simulation tools to obtain the final resistance value scheme. Generally, in a radio frequency and microwave system with a characteristic impedance of Z0 (real number), when the series resistance value = the parallel resistance value = Z0, the result is a stability factor and a relatively good trade-off between the output gains of the two.

[0083] The real parts of the input impedance and output impedance of the amplifier must both be > 0 to ensure that it is in an absolutely stable (StabFact > 1) state.

[0084] In the above embodiments, the resistor is not limited to a specific device form. For example, it is not limited to being a thin-film or thick-film resistor, a surface-mount or plug-in resistor. Additionally, the resistor is not limited to being a pure resistor. It can be a composite device with a positive resistance value included in other devices, such as an inductor device with parasitic positive resistance, etc. The characteristic impedance of this circuit system is not limited to the common 50R, 75R, 200R, and can also be a circuit system with other characteristic impedance values.

[0085] Next, the working principle of the embodiments of the present utility model will be described.

[0086] (1) Examples of amplifiers in a non-absolutely stable state (10 - 20 GHz, StabFact1 ≤ 1)

[0087] As Figure 3 shown, where it is an amplifier IC. After being measured by a vector network analyzer, an S-parameter file S3P characterizing its radio frequency performance is extracted (here only the performance parameters from DC to 20 GHz are extracted, which is sufficient for problem analysis). Then it is placed in the EDA tool ADS (Advanced Design System, from Agilent Technologies), and its power gain (dB(S21)), the real part of the input impedance Zin1, the real part of the output impedance Zin2, and the stability factor StabFact are read. Figure 3 In [the figure], TermG1 and TermG2 are the input port and output port respectively.

[0088] Figure 4 corresponds to Figure 3From the simulation results of the circuit, it can be seen that the peak gain of this amplifier IC is 33.573 dB (@2.388 GHz), and it has a positive gain in a relatively wide frequency domain, which can be flexibly designed as a gain IC for application in different frequency bands. However, in the range of 10G - 20GHz, it is in a non-absolutely stable state, that is, the stability factor gradually changes from StabFact1>1 to StabFact1 = 0, and then StabFact1<0.

[0089] Figure 4 The left figure in [reference] is a simulation example of the gain (taking dB(S21) as an example). Figure 4 The right figure in [reference] includes three curves, such as Figure 4 Curves ① - ③ in [reference]. Among them, curve ① is the stability factor curve, and the corresponding vertical coordinate is the stability factor; curve ② is the curve of the real part of the input complex impedance Real(Zin1), and the corresponding vertical coordinate is the real part of the input complex impedance Real(Zin1); curve ③ is the curve of the real part of the output complex impedance Real(Zin2), and the corresponding vertical coordinate is the real part of the output complex impedance Real(Zin2); in addition, Figure 4 m1 - m4 in [reference] are the simulation results corresponding to different frequencies.

[0090] Figure 4 The simulation results are as follows:

[0091] m1: f = 2.388 GHz, dB(S21) = 33.573;

[0092] m2: f = 200.0 MHz, dB(S21) = 10.86;

[0093] m3: f = 6.327 GHz, dB(S21) = 9.976;

[0094] m4: f = 10.0 GHz, StabFact1 = 0.167, Real(Zin1) = 65.519, Real(Zin2) = -0.108.

[0095] Subsequently Figure 6 、 Figure 8 、 Figure 10 、 Figure 12 The meanings of the curves and coordinates in [reference] are all similar to those in Figure 4 Similar.

[0096] Generally, an amplifier can be designed to operate in a lower frequency band. However, the spectral shifting effect caused by the non-linearity of active devices may result in out-of-band spurs or out-of-band spurious intermodulation products falling into the band. Therefore, the amplifier also has requirements for out-of-band performance. For example, we can require that the amplifier is absolutely stable (StabFact1 > 1) in the range of DC to 20 GHz (specifically, please follow the technical specification requirements corresponding to the application). Since the operating frequency band of the amplifier is in the lower frequency band, it is generally absolutely stable. Here, it describes how to optimize the non-absolutely stable state (StabFact1 ≤ 1) of this amplifier in the range of 10G - 20GHz to an absolutely stable state (StabFact1 > 1) through the circuit provided by the present utility model.

[0097] Input impedance: It refers to the impedance seen from the input pin pin1 of the amplifier device.

[0098] Output impedance: It refers to the impedance seen from the output pin pin2 of the amplifier device.

[0099] It can be seen that in the range of 10G - 20GHz, although the real part of the complex input impedance of the amplifier real(Zin1) > 0 (@10G~20GHz), the real part of the complex output impedance of the amplifier real(Zin2) < 0 (@10G~20GHz). Eventually, StabFact1 ≤ 1, and it is in a non-absolutely stable state.

[0100] As described above, as the frequency increases, the amplifier transitioning from stable to unstable is a typical process, corresponding to its stability factor changing from >1 to =0 to <0, and the output impedance changing from >0, to =0 to <0. There is no case where it does not cross zero. We study the extension of amplifier stability to higher frequency domains based on this.

[0101] It only needs to connect a negative resistance cancellation resistor circuit in parallel at the output of the amplifier and a zero resistance cancellation resistor circuit in series.

[0102] (2) Place a parallel negative resistance cancellation resistor circuit at the output of the non-absolutely stable amplifier to improve stability

[0103] As Figure 5 shown, only place a parallel negative resistance cancellation resistor circuit (corresponding to the aforementioned second negative resistance cancellation sub-circuit) at the output end of the amplifier, Figure 6 which is Figure 5 a schematic diagram of the simulation result corresponding to the circuit.

[0104] Figure 6 The simulation results of

[0105] m1 are as follows: f = 2.297 GHz, dB(S21) = 29.776;

[0106] m2: f = 200.0 MHz, dB(S21) = 6.839;

[0107] m3: f = 6.327 GHz, dB(S21) = 7.893;

[0108] m4: f = 10.0 GHz, StabFact1 = 0.169, Real(Zin1) = 65.810, Real(Zin2) = -0.106.

[0109] From the simulation results, it can be seen that relative to Figure 4 , in the range of 10G - 20GHz, both real(Zin2) and StabFact1 have been improved, and the stability has been improved. However, absolute stability has not been achieved near 10GHz (still not meeting StabFact > 1). It can be observed that these two parameters have a state of = 0 near 10GHz.

[0110] (3) Based on the above (2), continue to place a series zero - resistance cancellation resistor circuit to further improve broadband stability

[0111] As Figure 7 shown in the amplifier circuit, first connect a negative - resistance cancellation resistor circuit in parallel at the amplifier output, and then connect a series zero - resistance cancellation resistor circuit (corresponding to the aforementioned second zero - resistance cancellation sub - circuit). Figure 8 is Figure 7 the corresponding simulation result example diagram of the circuit. This time, from the simulation results, it can be seen that the real part of the output complex impedance in the range of 10G - 20GHz is all > 0, and the corresponding StabFact1 is also all > 1, in an absolutely stable state. This step solves the problem in the above (2).

[0112] Figure 8 The partial simulation results of

[0113] m1: f = 2.356 GHz, dB(S21) = 25.434;

[0114] m2: f = 200.0 MHz, dB(S21) = 2.291;

[0115] m3: f = 6.327 GHz, dB(S21) = 2.907;

[0116] m4: f = 10.0 GHz, StabFact1 = 202.101, Real(Zin1) = 65.666, Real(Zin2) = 49.894.

[0117] (4) In the case of only placing a series zero - resistance cancellation resistor circuit at the output of a non - absolutely - stable amplifier

[0118] As Figure 9 shown, only a series zero-resistance cancellation resistor circuit is placed at the output of the non-absolutely stable amplifier, Figure 10 which is Figure 9 an example diagram of the simulation results corresponding to the circuit. The StabFact1 of the amplifier has also been greatly improved in the range of 10G - 20GHz. However, at frequencies ≥20GHz, the real part of the output complex impedance real(Zin2) and the stability factor StabFact1 gradually deteriorate. In terms of the degree of improvement of the stability factor, it is not as good as the above (3), but the power loss is smaller than that of (2). Therefore, the negative-resistance cancellation resistor circuit and the zero-resistance cancellation resistor circuit can be used alone or in combination, and the specific scheme can be considered according to the needs of stability and gain with a trade-off.

[0119] Figure 10 Some of the simulation results are as follows:

[0120] m1: f = 2.434GHz, dB(S21) = 30.394;

[0121] m2: f = 200.0MHz, dB(S21) = 6.298;

[0122] m3: f = 6.327GHz, dB(S21) = 4.944;

[0123] m4: f = 10.0GHz, StabFact1 = 201.762, Real(Zin1) = 65.369, Real(Zin2) = 49.892.

[0124] (5) The case of series-then-parallel at the output of the non-absolutely stable amplifier

[0125] As Figure 11 shown, a zero-resistance cancellation resistor circuit is first connected in series at the amplifier output, and then a negative-resistance cancellation resistor circuit is connected in parallel. Figure 12 This is Figure 11 an example diagram of the simulation results corresponding to the circuit. According to the simulation results, the difference between series-then-parallel and parallel-then-series is not particularly significant, and the effects are similar. It can be flexibly selected according to the convenience of circuit layout or other considerations.

[0126] Figure 12 Some of the simulation results are as follows:

[0127] m1: f = 2.401GHz, dB(S21) = 25.812;

[0128] m2: f = 200.0MHz, dB(S21) = 1.967;

[0129] m3: f = 6.327 GHz, dB(S21) = 1.106;

[0130] m4: f = 10.0 GHz, StabFact1 = 403.694, Real(Zin1) = 65.420, Real(Zin2) = 24.973.

[0131] It should be noted that Figures 5 - 12 it takes the case where the real part of the output impedance is negative or 0 as an example, that is, an output stability circuit is added at the output end of the amplifier to improve the stability of the amplifier; when the real part of the input impedance of the amplifier is negative or 0, a similar method as above is also used to add an input stability circuit to improve the stability of the amplifier.

[0132] (6) Value range of the real part of the complex impedance of the negative resistance cancellation resistor circuit

[0133] The series and parallel resistance values generally take Z0 to balance the gain and stability factor.

[0134] When Z0 takes other positive real values, the results of the gain and stability factor are in the order of magnitude between the two cases of taking Z0 and having no stability circuit.

[0135] The specific combination scheme of the stability circuit can be selected according to the specific reason for instability (whether the real part of the input or output impedance is positive, negative or 0).

[0136] Optionally, for example, if the amplifier is unstable due to the real part of the input complex impedance <0, then a suitable negative resistance cancellation resistor circuit can be placed only at the input of the amplifier. Another example is that if the amplifier is unstable because the real part of the output complex impedance ≤0, then only a combination of a parallel negative resistance cancellation resistor circuit and a series zero resistance cancellation resistor circuit needs to be placed at the output end of the amplifier, and there is no order limit for placing the parallel sub-circuit and the series sub-circuit.

[0137] Through the embodiments of the present invention, it is possible to expand the stability of the amplifier to a higher frequency domain, so that the amplifier can also work stably in a higher frequency domain; or in other words, the amplifier can obtain a wider frequency domain stability.

[0138] In the above embodiments, the descriptions of each embodiment have their own emphases. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0139] The technical means disclosed by the present invention are not limited to the technical means disclosed in the above embodiments, but also include technical solutions composed of any combination of the above technical features.

[0140] The above are only exemplary embodiments of the present disclosure, and the scope of the present disclosure cannot be limited thereby. That is, any equivalent changes and modifications made in accordance with the teachings of the present disclosure still fall within the scope covered by the present disclosure. After considering the specification and the disclosure of the practical truth, those skilled in the art will readily conceive of other implementation manners of the present disclosure.

[0141] The present utility model aims to cover any variations, uses or adaptive changes of the present disclosure, which follow the general principles of the present disclosure and include the common general knowledge or conventional technical means in the technical field not recorded in the present disclosure.

Claims

1. An amplifier circuit system, characterized in that, Comprising: An amplifier circuit and a stabilization circuit, where the stabilization circuit includes an input stabilization circuit and / or an output stabilization circuit, and wherein, The input stabilization circuit is connected between the input port and the input terminal of the amplifier circuit, and the output stabilization circuit is connected between the output terminal of the amplifier circuit and the output port, where the amplifier circuit system includes the input port and the output port; The input stabilization circuit includes a first negative resistance cancellation sub-circuit and a first zero resistance cancellation sub-circuit, where the first negative resistance cancellation sub-circuit is configured to cancel the input impedance of the amplifier circuit when the real part of the input impedance of the amplifier circuit is less than zero, so that the real part of the input impedance of the amplifier circuit system is greater than zero, and the first zero resistance cancellation sub-circuit is configured to cancel the input impedance of the amplifier circuit when the real part of the input impedance of the amplifier circuit is equal to zero, so that the real part of the input impedance of the amplifier circuit system is greater than zero; The output stabilization circuit includes a second negative resistance cancellation sub-circuit and a second zero resistance cancellation sub-circuit, where the second negative resistance cancellation sub-circuit is configured to cancel the output impedance of the amplifier circuit when the real part of the output impedance of the amplifier circuit is less than zero, so that the real part of the output impedance of the amplifier circuit system is greater than zero, and the second zero resistance cancellation sub-circuit is configured to cancel the output impedance of the amplifier circuit when the real part of the output impedance of the amplifier circuit is equal to zero, so that the real part of the output impedance of the amplifier circuit system is greater than zero.

2. The amplifier circuit system according to claim 1, wherein, The first zero resistance cancellation sub-circuit is connected between the input port and the input terminal of the amplifier circuit, and the first negative resistance cancellation sub-circuit is connected between the input port and the ground terminal; Or, The first zero resistance cancellation sub-circuit is connected between the input port and the input terminal of the amplifier circuit, and the first negative resistance cancellation sub-circuit is connected between the input terminal of the amplifier circuit and the ground terminal.

3. The amplifier circuit system according to claim 1, wherein, The second zero resistance cancellation sub-circuit is connected between the output port and the output terminal of the amplifier circuit, and the second negative resistance cancellation sub-circuit is connected between the output port and the ground terminal; Or, The second zero resistance cancellation sub-circuit is connected between the output port and the output terminal of the amplifier circuit, and the second negative resistance cancellation sub-circuit is connected between the output terminal of the amplifier circuit and the ground terminal.

4. The amplifier circuit system according to claim 1, wherein, The real part of the complex impedance of the first zero resistance cancellation sub-circuit is greater than zero, and the real part of the complex impedance of the first negative resistance cancellation sub-circuit is greater than zero; And / or, The real part of the complex impedance of the second zero resistance cancellation sub-circuit is greater than zero, and the real part of the complex impedance of the second negative resistance cancellation sub-circuit is greater than zero.

5. The amplifier circuit system according to claim 1, wherein When the characteristic impedance of the amplifier circuit system is Z0, the impedance of the first zero resistance cancellation sub-circuit and the impedance of the first negative resistance cancellation sub-circuit are both equal to Z0; and / or The impedance of the second zero-resistance cancellation sub-circuit and the impedance of the second negative-resistance cancellation sub-circuit are both equal to Z0.

6. The amplifier circuit system according to claim 1, wherein The characteristic impedance of the output line of the amplifier circuit system is equal to one of the following: 50Ω, 75Ω, 200Ω.

7. The amplifier circuit system according to claim 1, wherein The first zero-resistance cancellation sub-circuit includes a first device, wherein the real part of the complex impedance of the first device is greater than zero; The first negative-resistance cancellation sub-circuit includes a second device, wherein the real part of the complex impedance of the second device is greater than zero.

8. The amplifier circuit system according to claim 7, characterized in that The first device is a pure positive-resistance device or an inductor device with a parasitic positive resistance; The second device is a pure positive-resistance device or an inductor device with a parasitic positive resistance.

9. The amplifier circuit system according to claim 1, wherein The second zero-resistance cancellation sub-circuit includes a third device, and the second negative-resistance cancellation sub-circuit includes a fourth device, wherein the real part of the complex impedance of the third device is greater than zero, and the real part of the complex impedance of the fourth device is greater than zero; The third device is a pure positive-resistance device or an inductor device with a parasitic positive resistance, and the fourth device is a pure positive-resistance device or an inductor device with a parasitic positive resistance.

10. The amplifier circuit system according to claim 1, characterized in that, The operating frequency of the amplifier circuit system is 0 - 20 GHz.

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