Low-cost circuit for realizing open-phase detection of frequency converter

By using the DC bus voltage detection circuit in the inverter to collect and compare the bus voltage ripple value, the problem of high circuit cost and complexity in the prior art is solved, and low-cost and low-complexity phase-loss detection is realized, which is suitable for small-power inverters.

CN223139718UActive Publication Date: 2025-07-22SUZHOU YIQU INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202421353325.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-06-14
Publication Date
2025-07-22
Estimated Expiration
2034-06-14

AI Technical Summary

Technical Problem

The input power phase-deficiency detection method of existing inverters increases the circuit cost and complexity, occupies a large PCB space, and is not suitable for the space limitations of small-power inverters.

Method used

The DC bus voltage detection circuit is used to detect phase loss by collecting and comparing the bus voltage ripple values in normal and phase-deficient states, and setting a calibrated bus ripple threshold, avoiding the use of hardware optocoupler detection circuit.

Benefits of technology

Low-cost and low-complex phase-loss detection is realized, saving space and not affected by load changes, and improving anti-interference ability and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a low-cost circuit for realizing open-phase detection of a frequency converter, which comprises a direct-current voltage input end, the direct-current voltage input end is connected with one end of a first resistor, the other end of the first resistor is connected with a second resistor, the other end of the second resistor is connected with a third resistor, and the other end of the third resistor is connected with a fourth resistor. The other end of the fourth resistor is connected with a fifth resistor, the other end of the fifth resistor is connected with a sixth resistor, the other end of the sixth resistor is connected with a grounding end, and the two ends of the sixth resistor are connected with a capacitor in parallel. According to the utility model, on the basis of realizing open-phase detection, the circuit cost and the complexity of hardware realization are reduced, the space is saved, the complexity of software realization is also reduced, the influence of load change is avoided, the anti-interference capability is strong, and safety and reliability are realized.
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Description

Technical Field

[0001] The utility model relates to a circuit for realizing open - phase detection of a frequency converter at low cost. Background Art

[0002] Frequency converters have been widely used in the industrial field. When a frequency converter inputs a three - phase power supply, the stability of the power supply is crucial for the operation of the frequency converter. Therefore, the input power open - phase protection function has become one of the most basic protection functions of the frequency converter.

[0003] Traditional methods for detecting open - phase of the input power supply use a hardware circuit for detection. Optocouplers are connected between two of the three phases A, B, and C of the input power supply. When all three - phase power supplies are connected and there is no open - phase, pulses will be output after passing through the optocouplers for all three phases; if any one of the input power supply phases is open - phase, it will cause the optocoupler not to conduct, and at the same time, no pulse signal will be output on the output side of the optocoupler. Therefore, by detecting whether there is a pulse signal output on the output side of the three optocouplers, it is used to detect whether the three - phase input is open - phase.

[0004] Although this method can effectively detect whether the input power supply is open - phase, it increases the circuit cost and complexity, occupies a large PCB space. Especially for small - power frequency converters with small volume, saving space is particularly valuable. Summary of the Utility Model

[0005] The purpose of the utility model is to provide a circuit for realizing open - phase detection of a frequency converter at low cost, which reduces the circuit cost and the complexity of hardware implementation on the basis of realizing open - phase detection, saves space, and at the same time reduces the complexity of software implementation, is not affected by load changes, has strong anti - interference ability, and is safe and reliable.

[0006] The technical solution for realizing the above purpose is as follows:

[0007] A circuit for realizing open - phase detection of a frequency converter at low cost includes: a DC voltage input terminal, one end of the DC voltage input terminal is connected to one end of a first resistor, the other end of the first resistor is connected to a second resistor, the other end of the second resistor is connected to a third resistor, the other end of the third resistor is connected to a fourth resistor, the other end of the fourth resistor is connected to a fifth resistor, the other end of the fifth resistor is connected to a sixth resistor, the other end of the sixth resistor is connected to a ground terminal, and a capacitor is connected in parallel across the two ends of the sixth resistor.

[0008] Preferably, a test point terminal is connected between the fifth resistor and the sixth resistor.

[0009] Preferably, the test point terminal is set with a calibrated bus ripple threshold value.

[0010] The beneficial effects of the present utility model are as follows: When the frequency converter is operating normally, the present utility model collects the DC bus voltage ripple through the test point end, records this value as the bus ripple value during normal operation, then records the bus voltage ripple value in the phase-loss state, records this value as the bus ripple value in the phase-loss state, then calculates the median value between these two values, and records this value as the calibrated bus ripple detection threshold; In the normal operating state, the bus ripple value is below the threshold. In the phase-loss state, the bus ripple value will be higher than the calibrated bus ripple threshold. The calibrated bus ripple threshold is used as the key value to determine whether there is a phase loss input, so as to detect whether there is a phase loss input; This circuit does not require an additional hardware phase-loss detection circuit, which reduces the usage cost, also reduces the complexity of software and hardware, and saves the PCB usage space. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a schematic diagram of a circuit for low-cost implementation of phase-loss detection in a frequency converter of the present utility model. DETAILED IMPLEMENTATION MANNER

[0012] The technical solutions of the present utility model will be clearly and completely described below in conjunction with the accompanying drawings. In the description of the present utility model, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present utility model. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0013] The present utility model will be further described below in conjunction with the accompanying drawings.

[0014] In industrial applications of frequency converters, the detection of the DC bus voltage is essential. Therefore, when designing the hardware circuit of the frequency converter, there is originally a DC bus voltage detection circuit. The present utility model utilizes the original DC bus voltage acquisition hardware circuit to achieve phase-loss detection.

[0015] Such as Figure 1As shown in the figure, a circuit for a frequency converter to achieve open-phase detection at low cost includes: a DC voltage input terminal DC. The DC voltage input terminal DC is connected to one end of a first resistor R70. The other end of the first resistor R70 is connected to a second resistor R75. The other end of the second resistor R75 is connected to a third resistor R80. The other end of the third resistor R80 is connected to a fourth resistor R85. The other end of the fourth resistor R85 is connected to a fifth resistor R90. The other end of the fifth resistor R90 is connected to a sixth resistor R95. The other end of the sixth resistor R95 is connected to a ground terminal GND. A capacitor C58 is connected in parallel across the two ends of the sixth resistor R95.

[0016] In the embodiment, a test point terminal TP7 is connected between the fifth resistor R90 and the sixth resistor R95.

[0017] In the embodiment, the test point terminal TP7 is set with a calibrated bus ripple threshold.

[0018] Working principle:

[0019] In this utility model, the DC bus voltage ripple is collected through the test point terminal TP7 when the frequency converter is working normally, and this value is recorded as the bus ripple value during normal operation. Then, the bus voltage ripple value in the open-phase state is recorded, and this value is recorded as the bus ripple value in the open-phase state. Then, the median between these two values is calculated and recorded as the calibrated bus ripple detection threshold. In the normal working state, the bus ripple value measured by the test point terminal TP7 is below the threshold. In the open-phase state, the bus ripple value measured by the test point terminal TP7 will be higher than the calibrated bus ripple threshold. The calibrated bus ripple threshold is used as the key value to judge whether there is an open-phase input, so as to detect whether there is an open-phase input.

[0020] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A circuit for low-cost implementation of open-phase detection in a frequency converter, characterized in that, Comprising: A DC voltage input terminal (DC), the DC voltage input terminal (DC) is connected to one end of a first resistor (R70), the other end of the first resistor (R70) is connected to a second resistor (R75), the other end of the second resistor (R75) is connected to a third resistor (R80), the other end of the third resistor (R80) is connected to a fourth resistor (R85), the other end of the fourth resistor (R85) is connected to a fifth resistor (R90), the other end of the fifth resistor (R90) is connected to a sixth resistor (R95), the other end of the sixth resistor (R95) is connected to a ground terminal (GND), and a capacitor (C58) is connected in parallel across the two ends of the sixth resistor (R95).

2. The circuit for realizing open-phase detection with low cost in an inverter according to claim 1, wherein A test point terminal (TP7) is connected between the fifth resistor (R90) and the sixth resistor (R95).

3. A circuit for low-cost implementation of open-phase detection in an inverter according to claim 1, characterized in that, The test point terminal (TP7) is set with a calibrated bus ripple threshold.