TO pin short circuit test circuit

Abstract

The utility model discloses a TO pin short circuit test circuit, which is divided into four parts: a product power-up loop; a voltage comparison circuit; a comprehensive judgment circuit; and a result display circuit. The utility model has the technical effects and advantages that: 1, the detection circuit is simple, conventional devices are used, the number of the devices is small, the cost is low, and only one 5V power supply is required to work; 2, the detection function is strong, whether all pins are short-circuited with the GND or not can be detected, whether the pins are short-circuited or not can also be detected, and whether basic electrical characteristics of the LD and the PD are normal or not can be detected; and 3, the efficiency is high, and the result can be obtained in one second only by loading the loaded product on the test equipment. 4, automatic judgment and alarm functions are provided, and the green light is automatically turned on if the test is qualified; and if the test is unqualified, automatically turning on a red lamp.

Description

Technical Field

[0001] The utility model relates to the technical field of optoelectronic diode production, and more specifically to a TO pin short-circuit test circuit. Background Art

[0002] In the field of optical communication LD TO production, an LD (semiconductor laser) with a PD (photodetector) is commonly used. The LD and the PD are packaged in a TO (Transistor Outline, a category of packaging specifications for transistors and small-scale integrated circuits). The PD chip is used to detect the light emission intensity of the LD.

[0003] There is a process step in the production process to detect whether the pins of the TO are short-circuited with each other or have a ground short after packaging. The conventional method is to use a manual multimeter to measure the resistance for detection. This method:

[0004] 1) Low efficiency;

[0005] 2) High cost;

[0006] 3) Not suitable for mass production;

[0007] 4) There are also circuits used for detection, but generally they can only detect whether each pin is short-circuited with the GND, and cannot detect whether the basic characteristics are normal.

[0008] Conclusion: General methods are either low in efficiency and high in cost, or cannot further detect comprehensively. Content of the Utility Model

[0009] In order to overcome the above defects of the prior art, the utility model provides a TO pin short-circuit test circuit. The present invention solves the following problems when detecting such TOs:

[0010] 1. In addition to having the basic function of detecting whether each pin is short-circuited with the GND, it also has the following functions;

[0011] 2. Detect whether there is a short circuit between each pair of pins;

[0012] 3. Detect whether the basic electrical characteristics of the LD and the PD are normal;

[0013] The technical solution of the utility model is as follows:

[0014] A TO pin short-circuit test circuit, comprising:

[0015] Product power-on circuit: The input circuit using +5V, PTC type current-limiting fuse FUSE, diode D1, and diode D2 are connected in series to form a current-limiting voltage-dividing circuit; diode D2 is respectively connected to voltage-limiting diode D3, resistor R1, and PIN1 pin; the voltage-limiting diode D3 is connected to voltage-limiting diode D4, and voltage-limiting diode D4 is respectively connected to PI2 pin and resistor R2; resistor R2 is respectively connected to resistor R3 and PIN4 pin; resistor R3 is connected to PIN3 pin.

[0016] Voltage comparison circuit: A four-op amp circuit is used as the voltage comparator. Voltage comparator one is connected to PIN1 pin and PIN2 pin to compare the voltage across LD. A Schottky diode D5 with a forward voltage drop of 0.2V is connected to the LD+ terminal; voltage comparator two is connected to PIN2 pin and PIN3 pin to compare the voltages of PD+ and LD-; voltage comparator three is connected to PIN1 pin and PIN3 pin to compare the voltages of PD- and PD+. A Schottky diode D6 with a forward voltage drop of 0.2V is connected to the PD- terminal; voltage comparator four is connected to PIN3 pin and GND to compare the voltage between PD+ and GND.

[0017] Comprehensive judgment circuit: Three AND gates are used as the judgment circuit. Signal OUT1 and signal OUT2 are output to AND gate U2C through AND gate U2A. Signal OUT3 and signal OUT4 are also output to AND gate U2C through AND gate U2B. U2C generates an OUT signal.

[0018] Result display circuit: Receiving the OUT signal from U2C, resistor R7, green light-emitting diode GREEN, triode Q1, and current-limiting resistor R5 form a display circuit when the product is qualified; resistor R8, red light-emitting diode RED, triode Q2, and current-limiting resistor R6 form a display circuit when the product is unqualified.

[0019] When TO is working normally, the output terminals OUT1 / OUT3 / OUT2 / OUT4 corresponding to voltage comparator one, voltage comparator two, voltage comparator three, and voltage comparator four are all at high level.

[0020] The triode Q1 is of NPN type and the triode Q2 is of PNP type.

[0021] The resistance values of resistor R2 and resistor R3 are different, so that the voltages of each pin during normal operation are different, and the order from high to low is: VPIN1>VPIN2>VPIN3>VPIN4.

[0022] The technical effects and advantages of the present utility model:

[0023] 1. The detection circuit is simple, uses conventional devices, has few devices, low cost, and only needs to be configured with a 5V power supply to work.

[0024] 2. Strong detection function, which can not only detect whether all pins are short-circuited with GND, but also detect whether there is a short circuit between pins, and simultaneously detect whether the basic electrical characteristics of LD and PD are normal.

[0025] 3. It has an automatic judgment and alarm function. When the test is qualified, the green light will light up automatically; when the test is unqualified, the red light will light up automatically. Description of the Drawings

[0026] Figure 1 is a circuit block diagram;

[0027] Figure 2 is a schematic diagram of the power-on circuit of the product;

[0028] Figure 3 is a schematic diagram of the voltage comparison circuit;

[0029] Figure 4 is a schematic diagram of the comprehensive judgment circuit;

[0030] Figure 5 is a schematic diagram of the result display circuit;

[0031] Figure 6 is a common LD TO schematic diagram. Detailed Implementation Manner

[0032] Next, the technical solutions in the embodiments of the present invention will be described clearly and completely. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0033] The patent of the present invention relates to one of the most common TOs, such as Figure 6 , the PIN1 pin is the LD + power input. The PIN2 pin is LD-. At the same time, the PIN1 pin is PD-, and since the PD is reverse-biased when powered on, the PD- is also the power input terminal of the PD. The PIN3 pin is PD +, which is the PD power output terminal. The PIN4 pin is connected to the case (CASE), and during the test, it is connected to the GND of the power supply to facilitate detecting whether there is a short circuit.

[0034] Such as Figure 1 shown, a TO pin short-circuit test circuit is divided into four parts: 1. Product power-on circuit; 2. Voltage comparison circuit; 3. Comprehensive judgment circuit; 4. Result display circuit.

[0035] I. Product power-on circuit, such as Figure 2As described above, this circuit uses a +5V input circuit. The PTC type current-limiting fuse FUSE, diodes D1, and D2 form a current-limiting and voltage-dividing circuit to ensure that the maximum input voltage and current at the LD+ and PD- of PIN1 of the product are within the rated range of the product. D3 and D4 are two voltage-limiting diodes to further ensure that the voltage across the two ends of the LD (LD+LD-) is within the maximum allowable input voltage range of the LD. R1 plays a role in discharging to ensure that the level of LD+ is GND when there is no 5V input. R2 is connected to the input end of the LD to raise the output voltage of LD- as a comparison voltage for a test point. R3 is to raise the output voltage of PD+. The values of R2 and R3 are determined according to the electrical characteristics of the LD and PD in the product, and their values need to ensure that under normal power supply, the voltage of PD+ is greater than 0 and less than the voltage of the LD- end.

[0036] For example, select R2 as 100Ω and R3 as 1000Ω. D1, D2, D3, and D4 are all IN4007 (the forward conduction voltage drop is about 0.7V). When working with a 5V voltage, due to the voltage drop of D1 and D2 being about 1.4V, the voltage of PIN1 is about 3.6V. Since R2 is 100Ω, the working current of the working LD must be less than 36mA. Because D3 and D4 are in series and then in parallel with the LD, and their forward conduction voltage drop is about 1.4V, the maximum voltage drop across the LD is limited to 1.4V, protecting the LD chip. At this time, when ensuring the normal operation of the LD, the voltage drop of the LD is between 0.7V and 1.4V, then the voltage of PIN2 is about 2.2V - 2.9V;

[0037] The working current of the PD is generally less than 0.1mA. The resistance value of R3 is 1000Ω, so the voltage drop of R3 is less than 1.0V. Therefore, the voltage of PIN3 is less than or equal to 1.0V and greater than 0V; The grounding of PIN4 is 0V.

[0038] In short, according to the product, the resistance values of R2 and R3 can be set to ensure that when the TO works normally, the voltage of the LD+ / PD- end is greater than the voltage of the LD- end, the voltage of the LD- end is greater than the voltage of the PD+ end, and the voltage of the PD+ end is greater than GN (0V), that is, VPIN1 > VPIN2 > VPIN3 > VPIN4.

[0039] II. Voltage comparison circuit, as Figure 3 shown, a common four-op amp circuit is used as a voltage comparator. According to the forward conduction characteristic of the LD, its threshold voltage is about 0.6. The voltage comparator 1 is used to compare the voltage across the LD. A Schottky diode D5 with a forward voltage drop of 0.2V is connected in the sampling at the LD+ end. Only when LD+ is greater than LD- by 0.2V, the output of the voltage comparator 1 is high level, otherwise it is low level.

[0040] The voltage comparator two is used to compare the voltages of PD+ and LD-. In the power-on circuit of the product, the resistances of R2 and R3 have been set according to the product characteristics. Under normal conditions, the voltage at the LD- terminal will definitely be greater than the voltage at the PD+ terminal. Therefore, under normal conditions, the output of the voltage comparator two is high level, otherwise it is low level.

[0041] The voltage comparator three is used to compare the voltages of PD- and PD+. According to the general characteristics of PD, the threshold voltage of common PD is about 0.5V. The voltage comparator three is used for voltage comparison across PD. A Schottky diode D6 with a forward voltage drop of 0.2V is connected in the sampling of the PD- terminal. Only when PD- is greater than PD+ by 0.2V, the output of the voltage comparator three is high level, otherwise it is low level.

[0042] The voltage comparator four is used to compare between PD+ and GND. During normal operation, the current of PD passes through R3 to ground. When there is current flowing, the voltage of PD+ is greater than GND, and the output of the voltage comparator four is high level, otherwise it is low level.

[0043] Therefore, when TO is operating normally, the outputs OUT1 / OUT3 / OUT2 / OUT4 of the voltage comparators one / two / three / four are all high level.

[0044] III. Comprehensive judgment circuit, such as Figure 4 As described above, three AND gates are used as the judgment circuit. The signals OUT1 and OUT2 pass through the AND gate U2A and are output to the AND gate U2C. OUT3 and OUT4 also pass through the AND gate U2B and are output to the AND gate U2C. U2C generates an OUT signal. Only when OUT1 / OUT2 / OUT3 / OUT4 are all high level, the OUT signal is also high level at this time. Otherwise, OUT is low level.

[0045] The above description is only the preferred embodiment of the present invention and is not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

[0046] IV. Result display circuit, such as Figure 5 As shown, light-emitting diodes are used to display the test results. It consists of R7, the green light-emitting diode GREEN, the NPN-type triode Q1, and the current-limiting resistor R5 to form the display circuit when the product is qualified. It consists of R8, the red light-emitting diode RED, the PNP-type triode Q2, and the current-limiting resistor R6 to form the display circuit when the product is unqualified.

[0047] When the product is qualified, the OUT signal is at a high level, driving the triode Q1 to conduct, and the green light-emitting diode GREEN is lit. At the same time, since the OUT signal is at a high level, the PNP-type triode Q2 does not conduct, and RED will not be lit. On the contrary, when the product is unqualified, OUT is at a low level. At this time, Q2 conducts, and the red light-emitting diode RED is lit.

Claims

1. A TO pin short - circuit test circuit, comprising: Product power - on circuit: An input circuit using +5V, a PTC - type current - limiting fuse FUSE, diodes D1 and D2 are connected in series to form a current - limiting and voltage - dividing circuit; diode D2 is respectively connected to a voltage - limiting diode D3, a resistor R1, and PIN1; the voltage - limiting diode D3 is connected to a voltage - limiting diode D4, and the voltage - limiting diode D4 is respectively connected to PI2 and resistor R2; resistor R2 is respectively connected to resistor R3 and PIN4; resistor R3 is connected to PIN3. Voltage comparison circuit: A four - operational - amplifier circuit is used as a voltage comparator. The first voltage comparator is connected to PIN1 and PIN2 to compare the voltages at both ends of LD. A Schottky diode D5 with a forward voltage drop of 0.2V is connected to the LD + terminal; the second voltage comparator is connected to PIN2 and PIN3 to compare the voltages of PD + and LD - ; the third voltage comparator is connected to PIN1 and PIN3 to compare the voltages of PD - and PD +. A Schottky diode D6 with a forward voltage drop of 0.2V is connected to the PD - terminal; the fourth voltage comparator is connected to PIN3 and GND to compare the voltage between PD + and GND. Comprehensive judgment circuit: Three AND gates are used as the judgment circuit. Signal OUT1 and signal OUT2 pass through AND gate U2A and are output to AND gate U2C. Signal OUT3 and signal OUT4 pass through AND gate U2B and are also output to AND gate U2C. U2C generates an OUT signal. Result display circuit: Receives the OUT signal from U2C. Resistor R7, green light - emitting diode GREEN, triode Q1, and current - limiting resistor R5 form a display circuit when the product is qualified; resistor R8, red light - emitting diode RED, triode Q2, and current - limiting resistor R6 form a display circuit when the product is unqualified.

2. The TO pin short - circuit test circuit according to claim 1, wherein: When the TO is working normally, the output terminals OUT1 / OUT3 / OUT2 / OUT4 corresponding to the first, second, third, and fourth voltage comparators are all at high level.

3. The TO pin short - circuit test circuit according to claim 1, wherein: The triode Q1 is of NPN type and the triode Q2 is of PNP type.

4. The TO pin short circuit test circuit according to claim 1, wherein: The resistance values of resistor R2 and resistor R3 are different, so that the voltages of each pin during normal operation are different, and the order from high to low is: VPIN1>VPIN2>VPIN3>VPIN4.

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