Array substrate, display device and electronic equipment
By covering the metal oxide layer in the non-display area of the array substrate to protect the source and drain metal wires, the problem of insufficient protection strength is solved, the risk of metal wire damage and corrosion is reduced, and the yield of the display device is improved.
Patent Information
- Application Number
- CN202422417804.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2034-09-30
AI Technical Summary
The protection strength of the source and drain metal wires in the non-display area of the array substrate in the organic film layer is insufficient, which is prone to damage, corrosion and disconnection, affecting the yield of the display device.
The first metal oxide layer is covered in the non-display area of the array substrate to protect the source and drain metal wires, prevent damage and water vapor invasion, and improve scratch resistance.
Reduce the risk of disconnection of source and drain metal wires and improve the yield of the display device.
Smart Images
Figure CN223157526U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of display technology, and particularly relates to an array substrate, a display device, and an electronic device. Background Art
[0002] On an array substrate, source-drain metal lines that are in the same layer as the source and / or drain of thin-film transistors in the display area are usually provided. The source-drain metal lines extend from the display area to the non-display area to realize the bonding of the source-drain metal lines and the driving chip when manufacturing a display device. An organic film layer is covered above the source-drain metal lines in the display area of the array substrate, and the organic film layer can play a role in protecting the source-drain metal lines. However, in the non-display area of the array substrate, a part of the organic film layer near the bonding position of the driving chip is usually removed, so that an organic film layer covered area and a non-organic film layer covered area are formed in the non-display area. The inventors found in the process of implementing this application that: on the source-drain metal lines in the non-organic film layer covered area, there are technical problems such as insufficient protection, easy damage or metal corrosion of the source-drain metal lines, and an increased risk of disconnection. Summary of the Invention
[0003] This application provides an array substrate, a display device, and an electronic device, aiming to better protect the source-drain metal lines in the non-organic film layer covered area in the non-display area of the array substrate.
[0004] In a first aspect, an embodiment of this application provides an array substrate, including a substrate, source-drain metal lines, and a first metal oxide layer. Among them, the source-drain metal lines are formed on the substrate and extend from the display area to the non-display area. The source-drain metal lines in the non-display area include an organic film layer covered area and a non-organic film layer covered area. The first metal oxide layer covers above the source-drain metal lines in the non-organic film layer covered area.
[0005] In some embodiments, the array substrate further includes a passivation layer and an organic film layer. The passivation layer covers above the first metal oxide layer, and the organic film layer covers above the passivation layer in the organic film layer covered area.
[0006] In some embodiments, the first metal oxide layer extends to cover the source-drain metal lines in the organic film layer covered area.
[0007] In some embodiments, the projection edge of the first metal oxide layer on the substrate is greater than or equal to 1.65 μm away from the projection edge of the source-drain metal lines on the substrate.
[0008] In some embodiments, an opening area is formed on the passivation layer in the non-organic film layer covered area, and the opening area exposes the first metal oxide layer.
[0009] In some embodiments, thin film transistors are further formed in the display area of the array substrate, and the source-drain metal lines are arranged in the same layer as the source and / or drain electrodes of the thin film transistors.
[0010] In some embodiments, the source-drain metal lines include data lines.
[0011] In some embodiments, a first display electrode is further formed in the display area of the array substrate. The first display electrode is electrically connected to the drain electrode of the thin film transistor and is arranged in the same layer as the first metal oxide layer.
[0012] In some embodiments, the array substrate further includes a second metal oxide layer, which is formed above the organic film layer in the non-display area and covers the edge of the organic film layer.
[0013] In some embodiments, a second display electrode is further formed in the display area. The second display electrode is arranged in the same layer as the second metal oxide layer.
[0014] In a second aspect, an embodiment of the present application further provides a display device, including the array substrate mentioned in some of the above embodiments.
[0015] In some embodiments, the display device further includes a color filter substrate disposed opposite to the array substrate.
[0016] In some embodiments, an opening area is formed on the passivation layer in the area not covered by the organic film layer on the array substrate. The display device further includes a conductive adhesive and a driving chip. The conductive adhesive covers the above opening area, and the driving chip is electrically connected to the source-drain metal lines through the conductive adhesive.
[0017] In some embodiments, the conductive adhesive covers the edge of the second metal oxide layer on the array substrate. The display device further includes an isolation protection adhesive, which covers at least a part of the second metal oxide layer on the above array substrate and the edge of the conductive adhesive.
[0018] In a third aspect, an embodiment of the present application further provides an electronic device, including the display device mentioned in some of the above embodiments in the second aspect.
[0019] The array substrate provided by the embodiment of the present application covers a first metal oxide layer on the source-drain metal lines in the non-display area of the array substrate. The first metal oxide layer can protect the source-drain metal lines, prevent damage to the source-drain metal lines during subsequent plasma processing or pressing, avoid the risk of water vapor intrusion, thereby avoiding metal corrosion, and improve the scratch resistance of the non-organic film layer covered area. All of these can reduce the risk of disconnection of the source-drain metal lines, thereby improving the yield of the display device manufactured using the array substrate. The embodiment of the present application further provides a display device and an electronic device, both of which use the above-mentioned array substrate and have the same beneficial effects as the above-mentioned array substrate, which will not be elaborated here.
[0020] Additional aspects and advantages of the present application will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The above and / or additional aspects and advantages of the present application will become apparent and be readily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0022] Figure 1 is a top view schematic diagram of an array substrate in an embodiment of the present application;
[0023] Figure 2 is Figure 1 an enlarged schematic diagram of the non-display area of the shown array substrate;
[0024] Figure 3 is a cross-sectional schematic diagram of an array substrate in an embodiment of the present application;
[0025] Figure 4 is a cross-sectional schematic diagram of another array substrate in an embodiment of the present application;
[0026] Figure 5 is a cross-sectional schematic diagram of yet another array substrate in an embodiment of the present application;
[0027] Figure 6 is a structural schematic diagram of a display device in an embodiment of the present application;
[0028] Figure 7 is a structural schematic diagram of another display device in an embodiment of the present application;
[0029] Figure 8 is a structural schematic diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0030] Embodiments of the present application will be described in detail below. Examples of the embodiments are shown in the accompanying drawings, where like or similar reference numerals denote like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present application and should not be construed as a limitation to the present application.
[0031] The terms "first", "second", etc. in the description and claims of the present application are used to distinguish similar objects and are not used to describe a specific order or sequence. It should be understood that such used data may be interchanged under appropriate circumstances so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same category and do not limit the number of objects. For example, the first object may be one or more. In addition, "and / or" in the description and claims means at least one of the connected objects, and the character " / " generally indicates an "or" relationship between the associated objects before and after.
[0032] In the description of the present application, "a plurality of" means two or more.
[0033] In the description of this specification, the description referring to terms such as "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.
[0034] When describing some embodiments, the expressions "connected" and its derivatives may be used. The term "connected" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or integrated; it can be directly connected or indirectly connected through an intermediate medium. The term "electrically connected" indicates that two or more components have direct physical contact or electrical contact, and may also mean that two or more components have no direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content herein.
[0035] In addition, the use of "based on" means open and inclusive, because a process, step, calculation, or other action "based on" one or more of the stated conditions or values can in practice be based on additional conditions or values beyond the stated ones.
[0036] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or there can be an intermediate layer between the layer or element and the other layer or substrate.
[0037] Exemplary embodiments are described herein with reference to cross-sectional views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of regions are enlarged for clarity. Accordingly, variations in the shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Thus, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but include shape deviations caused by, for example, manufacturing. Accordingly, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shape of the regions of the device and are not intended to limit the scope of the exemplary embodiments.
[0038] Examples of the embodiments are shown in the drawings, where like or similar reference numerals designate like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only for explaining the present application and should not be construed as limiting the present application.
[0039] As described in the background art section, in the non-display area of the array substrate, part of the organic film layer is usually removed. When performing reliability evaluation on a display device made using this array substrate, it is found that product defects often occur in the non-organic film layer coverage area, such as vertical lines and squares. The main reason is that the source-drain metal lines in this non-organic film layer coverage area have open defects. On the one hand, this is caused by reasons such as plasma gas treatment or extrusion during the product manufacturing process; on the other hand, even if the organic film layer above the source-drain metal lines is removed, there is still a passivation layer. However, during the manufacturing process of the array substrate, for example, during the etching process of the metal oxide layer used as an electrode, the passivation layer may be damaged, or even the source-drain metal lines may be directly damaged. When the passivation layer is damaged, the protection of the source-drain metal lines by the passivation layer is insufficient. Especially in a high-temperature and high-humidity environment, water vapor is likely to enter, and then metal corrosion is likely to occur, leading to an increased risk of the source-drain metal lines being disconnected.
[0040] To this end, the present application provides an array substrate, and a first metal oxide layer is covered on the source-drain metal lines in the non-display area of the array substrate in the area not covered by the non-organic film layer. The first metal oxide layer can play a protective role for the source-drain metal lines, which can prevent the source-drain metal lines from being damaged during subsequent plasma processing or extrusion, and can also avoid the risk of water vapor intrusion, thereby avoiding metal corrosion. It can also improve the scratch resistance of the area not covered by the non-organic film layer. All of these can reduce the risk of the source-drain metal lines breaking, thereby improving the yield of the display device manufactured using the array substrate.
[0041] Figure 1 FIG. is a top view schematic diagram of an array substrate in an embodiment of the present application. Figure 2 is Figure 1 FIG. is a partial enlarged schematic diagram of the non-display area of the array substrate shown. In the embodiment of the present application, the improvement is mainly made to the setting of the protective layer above the source-drain metal lines in the non-display area of the array substrate. Therefore, Figure 1 and Figure 2 also mainly describes the array substrate in the non-display area. As Figure 1 and Figure 2 shown, the array substrate 1 includes a substrate substrate 11, and source-drain metal lines 12 and a first metal oxide layer 13 formed on the substrate substrate 11. The source-drain metal lines 12 extend from the display area AA to the non-display area BB, and the source-drain metal lines 12 in the non-display area BB include an organic film layer covered area BB1 and a non-organic film layer covered area BB2. The above-mentioned organic film layer covered area BB1 means that there will be an organic film layer covering above the source-drain metal lines 12, and the non-organic film layer covered area BB2 means that there will be no organic film layer covering above the source-drain metal lines. As described above, the source-drain metal lines 12 in the non-organic film layer covered area BB2 at this time have the defect of insufficient protection.
[0042] Therefore, in the embodiment of the present application, a first metal oxide layer 13 is provided, and the first metal oxide layer 13 covers the source-drain metal lines 12 in the non-organic film layer covered area BB2, so as to improve the protection of the source-drain metal lines 12 in this area. It can prevent the source-drain metal lines from being damaged during subsequent plasma processing or extrusion, and can also avoid the risk of water vapor intrusion, thereby avoiding metal corrosion. It can also improve the scratch resistance of the non-organic film layer covered area. All of these can reduce the risk of the source-drain metal lines 12 breaking, thereby improving the yield of the display device manufactured using the array substrate.
[0043] In some embodiments, a passivation layer 14 and an organic film layer 15 can also be provided on the array substrate 1. Figure 3 FIG. is a cross-sectional schematic diagram of an array substrate in an embodiment of the present application. As Figure 3As shown, a passivation layer 14 covers the first metal oxide layer 13, and in the organic film layer covering area BB1, an organic film layer 15 is further provided, which covers the passivation layer 14. The above-mentioned passivation layer 14 can be an inorganic insulating layer material, such as SiN and other materials, while the organic film layer 15 can be an organic insulating material layer. The above-mentioned passivation layer 14 and organic film layer 15 can play the roles of insulation and protection for the source-drain metal lines 12, avoiding the intrusion of water vapor. In addition, the organic film layer 15 can also play a planarization role.
[0044] In some embodiments, as described above Figure 3 As shown, in the non-organic film layer covering area BB2, a first metal oxide layer 13 covering the source-drain metal lines 12 is provided, and the first metal oxide layer 13 can also extend to cover the source-drain metal lines 12 in the organic film layer covering area BB1 to further enhance the protection of the source-drain metal lines 12.
[0045] In some embodiments, considering that in the manufacturing process of the array substrate, the first metal oxide layer 13 and the source-drain metal lines 12 are manufactured in two different manufacturing steps, and there may be a misalignment of the mask plates used in each manufacturing step. In order to enable the first metal oxide layer 13 to more accurately and comprehensively cover the source-drain metal lines 12, it can be set that the projection edge of the first metal oxide layer 13 on the substrate 11 is greater than or equal to 1.65 μm away from the projection edge of the source-drain metal lines 12 on the substrate 11. In this way, even if there is a misalignment problem during the manufacturing process of the array substrate, it can be ensured as much as possible that the first metal oxide layer 13 covers the source-drain metal lines 12 to avoid the existence of uncovered areas of the source-drain metal lines 12, which may easily lead to the risk of water vapor intrusion and further avoid the risk of metal corrosion.
[0046] In some embodiments, as described above Figure 3 As shown, an opening area 16 is formed on the passivation layer 14 in the non-organic film layer covering area BB2, and the opening area 16 can expose the above-mentioned first metal oxide layer 13, so that a driving chip can be provided above the opening area 16 subsequently. The driving chip can be electrically connected to the first metal oxide layer 13 and further electrically connected to the source-drain metal lines 12. In the embodiments of the present application, the source-drain metal lines 12 can be data lines, which are usually arranged on the same layer as the source and / or drain electrodes of the thin-film transistors in the display area of the substrate 11, and during the manufacturing process of the array substrate, the source-drain metal lines are also manufactured in the same manufacturing process as the source and / or drain electrodes of the thin-film transistors. Specifically, as Figure 4 shown Figure 4 is a cross-sectional schematic diagram of another array substrate in the embodiments of the present application, which is inFigure 3 Based on the illustrated embodiments, the film layer schematic of the display area AA of the array substrate 1 is added. Specifically, a plurality of pixel units are formed in the display area AA, and one or more thin film transistors 2 are formed in each pixel unit. The thin film transistor 2 includes a gate 21, and a source 22 and a drain 23. The source 22 and the drain 23 can be arranged in the same layer and are in the same layer as the source-drain metal line 12 in the non-display area BB. During the manufacturing process, they can be manufactured using the same mask plate in the same manufacturing step.
[0047] In Figure 4 In the illustrated embodiment, a first display electrode 24 is further formed in the display area AA of the array substrate 1. The first display electrode 24 is electrically connected to the drain 23 of the thin film transistor 2 and is arranged in the same layer as the above-mentioned first metal oxide layer 13. This enables the above-mentioned first metal oxide layer 13 and the first display electrode 24 to be manufactured synchronously in the manufacturing process, that is, they can be manufactured using the same mask plate in the same manufacturing step. Thus, without increasing the manufacturing steps of the array substrate, only the mask plate used for the first display electrode 24 needs to be modified, and the above-mentioned first metal oxide layer 13 can be formed in the non-display area of the array substrate. Therefore, the new array substrate structure provided in the embodiments of the present application does not require adding new manufacturing steps or increasing the use of mask plates.
[0048] Exemplarily, the materials of the source-drain metal line 12, the source 22, and the drain 23 include at least one of metal materials such as copper, aluminum, and molybdenum. During the process of forming the source 22 and the drain 23 in the display area AA, the source-drain metal line 12 is synchronously formed in the non-display area BB. The materials of the above-mentioned first metal oxide 13 and the first display electrode 24 include indium tin oxide (ITO). During the process of forming the first display electrode 24 in the display area AA, the first metal oxide 13 is synchronously formed in the non-display area BB. Thus, in the non-display area BB, the source-drain metal line 12 is covered by the first metal oxide 13, thereby reducing the risk of disconnection of the source-drain metal line 12 in subsequent manufacturing processes.
[0049] In some embodiments, as Figure 4 illustrated, a second metal oxide layer 18 may further be included on the array substrate. The second metal oxide layer 18 is formed above the organic film layer 15 in the non-display area BB and covers the edge of the organic film layer 15, that is, the second metal oxide layer 18 is closer to the edge of the array substrate than the organic film layer 15 and covers the edge of the organic film layer 15, thereby preventing water vapor and the like from entering below the organic film layer 15 at the edge position of the organic film layer 15.
[0050] In the embodiment of the present application, a second display electrode 25 may also be formed in the display area AA, and the second display electrode 25 may be disposed on the same layer as the second metal oxide layer 18. It may also be fabricated using the same mask plate in the same manufacturing step during the manufacturing process, so that without increasing the manufacturing steps of the array substrate, only the mask plate used for the second display electrode 25 needs to be modified, that is, the above-mentioned second metal oxide layer 18 can be formed in the non-display area BB of the array substrate 1. Therefore, in the embodiment of the present application, a new array substrate structure is provided without the need to add new manufacturing steps or increase the use of mask plates.
[0051] The technical solution provided by the embodiment of the present application can be applied to liquid crystal display technology. At this time, for the above-mentioned first display electrode 24 and second display electrode 25, they can be one of the pixel electrode and the common electrode respectively. In liquid crystal display technology, a passivation layer 14 and an organic film layer 15 can also be provided between the first display electrode 24 and the second display electrode 25 in the display area, and they are disposed on the same layer as the passivation layer 14 and the organic film layer 15 in the non-display area and are also fabricated in the same manufacturing process.
[0052] Alternatively, when the technical solution provided by the embodiment of the present application is applied to organic light-emitting display technology, the above-mentioned first display electrode 24 and second display electrode 25 can be one of the cathode and the anode respectively.
[0053] In the above Figure 4 shown embodiment of the present application, the thin-film transistor 2 is of the bottom-gate type. In the display area AA of the array substrate 1, the gate 21 of the thin-film transistor 2 is first fabricated on the substrate 11, and then a gate insulating layer 17 is formed above the gate 21. The gate insulating layer 17 extends from the display area to the non-display area, as Figure 4 shown, the gate insulating layer 17 is directly formed on the substrate 11, and the source-drain metal line 12 is formed on the gate insulating layer 17.
[0054] In some cases, it may also be a top-gate type thin-film transistor, as Figure 5 shown, Figure 5 is a cross-sectional schematic diagram of another array substrate in the embodiment of the present application. At this time, in the display area AA of the array substrate 1, the channel layer of the thin-film transistor 2 is first fabricated on the substrate 11, and then the gate 21 is formed. A gate insulating layer 17 is formed below the gate 21 and between the gate 21 and the channel layer of the thin-film transistor 2. At this time, the gate insulating layer 17 no longer extends to the non-display area, as Figure 5 shown, in the non-display area, the source-drain metal line 12 is formed on the substrate 11.
[0055] On the other hand, the embodiment of the present application also provides a display device.Figure 6 The following is a schematic structural diagram of a display device in an embodiment of the present application. As Figure 6 shown, the display device 300 includes the array substrate 1 described in some of the above embodiments. The display device 300 may be a liquid crystal display device or an organic light-emitting display device. The array substrate therein may be formed with a first metal oxide layer covering the source-drain metal lines in the non-organic film layer covering area of the non-display area as mentioned in the above embodiments, which plays a protective role for the source-drain metal lines, prevents damage to the source-drain metal lines during subsequent plasma processing or pressing processes, prevents water vapor from invading, avoids metal corrosion, and also improves the scratch resistance of the non-organic film layer covering area, reduces the risk of disconnection of the source-drain metal lines, and improves the yield rate of the display device.
[0056] Figure 7 The following is a schematic structural diagram of another display device in an embodiment of the present application. In this embodiment, a liquid crystal display device is taken as an example for illustration. In addition to the above-mentioned array substrate 1, the display device 300 further includes a corresponding color filter substrate 3. The two can be encapsulated into one body by a sealing glue 31, and a liquid crystal layer can be filled between the color filter substrate 3 and the array substrate 1.
[0057] As described in the above array substrate embodiment, an opening area 16 is formed on the passivation layer 14 in the non-organic film layer covering area BB2 on the array substrate 1, and the opening area 16 is mainly for arranging a driving chip. Therefore, as Figure 7 shown, in the embodiment of the present application, the display device 300 further includes a conductive adhesive 41 and a driving chip 42. The conductive adhesive 41 covers the above-mentioned opening area 16, and the driving chip 42 is electrically connected to the source-drain metal line 12 through the above-mentioned conductive adhesive 41. The above-mentioned conductive adhesive 41 may be an anisotropic conductive film (Anisotropic Conductive Film, abbreviated as ACF adhesive). The ACF adhesive is usually composed of a resin adhesive and conductive particles dispersed therein. The conductive particles may be microspheres or powders made of materials such as gold, silver, and nickel. The ACF adhesive has conductivity in the Z-axis direction perpendicular to the substrate 11, and shows good insulation in the XY plane. Thus, it can ensure that the signal provided by the driving chip 42 is accurately transmitted to the first metal oxide layer 13 along the direction perpendicular to the substrate 11, and further realizes the electrical connection with the source-drain metal line 12, while avoiding short-circuit phenomena in the horizontal direction parallel to the substrate 11.
[0058] In some embodiments, the above-mentioned conductive adhesive 41 may cover the edge of the second metal oxide layer 18 on the array substrate to further prevent water vapor from invading. The display device 300 may further include an isolation and protection adhesive 43, which covers at least a part of the second metal oxide layer 18 on the array substrate 1 and covers the edge of the conductive adhesive 41. The isolation and protection adhesive 43 and the conductive adhesive 41, the second metal oxide layer 18, and the organic film layer 15 are laminated and interleaved to effectively avoid the risk of water vapor invasion, thereby avoiding metal corrosion.
[0059] The material of the isolation and protection adhesive 43 may include a peelable protection adhesive, also known as Tuffy adhesive. Tuffy adhesive is a resin-based colloid that can be quickly cured and has a simple coating process. Moreover, Tuffy adhesive has low moisture permeability and water absorption, which can prevent water vapor from invading, protect the array substrate from moisture, and reduce the impact of the humid and hot environment on the product performance.
[0060] The above-mentioned conductive adhesive 41 and isolation and protection adhesive 43 have the relevant characteristics of organic materials, which can improve the scratch resistance of the non-display area. All of these can reduce the risk of disconnection of the source-drain metal lines 12, thereby improving the yield rate of the display device 300.
[0061] In a third aspect, an embodiment of the present application further provides an electronic device, such as Figure 8 shown Figure 8 is a schematic structural diagram of an electronic device provided by an embodiment of the present application. The electronic device 400 includes the display device 300 mentioned in the second aspect above. In the non-display area of the array substrate of the electronic device 400, a first metal oxide is provided to cover the source-drain metal lines, which can prevent the subsequent plasma treatment or extrusion process from damaging the source-drain metal lines, and can also avoid the risk of water vapor invasion, thereby avoiding metal corrosion. In addition, it can also improve the scratch resistance of the area not covered by the organic film layer. All of these can reduce the risk of disconnection of the source-drain metal lines, thereby improving the yield rate of the display device manufactured using the array substrate, avoiding problems in the reliability evaluation of electronic device products, and improving the product quality.
[0062] As mentioned above, the above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application, thinking of changes or substitutions, should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. An array substrate, characterized in that, Comprising: A substrate; Source-drain metal lines formed on the substrate and extending from a display area to a non-display area, wherein the source-drain metal lines in the non-display area include an organic film layer covered area and a non-organic film layer covered area; A first metal oxide layer covering the source-drain metal lines in the non-organic film layer covered area.
2. The array substrate according to claim 1, wherein Further comprising: A passivation layer covering the first metal oxide layer; An organic film layer covering the passivation layer within the organic film layer covered area.
3. The array substrate according to claim 2, wherein The first metal oxide layer extends to cover the source-drain metal lines in the organic film layer covered area.
4. The array substrate according to claim 3, wherein The projection edge of the first metal oxide layer on the substrate is greater than or equal to 1.65 μm away from the projection edge of the source-drain metal lines on the substrate.
5. The array substrate according to claim 3, wherein An opening area is formed on the passivation layer in the non-organic film layer covered area, and the opening area exposes the first metal oxide layer.
6. The array substrate according to any one of claims 1-5, characterized in that, Thin film transistors are further formed in the display area of the array substrate, and the source-drain metal lines are arranged in the same layer as the source electrode and / or drain electrode of the thin film transistors.
7. The array substrate according to claim 6, wherein The source-drain metal lines include data lines.
8. The array substrate according to claim 6, wherein, A first display electrode is further formed in the display area of the array substrate, and the first display electrode is electrically connected to the drain electrode of the thin film transistor and is arranged in the same layer as the first metal oxide layer.
9. The array substrate according to any one of claims 2-5, characterized in that, Further comprising: A second metal oxide layer formed on the organic film layer in the non-display area and covering the edge of the organic film layer.
10. The array substrate according to claim 9, wherein, A second display electrode is further formed in the display area, and the second display electrode is arranged in the same layer as the second metal oxide layer.
11. A display device, characterized in that, An array substrate according to any one of claims 1-10.
12. The display device according to claim 11, wherein Further comprising: A color filter substrate disposed opposite to the array substrate.
13. The display device according to claim 12, wherein An opening area is formed on the passivation layer in the non-organic film layer covered area of the array substrate, and the display device further comprises: A conductive adhesive covering the opening area; A driving chip, and the driving chip is electrically connected to the source-drain metal lines through the conductive adhesive.
14. The display device according to claim 13, wherein The conductive adhesive covers the edge of the second metal oxide layer on the array substrate, and the display device further comprises: An isolation and protection adhesive covering at least a part of the second metal oxide layer on the array substrate and the edge of the conductive adhesive.
15. An electronic device, characterized in that, A display device according to any one of claims 11-14.