Analog video signal processing circuit and display
By allocating the SOG/CVBS analog video signal to three signal branches, the complex problem of analog video signal processing circuit in the prior art is solved, circuit simplification and cost reduction are achieved, and system compatibility and reliability are improved.
Patent Information
- Application Number
- CN202422227895.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-11
- Publication Date
- 2025-08-01
- Estimated Expiration
- 2034-09-11
AI Technical Summary
The SOG/CVBS analog video signal input and loop output circuits under the prior art are complex, and the circuit board space occupies a lot and requires multiple interface bits.
The SOG/CVBS analog video signal is received through the input unit. The signal op amp unit allocates the signal to three signal branches, and the two branches are output to the image chip processing unit respectively. The third branch is used for signal loop out to simplify the circuit structure.
It realizes simplification of analog video signal processing circuit, reduces the number of input and output terminals, reduces production costs, improves system compatibility and reliability, and reduces the probability of failure.
Smart Images
Figure CN223182192U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of video signal processing, and particularly relates to an analog video signal processing circuit and a display. Background Art
[0002] In the prior art, the analog video signal processing circuit for a display has a relatively complex circuit structure. Taking the circuit of SOG / CVBS analog video signal input and loop-out as an example, in the existing technology, the circuit usually needs to arrange at least one input port of SOG, one output port of SOG, one input port of CVBS, and one output port of CVBS respectively to meet the basic functions of the circuit. At the same time, a set of input and loop-out circuits need to be set up respectively for SOG and CVBS to realize the circuit functions. This leads to the complexity of the SOG / CVBS analog video signal input and loop-out circuit in the prior art, more space occupation of the circuit on the circuit board, and the need to prepare multiple interface positions. Summary of the Utility Model
[0003] The embodiments of the utility model provide an analog video signal processing circuit and a display, which are used to solve the problems of multiple input ports of SOG / CVBS analog video signals and complex loop-out circuits in the prior art.
[0004] In the first aspect, the utility model provides an analog video signal processing circuit, including: an input unit for receiving SOG / CVBS analog video signals; a signal operational amplifier unit, whose input end is connected to the input unit, and whose output end has a first signal branch, a second signal branch, and a third signal branch. The first signal branch is used to output SOG analog video signals, the second signal branch is used to output CVBS analog video signals, and the third signal branch is used to output amplified SOG / CVBS analog video signals; an image chip processing unit, connected to the first signal branch and the second signal branch, for receiving the SOG analog video signals and the CVBS analog video signals and performing image processing; an output unit, connected to the third signal branch, for loop-out the amplified SOG / CVBS analog video signals.
[0005] In the analog video signal processing circuit provided by the utility model, the signal operational amplifier unit includes a signal coupling unit and an amplification unit. The signal coupling unit is connected to the input unit, and the signal coupling unit is used to perform AC signal coupling on the SOG / CVBS analog video signals to obtain a coupled signal; the input end of the amplification unit is connected to the signal coupling unit, and the output end of the amplification unit is respectively connected to the first signal branch, the second signal branch, and the third signal branch. The amplification unit is used to amplify the coupled signal.
[0006] In the analog video signal processing circuit provided by the present utility model, the first signal shunt includes a first voltage dividing unit, and the first voltage dividing unit includes a first voltage dividing resistor and a second voltage dividing resistor. One end of the first voltage dividing resistor is connected to the output end of the amplifying unit, the other end of the first voltage dividing resistor is connected to the second voltage dividing resistor, and the other end of the second voltage dividing resistor is grounded.
[0007] In the analog video signal processing circuit provided by the present utility model, the first signal shunt further includes a first coupling sub-unit, and the first coupling sub-unit includes a first series resistor and a first coupling capacitor. One end of the first series resistor is connected to the first voltage dividing resistor and the second voltage dividing resistor, the other end of the first series resistor is connected to the first coupling capacitor, and the other end of the first coupling capacitor is connected to the image chip processing unit.
[0008] In the analog video signal processing circuit provided by the present utility model, the second signal shunt includes a second voltage dividing unit, and the second voltage dividing unit includes a fourth voltage dividing resistor and a fifth voltage dividing resistor. One end of the fourth voltage dividing resistor is connected to the output end of the amplifying unit, the other end of the fourth voltage dividing resistor is connected to the fifth voltage dividing resistor, and the other end of the fifth voltage dividing resistor is grounded.
[0009] In the analog video signal processing circuit provided by the present utility model, the second signal shunt further includes a second coupling sub-unit, and the second coupling sub-unit includes a second series resistor and a second coupling capacitor. One end of the second series resistor is connected to the fourth voltage dividing resistor and the fifth voltage dividing resistor, the other end of the second series resistor is connected to the second coupling capacitor, and the other end of the second coupling capacitor is connected to the image chip processing unit.
[0010] In the analog video signal processing circuit provided by the present utility model, the third signal shunt includes a third voltage dividing unit, and the third voltage dividing unit includes a seventh voltage dividing resistor. One end of the seventh voltage dividing resistor is connected to the output end of the amplifying unit, and the other end of the seventh voltage dividing resistor is connected to the output unit.
[0011] In the analog video signal processing circuit provided by the present utility model, the input unit includes a first RF terminal coaxial cable terminator and a first protection unit, and the first protection unit includes a first electrostatic discharge diode and an eighth voltage dividing resistor. One end of the first electrostatic discharge diode and the eighth voltage dividing resistor are both connected to the first RF terminal coaxial cable terminator, and the other ends of the first electrostatic discharge diode and the eighth voltage dividing resistor are both grounded. The first RF terminal coaxial cable terminator is connected to the signal coupling unit.
[0012] In the analog video signal processing circuit provided by the present utility model, the output unit includes a second RF terminal coaxial cable terminator and a second protection unit. The second protection unit includes a second electrostatic discharge diode. One end of the second electrostatic discharge diode is connected to the second RF terminal coaxial cable terminator, and the other end of the second electrostatic discharge diode is grounded. The second RF terminal coaxial cable terminator is connected to the third signal splitter.
[0013] In a second aspect, the present utility model provides a display, including the above-mentioned analog video signal processing circuit.
[0014] Compared with the prior art, the beneficial effects of the present utility model are as follows:
[0015] In the technical solution of the present utility model, the SOG / CVBS analog video signal is received through the input unit. The signal operational amplifier unit connected to the input unit distributes the signal from the output end to three signal splitters, and relies on two of the splitters to output the SOG analog video signal and the CVBS analog video signal to the image chip processing unit respectively, and connects the output unit through the third splitter for signal loop-out, thereby simplifying the analog video signal processing circuit in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0017] Figure 1 It is a circuit logic schematic diagram of the analog video signal processing circuit according to the embodiment of the present utility model;
[0018] Figure 2 It is a circuit schematic diagram of the embodiment of the analog video signal processing circuit according to the embodiment of the present utility model;
[0019] Figure 3 It is a circuit schematic diagram of the embodiment of the analog video signal processing circuit in the prior art;
[0020] REFERENCE SIGNS:
[0021] 100, input unit; 200, signal operational amplifier unit; 300, image chip processing unit; 400, output unit. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0022] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part rather than all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0023] It should be understood that when used in this specification and the appended claims, the terms "comprises" and "comprising" indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations.
[0024] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in this specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms.
[0025] It should be further understood that the term "and / or" used in this specification of the present invention and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.
[0026] The analog video signal processing circuit structure under the prior art is Figure 3As shown in the example. In order to enable the image processing chip to input SOG / CVBS analog video signals, a set of circuits with operational amplifiers and loop-out functions are independently set for each signal. When it is necessary to input the SOG analog video signal, the SOG analog video signal enters the image processing chip after being AC-coupled through the RF terminal coaxial cable terminator P1 for SOG signal input, the series resistor R1, and the capacitor C1. At the same time, the SOG analog video signal also loops out the SOG analog video signal through the series resistor R7, the operational amplifier unit, the resistor R6, and the RF terminal coaxial cable terminator P2 for SOG signal output. When it is necessary to input the CVBS analog video signal, the CVBS analog video signal enters the image processing chip after being AC-coupled through the RF terminal coaxial cable terminator P3 for CVBS signal input, the series resistor R8, and the capacitor C7. At the same time, the CVBS analog video signal loops out the CVBS analog video signal through the series resistor R14, the operational amplifier unit, the resistor R13, and the RF terminal coaxial cable terminator P4 for CVBS signal input. During use, different sockets need to be plugged in according to the type of signal input, and the operation is complex. There are many circuit components, the repetition degree of the same-function circuits is high, and the circuit design is relatively complex. Using the components of this circuit will require more circuit board space to carry the circuit and its interfaces.
[0027] The present utility model aims to solve the problem that the structure of the analog video signal processing circuit is relatively complex under the existing technology, and proposes an analog video signal processing circuit. Refer to Figures 1 to 2, an analog video signal processing circuit, comprising: an input unit 100 for receiving SOG / CVBS analog video signals; a signal operational amplifier unit 200, whose input end is connected to the input unit 100, and whose output end has a first signal branch, a second signal branch, and a third signal branch. The first signal branch is used to output SOG analog video signals, the second signal branch is used to output CVBS analog video signals, and the third signal branch is used to output amplified SOG / CVBS analog video signals; an image chip processing unit 300, connected to the first signal branch and the second signal branch, for receiving SOG analog video signals and CVBS analog video signals and performing image processing; an output unit 400, connected to the third signal branch, for looping out the amplified SOG / CVBS analog video signals. The SOG / CVBS analog video signals are accessed to the circuit through the input unit 100 without using multiple input interfaces to distinguish the types of signals, which improves the compatibility and reliability of the system compared with the prior art. The input unit 100 is connected to the signal operational amplifier unit 200, and the signal operational amplifier unit 200 is used to branch and amplify the signals. By "branching", it means that the lines branched out by the signal operational amplifier unit 200 are connected to different units according to functional requirements. Both the first signal branch and the second signal branch are connected to the image chip processing unit 300, but are respectively connected to different signal receiving pins. If the first signal branch is connected to the SOG analog video signal receiving pin, then the first signal branch is used to output SOG analog video signals to the image chip processing unit 300. If the second signal branch is connected to the CVBS analog video signal receiving pin, then the second signal branch is used to output CVBS analog video signals to the image chip processing unit 300. The image chip processing unit 300 will actively screen according to functional requirements or settings, actively shielding the pins of the signals that are not currently needed. After the SOG / CVBS analog video signals are input to the image chip processing unit 300, the signals are received according to the pins currently in use. The third signal branch is connected to the output unit 400, and the SOG / CVBS analog video signals are looped out through the output unit 400. In order to enable the devices connected to the image chip processing unit 300 and the output unit 400 to receive stronger signals, the signal operational amplifier unit 200 will amplify the SOG / CVBS analog video signals.
[0028] Compared with the prior art, in the technical solution of the present utility model, the SOG / CVBS analog video signals are received through the input unit 100. The signal operational amplifier unit 200 connected to the input unit 100 distributes the signals from the output end to 3 signal branches, and relies on two of the branches to respectively output SOG analog video signals and CVBS analog video signals to the image chip processing unit 300, and the third branch is connected to the output unit 400 for signal looping out, thereby simplifying the analog video signal processing circuit in the prior art.
[0029] In one embodiment, referring to Figure 2 , the signal operational amplifier unit 200 includes a signal coupling unit and an amplification unit. The signal coupling unit is connected to the input unit 100. The signal coupling unit is used to perform AC signal coupling on the SOG / CVBS analog video signal to obtain a coupled signal. The input end of the amplification unit is connected to the signal coupling unit, and the output end of the amplification unit is respectively connected to the first signal branch, the second signal branch, and the third signal branch. The amplification unit is used to amplify the coupled signal. In order to isolate the DC component in the signal and avoid the adverse impact of the DC bias brought by the DC component on the subsequent processing of the circuit, a signal coupling unit is provided in the signal operational amplifier unit 200. While blocking the DC component in the signal, the signal coupling unit also reduces the signal noise for the amplification unit connected thereto, improving the quality and purity of the signal input into the amplification unit. In the circuit transmission of the SOG / CVBS analog video signal, in order to avoid the attenuation of low-frequency signals and high-frequency signals, so that the signal transmission has higher fidelity, C9 / C12 / C14 on the three input lines connecting the signal coupling unit to the signal operational amplifier unit 200 are all coupling capacitors of 0.1uF / 16V. In order to make the SOG / CVBS analog video signal easier to be analyzed by the graphics processing chip and at the same time make the graphics displayed by the device connected to the output unit 400 clearer, the amplification unit is used to amplify the SOG / CVBS analog video signal. In actual use, it is preferably to use the SGM9117 operational amplifier chip as the main working component of the amplification unit in the analog video signal processing circuit of the present invention. It can not only provide an open-loop gain of up to 100dB, making the signal output from the output end of the amplification unit clearer, but also its gain-bandwidth product is usually in the order of several MHz, enabling it to process higher-frequency signals.
[0030] In one embodiment, referring to Figure 2 , the first signal branch includes a first voltage dividing unit. The first voltage dividing unit includes a first voltage dividing resistor and a second voltage dividing resistor. One end of the first voltage dividing resistor is connected to the output end of the amplification unit, the other end of the first voltage dividing resistor is connected to the second voltage dividing resistor, and the other end of the second voltage dividing resistor is grounded. The first voltage dividing resistor R19 serves as a voltage dividing resistor and is connected in series in the path of the first signal branch, and is used to perform voltage division adjustment on the input SOG analog video signal. The second voltage dividing resistor R15 is a grounding resistor, and together with the first voltage dividing resistor R19, it forms a voltage dividing network of the first signal branch, ensuring that the voltage of the signal after voltage division can be stabilized within a suitable voltage range. The presence of the second voltage dividing resistor R15 helps to adjust the level of the SOG signal and prevent the input signal from being too large or too small. Through combination with the second voltage dividing resistor R15 grounded, the first voltage dividing resistor R19 can adjust the input signal to a suitable voltage range to adapt to the access requirements of the image processing chip of the image chip processing unit 300.
[0031] In one embodiment, referring to Figure 2 , the first signal splitter further includes a first coupling subunit, the first coupling subunit includes a first series resistor and a first coupling capacitor. One end of the first series resistor is connected to the first voltage-dividing resistor and the second voltage-dividing resistor, the other end of the first series resistor is connected to the first coupling capacitor, and the other end of the first coupling capacitor is connected to the image chip processing unit 300. To ensure the smoothness of the signal input to the image chip processing unit 300, the first series resistor R17 and the first coupling capacitor C3 are provided and combined to form an RC series circuit. The function of the first coupling capacitor C3 is to filter out the DC component in the analog video signal. The first series resistor R17 is connected to the first voltage-dividing resistor R15 and the second voltage-dividing resistor R19, and plays a role in current limiting and level adjustment for the signal. The first series resistor R17 and the first coupling capacitor C3 are combined to form a filtering circuit to ensure the signal quality and stability of the amplified analog video signal entering the image chip processing unit 300. Further, in order to provide a stable voltage reference point for the image processing chip to analyze the analog video signal of the first signal splitter, the resistor R18 is also provided. One end of the resistor R18 is connected to the digital ground, and the other end is connected to the capacitor C6, and the reference voltage is stabilized through the resistor R18 and the capacitor C6.
[0032] In one embodiment, referring to Figure 2 , the second signal splitter includes a second voltage-dividing unit, the second voltage-dividing unit includes a fourth voltage-dividing resistor and a fifth voltage-dividing resistor. One end of the fourth voltage-dividing resistor is connected to the output end of the amplifying unit, the other end of the fourth voltage-dividing resistor is connected to the fifth voltage-dividing resistor, and the other end of the fifth voltage-dividing resistor is grounded. The fourth voltage-dividing resistor R20 serves as a voltage-dividing resistor and is connected in series on the path of the first signal splitter for voltage-dividing adjustment of the input CVBS analog video signal. The fifth voltage-dividing resistor R16 is a grounding resistor, and together with the fourth voltage-dividing resistor R20, forms a voltage-dividing network of the second signal splitter to ensure that the voltage-divided signal can be stabilized within a suitable voltage range. The presence of the fifth voltage-dividing resistor R16 helps to adjust the level of the CVBS analog video signal and prevent the input signal from being too large or too small. Through combination with the grounded fifth voltage-dividing resistor R16, the fourth voltage-dividing resistor R20 can adjust the input signal to a suitable voltage range to adapt to the access requirements of the image processing chip of the image chip processing unit 300.
[0033] In one embodiment, referring to Figure 2, the second signal shunt further includes a second coupling subunit, and the second coupling subunit includes a second series resistor and a second coupling capacitor. One end of the second series resistor is connected to the fourth voltage-dividing resistor and the fifth voltage-dividing resistor, the other end of the second series resistor is connected to the second coupling capacitor, and the other end of the second coupling capacitor is connected to the image chip processing unit 300. To ensure the smoothness of the signal input to the image chip processing unit 300, the second series resistor R21 and the second coupling capacitor C13 are provided to form an RC series circuit. The function of the second coupling capacitor C13 is to filter out the DC component in the analog video signal. The second series resistor R21 is connected to the fourth voltage-dividing resistor R20 and the fifth voltage-dividing resistor R16, which plays a role in current limiting and level adjustment of the signal. The second series resistor R21 and the second coupling capacitor C13 are combined to form a filtering circuit to ensure the signal quality and stability of the amplified analog video signal entering the image chip processing unit 300. Further, in order to provide a stable voltage reference point for the image processing chip to analyze the analog video signal of the first signal shunt, a resistor R23 is also provided. One end of the resistor R23 is connected to the digital ground, and the other end of the resistor R23 is connected to the capacitor C15. The reference voltage is stabilized through the resistor R18 and the capacitor C15.
[0034] In one embodiment, referring to Figure 2 , the third signal shunt includes a third voltage-dividing unit, and the third voltage-dividing unit includes a seventh voltage-dividing resistor. One end of the seventh voltage-dividing resistor is connected to the output end of the amplifying unit, and the other end of the seventh voltage-dividing resistor is connected to the output unit. The seventh voltage-dividing resistor R22 is connected in series in the third signal circuit, which plays a role in current limiting and also plays a certain role in adjusting the signal level. Setting the seventh voltage-dividing resistor R22 can stabilize the looped-out signal, avoid noise interference and unnecessary signal fluctuations, so as to ensure that the SOG / CVBS signal transmitted to the external device through the output unit maintains good quality.
[0035] In one embodiment, referring to Figure 2, the input unit 100 includes a first RF terminal coaxial cable terminator and a first protection unit. The first protection unit includes a first electrostatic discharge diode and an eighth voltage dividing resistor. One end of both the first electrostatic discharge diode and the eighth voltage dividing resistor is connected to the first RF terminal coaxial cable terminator, and the other end of both the first electrostatic discharge diode and the eighth voltage dividing resistor is grounded. The first RF terminal coaxial cable terminator is connected to the signal coupling unit. The first RF terminal coaxial cable terminator P5 is used to connect to the device or line of the input signal, enabling the analog video signal processing circuit to adapt to different video signal standards and achieve multi-functional video input. The first electrostatic discharge diode D22 is used to prevent the damage of sensitive components in the circuit by static electricity or surge current. When static electricity or excessive voltage enters from the first RF terminal coaxial cable terminator P5, the first electrostatic discharge diode D22 will conduct these currents to the ground, thereby protecting the signal op-amp unit 200 and other circuit components from the impact of static electricity or surge. The eighth voltage dividing resistor R24, as a voltage dividing resistor, functions to distribute the voltage of the analog video signal entering from the first RF terminal coaxial cable terminator P5, ensuring that the signal level adapts to the subsequent processing circuit. The voltage dividing function of the eighth voltage dividing resistor R24 prevents the input signal from being too large, thereby preventing damage or interference to the signal op-amp unit 200 and the subsequent image chip processing unit 300. At the same time, it can ensure that the signal remains at an appropriate level for subsequent amplification and processing. The first electrostatic discharge diode D22 and the eighth voltage dividing resistor R24 work together to prevent static electricity from damaging the circuit and maintain the stability of the signal level.
[0036] In one embodiment, referring to Figure 2, the output unit 400 includes a second RF terminal coaxial cable terminator and a second protection unit. The second protection unit includes a second electrostatic discharge diode. One end of the second electrostatic discharge diode is connected to the second RF terminal coaxial cable terminator, and the other end of the second electrostatic discharge diode is grounded. The second RF terminal coaxial cable terminator is connected to the third signal splitter. The second RF terminal coaxial cable terminator P6 is used to loop out the analog video signal processed by the signal operational amplifier unit 200 to an external device. Specifically, when the SOG / CVBS analog video signal is input into the circuit through the first RF terminal coaxial cable terminator P5 and amplified and processed by the signal operational amplifier unit 200, the second RF terminal coaxial cable terminator P6 is responsible for outputting these signals. The output signal can be provided to an external display device (such as a secondary display) to achieve synchronous display. One end of the second protection unit D24 is connected to the second RF terminal coaxial cable terminator P6, and the other end of the second protection unit D24 is grounded. The function of the second protection unit D24 is to provide electrostatic discharge protection for the second RF terminal coaxial cable terminator P6 and the signal operational amplifier unit 200 above it. The second RF terminal coaxial cable terminator P6 and the signal operational amplifier unit 200 may be affected by static electricity or surges during the transmission of the SOG / CVBS analog video signal. These excessive voltages may damage circuit components. The second protection unit D24 can direct these static electricity or surge voltages to the ground when they appear, thereby protecting the subsequent circuit and improving the reliability and durability of the entire circuit. The second protection unit D24 can prevent the device from malfunctioning due to external static electricity accumulation, especially for the second RF terminal coaxial cable terminator P6 that often needs to be connected to external devices.
[0037] Compared with the prior art, in combination with Figure 2 and Figure 3 , the analog video signal processing circuit of the present invention reduces the number of input and output terminals, simplifies the 2 input connectors and 2 output connectors required in the analog video signal processing circuit of the prior art in Figure 1 to 1 input connector and 1 output connector. At the same time, only 1 operational amplifier unit is needed to process the signal, rather than multiple operational amplifier units. This greatly simplifies the circuit design and reduces the production cost.
[0038] The present utility model also provides a display, which includes the analog video signal processing circuit in the above embodiment. Compared with the same type of products in the prior art, this display reduces the number of peripheral components and simplifies the signal path, significantly reducing potential failure points, thereby improving the stability of the circuit. For a display running for a long time, this can reduce the interference and failure probability caused by a complex circuit. The display of the present utility model supports both SOG and CVBS analog video signals simultaneously, and can process the input through one line and loop out through another line. Compared with the same type of products in the prior art, it can better be compatible with different types of analog signal inputs, enhancing its adaptability in the market and being suitable for use in more scenarios. Due to the reduction in the number of components, the production cost of the display of the present utility model can be significantly reduced. At the same time, the smaller number of components also means that the power consumption of the display will be reduced, which has a greater energy-saving advantage for display devices that need to be turned on for a long time.
[0039] The above are only the specific implementation manners of the present utility model, but the protection scope of the present utility model is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present utility model can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present utility model. Therefore, the protection scope of the present utility model shall be subject to the protection scope of the claims.
Claims
1. An analog video signal processing circuit, comprising: An input unit for receiving SOG / CVBS analog video signals; A signal operational amplifier unit, whose input terminal is connected to the input unit, and whose output terminal has a first signal branch, a second signal branch, and a third signal branch. The first signal branch is used to output SOG analog video signals, the second signal branch is used to output CVBS analog video signals, and the third signal branch is used to output the SOG / CVBS analog video signals amplified by the signal operational amplifier unit; An image chip processing unit, connected to the first signal branch and the second signal branch, for receiving the SOG analog video signals and the CVBS analog video signals and performing image processing; An output unit, connected to the third signal branch, for looping out the amplified SOG / CVBS analog video signals.
2. The analog video signal processing circuit according to claim 1, wherein The signal operational amplifier unit includes a signal coupling unit and an amplification unit. The signal coupling unit is connected to the input unit, and the signal coupling unit is used to perform AC signal coupling on the SOG / CVBS analog video signals to obtain a coupled signal; the input terminal of the amplification unit is connected to the signal coupling unit, and the output terminal of the amplification unit is respectively connected to the first signal branch, the second signal branch, and the third signal branch. The amplification unit is used to amplify the coupled signal.
3. The analog video signal processing circuit according to claim 2, characterized in that, The first signal branch includes a first voltage dividing unit. The first voltage dividing unit includes a first voltage dividing resistor and a second voltage dividing resistor. One end of the first voltage dividing resistor is connected to the output terminal of the amplification unit, the other end of the first voltage dividing resistor is connected to the second voltage dividing resistor, and the other end of the second voltage dividing resistor is grounded.
4. The analog video signal processing circuit according to claim 3, characterized in that, The first signal branch further includes a first coupling sub-unit. The first coupling sub-unit includes a first series resistor and a first coupling capacitor. One end of the first series resistor is connected to the first voltage dividing resistor and the second voltage dividing resistor, the other end of the first series resistor is connected to the first coupling capacitor, and the other end of the first coupling capacitor is connected to the image chip processing unit.
5. The analog video signal processing circuit according to claim 2, characterized in that, The second signal branch includes a second voltage dividing unit. The second voltage dividing unit includes a fourth voltage dividing resistor and a fifth voltage dividing resistor. One end of the fourth voltage dividing resistor is connected to the output terminal of the amplification unit, the other end of the fourth voltage dividing resistor is connected to the fifth voltage dividing resistor, and the other end of the fifth voltage dividing resistor is grounded.
6. The analog video signal processing circuit according to claim 5, wherein The second signal branch further includes a second coupling sub-unit. The second coupling sub-unit includes a second series resistor and a second coupling capacitor. One end of the second series resistor is connected to the fourth voltage dividing resistor and the fifth voltage dividing resistor, the other end of the second series resistor is connected to the second coupling capacitor, and the other end of the second coupling capacitor is connected to the image chip processing unit.
7. The analog video signal processing circuit according to claim 2, wherein The third signal branch includes a third voltage dividing unit. The third voltage dividing unit includes a seventh voltage dividing resistor. One end of the seventh voltage dividing resistor is connected to the output terminal of the amplification unit, and the other end of the seventh voltage dividing resistor is connected to the output unit.
8. The analog video signal processing circuit according to claim 2, wherein The input unit includes a first RF terminal coaxial cable terminator and a first protection unit. The first protection unit includes a first electrostatic discharge diode and an eighth voltage dividing resistor. One ends of the first electrostatic discharge diode and the eighth voltage dividing resistor are both connected to the first RF terminal coaxial cable terminator, and the other ends of the first electrostatic discharge diode and the eighth voltage dividing resistor are both grounded. The first RF terminal coaxial cable terminator is connected to the signal coupling unit.
9. The analog video signal processing circuit according to claim 2, wherein The output unit includes a second RF terminal coaxial cable terminator and a second protection unit. The second protection unit includes a second electrostatic discharge diode. One end of the second electrostatic discharge diode is connected to the second RF terminal coaxial cable terminator, and the other end of the second electrostatic discharge diode is grounded. The second RF terminal coaxial cable terminator is connected to the third signal splitting.
10. A display device, comprising the analog video signal processing circuit according to any one of claims 1 to 9.