Wafer carrier, wafer conveying device and wafer conveying system

Abstract

The utility model discloses a wafer carrier, a wafer conveying device and a wafer conveying system, and relates to the technical field of semiconductor manufacturing, the wafer carrier comprises a carrier body, the carrier body is provided with a first end face and a second end face, and the first end face is opposite to the second end face. The first end face is provided with a placing groove, and the placing groove is matched with the outline of a wafer and is used for bearing the wafer; a groove is formed in the second end face and suitable for being in butt joint with an electrostatic chuck on external equipment, and a conveying area is formed in the position, on the peripheral side of the groove, of the carrier body and suitable for a conveying arm to bear and convey the carrier body. And a plurality of adsorption holes are formed in the carrier body, are communicated with the placement groove and the groove, and are suitable for the electrostatic chuck to adsorb the wafer in the placement groove. According to the invention, the wafer carrier is arranged to bear the wafer, so that the conveying arm can be prevented from directly conveying the thinned wafer, and the wafer breaking risk is low.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a wafer carrier, a wafer conveying device, and a wafer conveying system. Background Art

[0002] Second-generation compound semiconductor devices, represented by gallium arsenide (GaAs), offer advantages over silicon devices, including high electron mobility, high operating frequency, wider temperature characteristics, and improved radiation resistance. Their unique material properties make them indispensable for high-frequency analog integrated circuits (ICs). They are widely used in mobile phones, power amplifier modules, low-noise amplifiers (LNAs), switches, wideband modulators, optical networks, wireless local area networks (WLANs), satellite communications, automotive radar, and wireless infrastructure. Currently, GaAs devices and integrated circuits (RFICs) account for approximately 85% of the compound semiconductor market, and this momentum is expected to maintain rapid growth with the advent of the 5G and IoT (Internet of Things) eras. Various radio frequency integrated circuits (RFICs) manufactured using GaAs are experiencing widespread development and application.

[0003] RF power devices operate at high current density, generate high heat, and place stringent requirements on heat dissipation. However, the thermal conductivity of GaAs is only one-third that of silicon. Reducing the substrate thickness can also reduce the impedance of RF devices during high-frequency operation. This requires thinning the 675±25 micron thick GaAs wafer to a thickness of 25-1600 microns after completing the front-side processing. The industry's traditional method involves attaching the GaAs wafer to a carrier (typically sapphire) with an adhesive (glue or wax) for thinning.

[0004] After thinning, GaAs wafers enter the AOI (Automated Optical Inspection) or reliability testing phase. Directly transporting the thinned GaAs wafers through the AOI or reliability testing equipment can damage them due to their thinness, fragility, and warping.

[0005] Therefore, how to improve the technical defects in the existing technology has always been a problem that ordinary technicians in this field need to solve urgently. Utility Model Content

[0006] The purpose of this application is to provide a wafer carrier, a wafer conveying device and a wafer conveying system, which can avoid direct contact between the wafer and the conveying arm and reduce the risk of fragmentation.

[0007] The technical solutions provided in this application are as follows:

[0008] A wafer carrier, comprising:

[0009] The carrier body has a first end surface and a second end surface, wherein the first end surface and the second end surface are opposite to each other;

[0010] The first end surface is provided with a placement groove, which is adapted to the wafer contour and is used to carry the wafer; the second end surface is provided with a groove, which is suitable for docking with an electrostatic chuck on an external device, and the carrier body is formed with a conveying area around the groove, which is suitable for a conveying arm to support and convey the carrier body; and,

[0011] A plurality of adsorption holes are provided on the carrier body, and the adsorption holes are connected to the placement slot and the groove, and are suitable for an electrostatic chuck to adsorb the wafer in the placement slot.

[0012] In some embodiments, a stop structure is provided on the first end surface around the placement groove, and the stop structure is used to stop the wafer.

[0013] In some embodiments, the stop structure is provided with a guide opening, which is connected to the placement groove and is used to guide the wafer to enter or exit the placement groove.

[0014] In some embodiments, the stop structure includes an arc segment and a guide segment, and the number of the guide segments is two, which are respectively provided at both ends of the arc segment in the arc length direction; and the arc segment has an inner concave surface, and the two guide segments are both provided on a side of the arc segment corresponding to the inner concave surface;

[0015] The arc segment and the guide segment are jointly arranged to form the placement groove, and the guide opening is formed between the stop structure and the two guide segments.

[0016] In some embodiments, the wafer carrier further comprises:

[0017] The placement position verification position is provided on a side of the carrier body opposite to the guide port, and is used to verify the relative position relationship between the carrier body and the electrostatic chuck.

[0018] In some embodiments, the placement position check position includes at least one alignment groove, the alignment groove is opened on the side wall of the carrier body, and the two ends of the alignment groove in the extension direction extend to the first end surface and the second end surface respectively.

[0019] In some embodiments, the wafer carrier further comprises:

[0020] The wafer flat edge verification position is provided on the carrier body and is used to verify the orientation of the wafer after it is placed on the carrier body.

[0021] In some embodiments, the sidewall of the carrier body includes a first straight section, and the first straight section is located on a side of the carrier body close to or away from the guide port to form the wafer flat edge calibration position.

[0022] In some embodiments, the side wall of the carrier body includes two second straight sections, and the second straight sections are located on two opposite sides of the guide opening.

[0023] In some embodiments, the carrier body is in a plate-shaped structure, the groove is obtained by stamping the carrier body using a stamping process, and the placement groove is opened on the supporting boss formed after stamping.

[0024] In some embodiments, the corners of the carrier body are arc-shaped transitions.

[0025] In some embodiments, the carrier body is provided with a plurality of weight-reducing holes.

[0026] In some embodiments, the weight-reducing holes include a first weight-reducing hole and a second weight-reducing hole, wherein the first weight-reducing hole is provided on a peripheral side of the bearing boss, and the second weight-reducing hole is provided at a corner of the carrier body.

[0027] In some embodiments, the second weight-reducing hole is an arc-shaped hole having an inner concave side and an outer convex side, and the inner concave side of the second weight-reducing hole is arranged toward the bearing boss.

[0028] In some embodiments, the plurality of adsorption holes are radially arranged from the center of the placement slot to the edge of the placement slot.

[0029] In some embodiments, the outer dimensions of the recess are larger than the outer dimensions of the electrostatic chuck.

[0030] The present application also provides a wafer conveying device, comprising: a conveying arm and a wafer carrier provided by any of the above embodiments;

[0031] The wafer carrier is used to carry the wafer, and the transport arm is used to support the wafer carrier and transport the wafer carrier and the wafer to the electrostatic chuck of an external device.

[0032] The present application further provides a wafer conveying system, comprising:

[0033] Wafer, carrier, and wafer conveying device provided by the above embodiments;

[0034] The wafer is suitable for being fixed on the carrier, and the wafer carrier carries the carrier and the wafer, wherein the carrier is provided with a plurality of openings, and the openings and the adsorption holes are arranged in a one-to-one correspondence.

[0035] The technical effects of this application are:

[0036] 1. In the present application, a placement groove for placing wafers is provided on the first end face of the wafer carrier, and the placement groove is adapted to the outline of the wafer so that the wafer can move with the wafer carrier during transportation and is not easy to fall off the wafer carrier. In addition, a groove suitable for docking an electrostatic suction cup on an external device is also provided on the second end face of the wafer carrier, and the groove is provided with an adsorption hole connected to the placement groove, so that the wafer can be stably connected to the external device after being transported to the target position, which is conducive to the progress of subsequent processes. Moreover, by providing a wafer carrier, the present application realizes the indirect transportation of the wafer by the transport arm, avoids direct contact between the wafer and the transport arm, effectively reduces the risk of fragmentation, and improves the production yield of the wafer.

[0037] 2. In the present application, a stop structure is provided on the periphery of the placement slot on the first end face. The stop structure can limit the position of the wafer, reduce the positional deviation and shaking of the wafer that may occur during transportation, and prevent the wafer from leaving the placement slot, which is beneficial to the stable transportation of the wafer. It is also beneficial for the conveying arm to accurately transport the wafer to the target position.

[0038] 3. In the present application, the wafer carrier is also provided with a placement position calibration position, which can assist in the alignment between the carrier body and the electrostatic chuck. When the stop structure can limit the relative position between the carrier body and the wafer, the wafer and the electrostatic chuck can be accurately positioned by accurately aligning the carrier body and the electrostatic chuck, which is more conducive to the electrostatic chuck applying uniform adsorption force to the wafer, resulting in better adsorption effect and the wafer is not easily damaged due to excessive local force.

[0039] 4. In this application, the carrier body has a plate-like structure, and the grooves thereon are formed by stamping the carrier body. After stamping, the carrier body forms a bearing boss on the first end surface of the carrier body, and the placement slot is provided on this bearing boss. This arrangement can provide sufficient space for the grooves and placement slots while minimizing the volume and material consumption of the carrier body, achieving lightweight production. The structural arrangement is reasonable and practical, and is conducive to the mass production of carrier bodies. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The present application is further described in detail below with reference to the accompanying drawings and specific embodiments:

[0041] Figure 1This is a structural disassembly diagram of a wafer conveying structure provided in the prior art;

[0042] Figure 2 is a schematic diagram of the three-dimensional structure of the wafer provided in an embodiment of the present application when it is not adsorbed on the vacuum adsorption table;

[0043] Figure 3 1 is a schematic diagram of the three-dimensional structure of the wafer and the carrier provided in the embodiment of the present application when both are adsorbed on the vacuum adsorption table;

[0044] Figure 4 is a schematic diagram of the three-dimensional structure of the wafer carrier provided in an embodiment of the present application as viewed from a first end surface;

[0045] Figure 5 is a schematic diagram of the three-dimensional structure of the wafer carrier provided in an embodiment of the present application as viewed from the second end surface;

[0046] Figure 6 is a schematic diagram of the planar structure of the wafer carrier provided in an embodiment of the present application as viewed from the second end surface;

[0047] Figure 7 This is a structural disassembly diagram of the wafer conveying system provided in an embodiment of the present application.

[0048] Description of Figure Numbers:

[0049] 100, carrier body; 110, first end surface; 111, bearing boss; 112, placement groove; 113, guide opening; 114, stop structure; 1141, arc segment; 1142, guide segment; 120, second end surface; 121, groove; 122, adsorption area; 130, adsorption hole; 140, alignment groove; 150, first straight section; 160, second straight section; 170, first weight-reducing hole; 180, second weight-reducing hole;

[0050] 200, assembled wafer component; 210, wafer; 220, wafer carrier; 221, opening;

[0051] 300, transport arm;

[0052] 400, electrostatic chuck;

[0053] 500. Vacuum adsorption table. DETAILED DESCRIPTION

[0054] In the following description, specific details such as specific system structures and technologies are provided for illustration rather than limitation to facilitate a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid obstructing the description of the present application with unnecessary details.

[0055] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the specific implementation methods of the present application will be described below with reference to the accompanying drawings. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings and other implementation methods can be obtained based on these drawings without inventive work.

[0056] To simplify the drawings, only the parts related to the present application are schematically shown in each figure, and they do not represent the actual structure of the product. In addition, to simplify the drawings and facilitate understanding, in some figures, only one of the components with the same structure or function is schematically shown or labeled.

[0057] It should be noted that, unless otherwise specified or limited, the term "connection" should be understood in a broad sense. For example, it can mean a fixed connection, a detachable connection, or an integral connection; or a mechanical connection, or an electrical connection; or a direct connection, or an indirect connection through an intermediate medium. Those skilled in the art will understand the specific meanings of the above terms in this application in specific circumstances.

[0058] In the embodiments shown in the drawings, directional indications (such as up, down, left, right, front, and back, etc.) are not absolute but relative when describing the structure and movement of each component, and are not used to limit the direction of the product in actual use.

[0059] In addition, in the description of this application, ordinal numbers, such as "first", "second", etc., are only used to distinguish and describe related objects, and cannot be understood as indicating or implying the relative importance or order between related objects.

[0060] Typically, after the GaAs wafer is manufactured and thinned, it will be transported by the transport arm 300 to the AOI inspection equipment or reliability testing equipment to enter the AOI inspection or reliability testing phase, so that users can evaluate the quality and performance of the wafer 210. Figure 2 and Figure 3The process is roughly as follows: first, place the carrier 220 (which can be a PCB carrier or a metal Chuck tray) and the GaAs wafer on a vacuum adsorption table 500. Then, cover the GaAs wafer with a sapphire sheet. Next, open the vacuum adsorption table 500 to vacuum adsorb the wafer 210, carrier 220, and sapphire sheet, and use the sapphire sheet to flatten the wafer 200. Subsequently, remove the sapphire sheet, and apply UV tape (ultraviolet curing tape or light curing tape) to the inactive area at the edge of the wafer 210. After the application is completed, release the vacuum adsorption table 500 from the wafer 210, carrier 220, and sapphire sheet. Finally, place the wafer 210 and carrier 220 on the conveying arm 300. At this point, the wafer 210 and carrier 220 together form a combined wafer assembly 200. The conveying arm 300 can transport the combined wafer assembly 200 to the target location, realizing automated transportation and scanning of the wafer 210.

[0061] Because thinned GaAs wafers are thin, fragile, and warped, directly transporting them using the transport arm 300 can damage the wafer 210. To address this issue, the present application provides a wafer carrier capable of carrying the wafer 210 (and the carrier 220). The transport arm 300 transports the wafer 210 (and the carrier 220) by transporting the wafer carrier, thereby avoiding direct contact between the wafer 210 and the transport arm 300 and reducing the risk of wafer breakage.

[0062] In one embodiment, see Figure 4 、 Figure 5 and Figure 7 The wafer carrier includes a carrier body 100, which has a first end face 110 and a second end face 120, and the first end face 110 and the second end face 120 are arranged opposite to each other. Among them, the first end face 110 is provided with a placement groove 112, which is adapted to the contour of the wafer 200 and is used to carry the wafer 210; the second end face 120 is provided with a groove 121, which is suitable for docking with the electrostatic suction cup 400 on an external device (for example, AOI inspection equipment, reliability testing equipment), and the carrier body 100 is formed with a transfer area 122 around the groove 121, which is suitable for the conveying arm 300 to support and convey the carrier body 100. In addition, a plurality of adsorption holes 130 are also provided on the carrier body 100, which can connect the placement groove 112 and the groove 121, and are suitable for the electrostatic suction cup 400 to adsorb the wafer 200 in the placement groove 112.

[0063] When wafer 210 needs to be transported to external equipment for testing, wafer 210 is first placed in the placement slot 112 of the wafer carrier. Then, the transport arm 300 holds the transfer area 122 of the wafer carrier and transports wafer 210 to the top of the electrostatic chuck 400. The wafer 210 is placed by placing the wafer carrier on the electrostatic chuck 400. Finally, the transport arm 300 is withdrawn, and the electrostatic chuck 400 absorbs the wafer 210 through the absorption holes 130, so that the external equipment can test the wafer 210.

[0064] In this embodiment, by providing a placement groove 112 and making the placement groove 112 compatible with the contour of the wafer 210, it is possible to carry the wafer 210 while also limiting the position of the wafer 210. This allows the transport arm 300 to move the carrier body 100 while the wafer 210 located in the placement groove 112 to move stably along with the carrier body 100, thereby achieving indirect transport of the wafer 210 by the transport arm 300, avoiding direct contact between the wafer 210 and the transport arm 300, effectively reducing the risk of fragmentation, and improving the production yield of the wafer 210. In addition, this embodiment also provides a groove 121 capable of docking with external equipment and an adsorption hole 130 capable of connecting the groove 121 and the placement groove 112, so that the wafer 210 can be stably connected to the external equipment after being transported to the target position, which is beneficial to the progress of subsequent processes.

[0065] Among them, a plurality of suction holes (not shown) may be provided on the conveying arm 300, and vacuum adsorption between the conveying arm 300 and the transfer area 122 is achieved through the suction holes, so that the carrier body 100 can remain relatively stable with the conveying arm 300 during transportation, which is more conducive to the stable transportation of the wafer 210.

[0066] Further, see Figure 5 and Figure 6 Several adsorption holes 130 are radially arranged from the center of placement slot 112 toward the edge of placement slot 112, ensuring uniform force on wafer 210 when held by electrostatic chuck 400, thereby reducing the risk of damage to wafer 210. Furthermore, the diameter of adsorption holes 130 should be the same as or similar to the diameter of opening 221 on carrier 220 for electrostatic chuck 400 to hold wafer 210. The diameter should not be too large to prevent excessive adsorption force on wafer 210, which could result in breakage.

[0067] Specifically, see Figure 4 Figure 6A stop structure 114 is provided on the first end surface 110 for stopping the wafer 210. It is understandable that the overall thickness of the wafer 210 is relatively thin, and the depth of the placement groove 112 for accommodating the wafer 210 is mostly shallow. In order to prevent the wafer 210 from falling out of the placement groove 112 and shifting due to vibration during transportation, the present embodiment provides a stop structure 114 around the placement groove 112, which can limit the position of the wafer 210, reduce the positional shift and shaking that may occur during transportation, and prevent the wafer 210 from falling out of the placement groove 112, which is conducive to the stable transportation of the wafer 210 and also helps the transport arm 300 to accurately transport the wafer 210 to the target position.

[0068] The stop structure 114 may further be provided with a guide opening 113 , which is connected to the placement slot 112 and is used to guide the wafer 210 into or out of the placement slot 112 , so as to facilitate the direct docking of the carrier body with external equipment and realize rapid docking of the wafer 210 before and after transportation.

[0069] In one embodiment, the stop structure 114 may include an arc segment 1141 and a guide segment 1142. There are two guide segments 1142, one located at each end of the arc segment 1141 in the arc length direction. The arc segment 1141 has an inner concave surface, and the two guide segments 1142 are located on one side of the arc segment 1141 corresponding to the inner concave surface 1141. In this case, the arc segment 1141 and the guide segment 1142 can together form the placement slot 112, and the placement slot 112 has the guide opening 113 formed between the two guide segments 1142, forming an open slot structure.

[0070] In this embodiment, the guide opening 113 is used to allow the wafer 210 to enter or exit the placement tank 112. The guide sections 1142 located on both sides of the guide opening 113 serve as guides, allowing the wafer 210 to enter or exit the placement tank 112 more smoothly. The dimensions of the guide opening 113 are the same as or similar to the dimensions of the wafer 210, and the two guide sections 1142 extend away from the arc section 1141 at their ends, thereby forming a trumpet-shaped opening structure at the guide opening 113, which further facilitates the wafer 210 from entering the placement tank 112.

[0071] In actual production, the stop structure 114 can also be a stop block set at the edge of the placement groove 112 or a plurality of stop blocks set at intervals at the edge of the placement groove 112. The depth of the placement groove 112 can also be deepened to form the above-mentioned stop structure 114 at the edge of the placement groove. These will not be described in detail here, and all are within the scope of protection of this application.

[0072] Furthermore, the outline dimensions of the groove 121 defined on the second end surface 120 of the carrier body 100 should be larger than the outline dimensions of the electrostatic chuck 400. This can reduce the potential interference between the carrier body 100 and the electrostatic chuck 400 when the transport arm 300 transports the wafer 210 to the target location, thereby improving the equipment's fault tolerance. If the outline dimensions of the groove 121 are consistent with the outline dimensions of the electrostatic chuck 400, then even a slight error would make it difficult for the transport arm 300 to place the carrier body 100 on the electrostatic chuck 400, resulting in interference between the carrier body 100 and the electrostatic chuck 400, affecting subsequent processes.

[0073] Considering that setting the groove 121 slightly larger than the electrostatic suction cup 400 can reduce interference, there will be a problem of the wafer 200 not being placed in place. For example, if there is a position deviation between the carrier body 100 and the electrostatic suction cup 400, resulting in the wafer 210 not being coaxial with the electrostatic suction cup 400, on the one hand, the adsorption effect of the electrostatic suction cup 400 on the wafer 210 will be deteriorated, affecting subsequent inspections. On the other hand, the adsorption force exerted on the wafer 210 by the electrostatic suction cup 400 will become uneven, which can easily cause damage to the wafer 210.

[0074] For this, see Figures 4 to 6 The wafer carrier further includes a placement position verification position, which is located on the side of the carrier body 100 opposite the guide port 113 and is used to verify the relative position relationship between the carrier body 100 and the electrostatic chuck 400, thereby assisting in the alignment between the carrier body 100 and the electrostatic chuck 400. In this way, when the relative position between the carrier body 100 and the wafer 210 is restricted by the stop structure 114, the carrier body 100 and the electrostatic chuck 400 are precisely aligned to achieve precise positioning of the wafer 210 and the electrostatic chuck 400. This is more conducive to the electrostatic chuck 400 applying a uniform suction force to the wafer 210, resulting in a better suction effect and preventing the wafer 210 from being damaged due to excessive local force.

[0075] Specifically, the placement position check position includes at least one alignment groove 140, which is opened on the side wall of the carrier body 100, and the two ends of the alignment groove 140 in the extension direction extend to the first end face 110 and the second end face 120 respectively, so as to match the alignment structure on the external device, thereby realizing the positioning between the carrier body 100 and the electrostatic suction cup 400, so that the wafer 210 and the electrostatic suction cup 400 are coaxial, ensuring that the electrostatic suction cup 400 can firmly adsorb the wafer 210 and reduce the risk of wafer 200 breakage.

[0076] Specifically, the transport arm 300 first transports the wafer carrier and the wafer 210 thereon to the electrostatic chuck 400. At this time, there may be a position deviation between the electrostatic chuck 400 and the wafer 210. Through the docking cooperation between the alignment groove 140 and the docking structure, precise positioning between the wafer and the electrostatic chuck 400 is achieved. In this way, coaxial positioning of the wafer 210 and the electrostatic chuck 400 can be achieved with reduced interference, and the structural setting is more reasonable.

[0077] Optionally, the number of alignment slots 140 can be two, which provides more accurate and stable alignment than a single alignment slot 140. The two alignment slots 140 can both be located on the side of the carrier body 100 away from the guide opening 113. Of course, the alignment slots 140 can also both be located on the side of the carrier body 100 close to the guide opening 113, or on opposite sides of the carrier body 100. This is not a limitation and can be flexibly configured based on actual conditions, such as the specific structure of AOI inspection equipment or reliability testing equipment, all within the scope of protection of this application.

[0078] Furthermore, the wafer carrier also includes a wafer flat edge calibration position, which is provided on the carrier body 100 and is used to calibrate the orientation of the wafer 210 after it is placed on the carrier body 100, so that the wafer 210 can better dock with the back-end equipment, making the production line run stably and reducing the error rate.

[0079] Specifically, the sidewall of the carrier body 100 includes a first straight section 150 . The first straight section 150 is located on a side of the carrier body 100 close to or away from the guide port to form the wafer flat edge calibration position.

[0080] In an exemplary embodiment, the first straight section 150 and the alignment groove 140 are respectively arranged on opposite sides of the carrier body 100. For example, the two alignment grooves 140 can be both arranged on the side of the carrier body 100 away from the guide port 113, and the first straight section 150 is arranged on the side of the carrier body 100 close to the guide port 113.

[0081] Furthermore, the carrier body 100 is a plate-shaped structure, in which the first end surface 110 is provided with a supporting boss 111, and the placement groove 112 is formed on the supporting boss 111. In contrast, the groove 121 is formed in the area of the second end surface 120 corresponding to the supporting boss 111 and extends deep into the supporting boss 111.

[0082] Typically, to allow for the placement slot 112 and the groove 121 to be defined on the first end face 110 and the second end face 120, respectively, the overall thickness of the carrier body 100 is relatively thick, and must be greater than the combined depth of the placement slot 112 and the groove 121. Considering the need for lightweight production, this embodiment thins the area of the carrier body 100 outside the groove 121 (e.g., the adsorption area 122), giving the carrier body 100 a plate-like structure. The provision of the supporting boss 111 provides sufficient thickness for the placement slot 112 and the groove 121, thereby achieving lightweight production.

[0083] Optionally, the groove 121 on the carrier body 100 is formed by stamping the carrier body 100 using a stamping process. After stamping, the carrier body 100 forms the aforementioned support boss 111 on its first end surface 110. The placement groove 112 is formed on the support boss 111 formed after stamping. This embodiment uses a stamping process to form the required carrier body 100, which simplifies the molding process and reduces material waste, facilitating the mass production of wafer carriers.

[0084] Of course, considering that the structure of the carrier body 100 located outside the supporting boss 111 can form a transfer area 122 on the second end surface 120, which is a structure for the transfer arm 300 to pass through, when designing the dimensions, attention should be paid to the distance between the edge of the supporting boss 111 and the edge of the carrier body 100, which should not be too large or too small. We will not elaborate on this here, and it can be flexibly set according to the actual structure of the transfer arm 300. In addition, in all of the above embodiments, the dimensions of various parts of the wafer carrier (such as the dimensions of the groove 121 and the dimensions of the placement slot 112) can also be customized to accommodate wafers 200 of different sizes, all of which are within the scope of protection of this application.

[0085] Optionally, the carrier body 100 is made of aluminum alloy, which has high strength and low density, and is conducive to lightweight production of wafer carriers.

[0086] To further enhance the lightweight production of the wafer carrier and reduce material costs, the sidewalls of the carrier body 100 may further include two second straight sections 160, one located on opposite sides of the guide opening 113. Compared to a structure with a circular overall contour of the carrier body 100, the structure with the straight sections 160 is easier to form and simplifies the manufacturing process, while also facilitating lighter production.

[0087] In one embodiment, the carrier body 100 can be directly constructed in a rectangular plate shape, and after a stamping process, the groove 121 and the supporting boss 111 are formed. In this case, the side wall of the carrier body 100 near the guide opening 113 is the first straight section 150, and the side walls on both sides of the first straight section 150 are the two second straight sections 160. The corners of the carrier body 100 are preferably rounded to prevent scratches on other external devices or injuries to the user.

[0088] In addition, a number of weight-reducing holes may be opened on the carrier body 100 to reduce the overall weight of the wafer carrier, thereby also achieving lightweight production of the wafer carrier.

[0089] Specifically, the weight-reducing holes may include a first weight-reducing hole 170 and a second weight-reducing hole 180. The first weight-reducing hole 170 is arranged on the peripheral side of the supporting boss 111, and the second weight-reducing hole 180 is arranged at the corners of the carrier body 100. The shapes of the first weight-reducing hole 170 and the second weight-reducing hole 180 may be the same or different.

[0090] For example, the first weight-reducing hole 170 is located on the peripheral side of the supporting boss 111 and is an arrow-shaped hole structure pointing to the supporting boss 111 or the center of the placement groove 112; the second weight-reducing hole 180 is an arc-shaped hole having an inner concave side and an outer convex side, and the inner concave side of the second weight-reducing hole 180 is set toward the supporting boss 111.

[0091] Of course, in actual production, the shapes and layouts of the first weight-reducing holes 170 and the second weight-reducing holes 180 are not limited thereto, and will not be elaborated here, as they are all within the scope of protection of this application.

[0092] See also Figure 7 The present application also provides a wafer conveying device, comprising a conveying arm 300 and a wafer carrier provided by any of the above embodiments. The wafer carrier is used to carry the wafer 210, and the conveying arm 300 is used to support the wafer carrier and convey the wafer carrier and the wafer 210 carried thereon to the electrostatic chuck 400 of an external device (e.g., AOI inspection equipment, reliability testing equipment). During the conveying process of the wafer 210, the conveying arm 300 does not directly contact the wafer 200, reducing the risk of wafer breakage.

[0093] Further, see Figure 7The present application also provides a wafer conveying system, comprising a wafer 210, a carrier 220, and the wafer conveying device provided in the above-mentioned embodiment. The carrier 220 is used to carry the wafer 210. After the wafer 210 is fixed on the carrier 220 to form a combined wafer component 200, the combined wafer component 200 (wafer 210 and carrier 220) is placed on a wafer carrier for conveyance by a conveying arm 300. The carrier 220 is provided with a plurality of openings 221, and the openings 221 are arranged in a one-to-one correspondence with the adsorption holes 130.

[0094] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0095] It should be noted that the above embodiments can be freely combined as needed. The above are only preferred implementations of the present application. It should be noted that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application, and these improvements and modifications should also be considered as the scope of protection of the present application.

Claims

1. A wafer carrier, characterized in that: include: The carrier body has a first end surface and a second end surface, wherein the first end surface and the second end surface are opposite to each other; The first end surface is provided with a placement groove, which is adapted to the wafer contour and is used to carry the wafer; the second end surface is provided with a groove, which is suitable for docking with an electrostatic chuck on an external device, and the carrier body is formed with a conveying area around the groove, which is suitable for a conveying arm to support and convey the carrier body; and, A plurality of adsorption holes are provided on the carrier body, and the adsorption holes are connected to the placement slot and the groove, and are suitable for an electrostatic chuck to adsorb the wafer in the placement slot.

2. The wafer carrier according to claim 1, wherein: The first end surface is provided with a stop structure on the peripheral side of the placement groove, and the stop structure is used to stop the wafer.

3. The wafer carrier according to claim 2, wherein: The stop structure is provided with a guide opening, which is communicated with the placement groove and is used for guiding the wafer to enter or withdraw from the placement groove.

4. The wafer carrier according to claim 3, wherein: The stop structure includes an arc segment and a guide segment. There are two guide segments, one at each end of the arc segment in the arc length direction. The arc segment has an inner concave surface, and the two guide segments are both provided on one side of the arc segment corresponding to the inner concave surface. The arc segment and the guide segment are jointly arranged to form the placement groove, and the guide opening is formed between the stop structure and the two guide segments.

5. The wafer carrier according to claim 3, wherein: Also includes: The placement position verification position is provided on a side of the carrier body opposite to the guide port, and is used to verify the relative position relationship between the carrier body and the electrostatic chuck.

6. The wafer carrier according to claim 5, wherein: The placement position check position includes at least one alignment groove, which is opened on the side wall of the carrier body, and the two ends of the alignment groove in the extension direction extend to the first end surface and the second end surface respectively.

7. The wafer carrier according to claim 3, wherein: Also includes: The wafer flat edge verification position is provided on the carrier body and is used to verify the orientation of the wafer after it is placed on the carrier body.

8. The wafer carrier according to claim 7, wherein: The side wall of the carrier body includes a first straight section, and the first straight section is located on a side of the carrier body close to or away from the guide port to form the wafer flat edge calibration position.

9. The wafer carrier according to claim 3, wherein: The side wall of the carrier body includes two second straight sections, each of which is located on two opposite sides of the guide opening.

10. The wafer carrier according to any one of claims 1 to 9, characterized in that: The carrier body is in a plate-shaped structure, the groove is obtained by stamping the carrier body using a stamping process, and the placement groove is provided on the bearing boss formed after stamping.

11. The wafer carrier according to claim 10, wherein: The corners of the carrier body are in arc transition.

12. The wafer carrier according to claim 11, wherein: The carrier body is provided with a plurality of weight-reducing holes.

13. The wafer carrier according to claim 12, wherein: The weight-reducing holes include a first weight-reducing hole and a second weight-reducing hole. The first weight-reducing hole is arranged on the peripheral side of the bearing boss, and the second weight-reducing hole is arranged at the corners of the carrier body.

14. The wafer carrier according to claim 13, wherein: The second weight-reducing hole is an arc-shaped hole having an inner concave side and an outer convex side, and the inner concave side of the second weight-reducing hole is arranged toward the bearing boss.

15. The wafer carrier according to any one of claims 1 to 9, characterized in that: The plurality of adsorption holes are radially arranged from the center of the placement groove to the edge of the placement groove.

16. The wafer carrier according to any one of claims 1 to 9, characterized in that: The outline size of the groove is larger than the outline size of the electrostatic chuck.

17. A wafer conveying device, characterized in that: include: A conveying arm and a wafer carrier according to any one of claims 1 to 16; The wafer carrier is used to carry the wafer, and the transport arm is used to support the wafer carrier and transport the wafer carrier and the wafer to the electrostatic chuck of an external device.

18. A wafer conveying system, characterized in that: include: A wafer, a carrier, and a wafer conveying device according to claim 17; The wafer is suitable for being fixed on the carrier, and the wafer carrier carries the carrier and the wafer, wherein the carrier is provided with a plurality of openings, and the openings and the adsorption holes are arranged in a one-to-one correspondence.

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