Power tube lead frame

Abstract

The utility model discloses a power tube lead frame which can increase the bonding force between a chip and a slide glass substrate, is not easy to generate cavities and air holes during welding, and can increase the bonding firmness of a plastic packaging material and the power tube lead frame, and the structure of the power tube lead frame comprises a pin support, a plurality of pin groups are arranged on the pin support, and the pin groups are arranged on the pin support. Each pin group comprises three pins which are parallel to one another, the middle parts and the bottom ends of all the pins are connected through pin brackets, and the middle pin in each pin group is connected with a slide substrate; a plurality of protruding parts are arranged on the face, used for installing a chip, of the slide glass substrate, and through holes used for plastic package reinforcement are formed in the positions, close to the slide glass substrate, of the middle pins. The power tube lead frame provided by the utility model is mainly used as lead frames of various power tubes.

Description

Technical Field

[0001] The utility model relates to a lead frame of an integrated circuit, in particular to a lead frame of a power transistor. Background Art

[0002] As a chip carrier of an integrated circuit, a lead frame is a key structural component that realizes the electrical connection between the internal circuit lead-out ends of a chip and external leads by means of a bonding material to form an electrical loop, and it plays a role as a bridge for connecting with external wires. At present, plastic-encapsulated lead frames are required in most semiconductor integrated blocks. The front surface of the carrier substrate in the existing lead wire frame is flat and very smooth, and the bonding force when bonding with the chip is insufficient, and the chip often gets damaged due to falling off. At the same time, voids and pores will occur when soldering the chip with solder wire; in addition, the combination of the plastic-encapsulation material and the lead frame is not firm enough during plastic encapsulation. Summary of the Utility Model

[0003] The technical problem to be solved by the utility model is to provide a lead frame of a power transistor that can increase the bonding force between the chip and the carrier substrate, is not easy to generate voids and pores during welding, and can increase the firmness of the combination of the plastic-encapsulation material and the lead frame.

[0004] To solve the above technical problem, the technical solution adopted by the utility model is: a lead frame of a power transistor, including: a pin support, on which several pin groups are provided, each pin group includes three mutually parallel pins, the middle and bottom ends of all pins are connected by a connected pin support, and the middle pin in each pin group is connected with a carrier substrate; on the surface of the carrier substrate for installing the chip, several convex parts are provided, and the middle pin is provided with through holes for plastic-encapsulation reinforcement near the carrier substrate.

[0005] As a preferred solution, in the lead frame of a power transistor, the several convex parts are arranged in an array structure.

[0006] As a preferred solution, in the lead frame of a power transistor, the convex part is a spherical crown-shaped convex part.

[0007] As a preferred solution, in the lead frame of a power transistor, the middle pin is provided with a trapezoidal connecting part connected to the carrier substrate at its connection end with the carrier substrate, and the top end connected to the carrier substrate is larger than the middle pin.

[0008] As a preferred solution, in the lead frame of a power transistor, the through holes for plastic-encapsulation reinforcement are arranged in the middle of the width direction of the middle pin.

[0009] The beneficial effects of the utility model are:

[0010] 1. The utility model increases the roughness of the carrier substrate by arranging a plurality of convex portions on the surface for mounting the chip, i.e., the placement surface, of the carrier substrate, so that the chip will not be damaged due to falling off during bonding with the chip, and it is not easy to generate voids and pores during chip soldering, increasing the bonding force of the chip. In addition, by opening through holes for plastic encapsulation reinforcement near the carrier substrate on the intermediate lead, when plastic encapsulating, the plastic encapsulation material forms columnar positioning ribs at the through holes for plastic encapsulation reinforcement, increasing the firmness of the combination of the plastic encapsulation material and the lead frame.

[0011] 2. The utility model sets the convex portion as a spherical crown-shaped convex portion, so that only corresponding bumps need to be stamped on the back surface of the carrier substrate, greatly reducing the processing difficulty; at the same time, it can also prevent the convex portion from damaging the chip.

[0012] 3. The utility model increases the connection area with the carrier substrate by arranging a trapezoidal connection portion with a top larger than the cross-section of the intermediate lead at the connection end of the intermediate lead and the carrier substrate, making the connection between the carrier substrate and the intermediate lead more firm.

[0013] 4. The utility model arranges the through holes for plastic encapsulation reinforcement in the middle of the width direction of the intermediate lead to minimize the influence on the strength of the intermediate lead on both sides of the through holes for plastic encapsulation reinforcement, thus ensuring the overall strength of the intermediate lead. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a schematic structural diagram of a power transistor lead frame described in the utility model.

[0015] Figure 2 is Figure 1 a partial sectional structural diagram.

[0016] Figures 1 to 2 The reference numerals in [[ ]] are respectively: 1. Pin support, 11. First pin, 12. Intermediate pin, 120. Trapezoidal connection portion, 121. Through hole for plastic encapsulation reinforcement, 13. Third pin, 2. Carrier substrate, 21. Spherical crown-shaped convex portion. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0017] The following combines the drawings to describe in detail the specific implementation scheme of a power transistor lead frame described in the utility model.

[0018] As Figure 1As shown in the figure, a power transistor lead frame of the present utility model has a structure including: a pin support 1, on which several pin groups are provided. Each pin group includes: three mutually parallel first pins 11 (located on the left), a second pin, i.e., the middle pin 12, and a third pin 13 (located on the right). That is, the middle and bottom ends of all the first pins 11, middle pins 12, and third pins 13 are connected by the pin support 1 that needs to be cut off finally. On the top end of the middle pin 12 in each pin group, a trapezoidal connecting portion 120 with a cross-section larger than that of the middle pin 12 at its top end is provided. A through hole 121 for plastic encapsulation reinforcement is centrally opened in the trapezoidal connecting portion 120 in its width direction. A carrier substrate 2 is connected to the trapezoidal connecting portion 120 of the middle pin 12. On the surface of the carrier substrate 2 for mounting the chip, several spherical crown-shaped protrusions 21 are arranged in an array (see Figure 2 shown).

[0019] The present utility model increases the roughness of the corresponding surface of the carrier substrate 2 by arranging spherical crown-shaped protrusions 21 in an array on the surface of the carrier substrate 2 for mounting the chip, so that when bonding with the chip, the chip will not be damaged due to falling off, and it is not easy to generate voids and pores during chip soldering, increasing the bonding force of the chip. In addition, by opening a through hole 121 for plastic encapsulation reinforcement at the position where the middle pin 12 is close to the carrier substrate 2, when plastic encapsulating, the plastic encapsulation material forms columnar positioning ribs at the through hole 121 for plastic encapsulation reinforcement, increasing the firmness of the combination of the plastic encapsulation material and the lead frame.

[0020] In summary, the above is only a preferred embodiment of the present utility model, and is not used to limit the scope of implementation of the present utility model. Any equivalent changes and modifications made according to the shape, structure, features, and spirit described in the scope of the claims of the present utility model should be included in the scope of the claims of the present utility model.

Claims

1. A power tube lead frame, comprising: A pin bracket is provided with several pin groups, each pin group includes three pins parallel to each other, the middle and bottom ends of all the pins are connected through the connected pin brackets, and the middle pin in each pin group is connected to the carrier substrate; it is characterized in that the carrier substrate is provided with several protrusions on the side for mounting the chip, and the middle pin is provided with a through hole for plastic sealing reinforcement near the carrier substrate.

2. The power tube lead frame according to claim 1, characterized in that: The plurality of protrusions are arranged in an array structure.

3. The power tube lead frame according to claim 1, characterized in that: The raised portion is a spherical crown-shaped raised portion.

4. The power tube lead frame according to claim 1, characterized in that: The middle pin is provided with a trapezoidal connecting portion on the connecting end thereof with the carrier substrate, the top end of which is larger than the horizontal surface of the middle pin.

5. A power tube lead frame according to any one of claims 1 to 4, characterized in that: The through hole for plastic encapsulation reinforcement is centrally arranged in the width direction of the middle pin.

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