Laser receiving circuit for laser communication system

Through the combined design of photodiode and current mirror circuit, the problem of signal attenuation of optical data transmitters in harsh environments is solved, and high sensitivity and low noise optical signal reception is achieved, which is suitable for high-speed optical communication systems.

CN223194716UActive Publication Date: 2025-08-05BEYI LASER TECH (HUZHOU) CO LTD
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Patent Information

Application Number
CN202422496440.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-10-16
Publication Date
2025-08-05
Estimated Expiration
2034-10-16

AI Technical Summary

Technical Problem

In harsh environments, existing optical data transmitters are susceptible to dust and mist, resulting in attenuation of optical signals, degradation of signal quality, and may even cause an increase in bit error rate or interruption of transmission.

Method used

The combined circuit design of photodiode, current mirror circuit, operational amplifier module U1, limiting amplifier module U2 and voltage follower circuit is adopted. The signal stability is enhanced through current mirror technology, and high input impedance and low output impedance characteristics are used to ensure the high-frequency transmission quality of the signal with a limited amplifier.

Benefits of technology

It realizes high-sensitivity optical signal reception under complex operating conditions, reduces noise interference, and ensures signal amplification accuracy and high-speed transmission quality.

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Abstract

The utility model relates to a laser receiving circuit for a laser communication system. The laser receiving circuit comprises a photodiode PD, a current mirror circuit, an operational amplifier module U1, a limiting amplifier module U2 and a voltage follower circuit, the photodiode PD, the current mirror circuit, the operational amplifier module U1 and the limiting amplifier module U2 are sequentially connected in series, and the voltage follower circuit is arranged at a third interface of the limiting amplifier module U2. The current mirror circuit provided by the utility model has the characteristics of high input impedance and low output impedance, and enhances the stability and consistency of current signals, thereby reducing the introduction of noise. And subsequent amplitude limiting amplification is carried out to ensure the high-frequency transmission quality of the signal. The utility model has the characteristics of high sensitivity, low noise, high signal amplification precision and the like, and is suitable for a high-speed optical communication system.
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Description

Technical Field

[0001] The utility model relates to the field of photoelectric conversion, in particular to a laser receiving circuit for a laser communication system. Background Art

[0002] Optical data transmitters use visible and invisible light as information carriers, eliminating the need for wired media like optical fibers or network cables, and instead transmit information wirelessly over the air. Their operating principle is to transmit digital signals by driving a light source to rapidly dim, dim, and control the light. Relying on extremely high optical frequencies for bidirectional transmission and reception, they achieve ultra-high-speed, highly secure, highly reliable, and low-latency wireless optical communication. Existing optical data transmitters typically employ photoelectric conversion technology, using optical components to achieve contactless data transmission, and are widely used in fields such as industrial automation. However, in harsh industrial environments, dust and fog can scatter or absorb optical signals, weakening the transmitted light intensity and reducing the received optical power. This phenomenon is common in optical data transmission, especially over long distances. Suspended matter in the environment can significantly affect signal quality, leading to signal attenuation and potentially even increased bit error rates or transmission interruptions. Therefore, in complex environments, optical transmission equipment requires more sensitive optical signal receiving circuits to mitigate these adverse factors. Summary of the Invention

[0003] The purpose of the present invention is to overcome the above-mentioned shortcomings and provide a laser receiving circuit for a laser communication system, which has a more sensitive optical signal to complete the receiving work of the optical data transmitter under complex working conditions.

[0004] According to the technical solution provided by the utility model, a laser receiving circuit for a laser communication system includes a photodiode PD, a current mirror circuit, an operational amplifier module U1, a limiting amplifier module U2 and a voltage follower circuit;

[0005] The photodiode PD, the current mirror circuit, the operational amplifier module U1 and the limiting amplifier module U2 are connected in series in sequence, and the voltage follower circuit is provided at the third interface of the limiting amplifier module U2;

[0006] The photodiode PD operates in a reverse bias state, converting the received light signal into a weak current signal. The weak current output by it passes through the input end of the current mirror circuit, so that the current at the output end of the current mirror circuit is proportional to the input current. Through the current replication effect of the current mirror, the weak photocurrent signal is copied and input to the operational amplifier module U1 for subsequent voltage amplification; the signal after preliminary amplification by the operational amplifier module U1 is input to the limiting amplifier module U2; the limiting amplifier module U2 further amplifies the signal and ensures that the signal is not overloaded or distorted during high-speed transmission; the voltage follower circuit is used to monitor the voltage signal of the limiting amplifier module U2.

[0007] As a further improvement of the present invention, the cathode of the photodiode PD is connected to the +9V input voltage through a resistor R1, one end of the capacitors C1 and C2 connected in parallel is connected to the cathode of the photodiode PD, the other end of the capacitors C1 and C2 connected in parallel is grounded, the anode of the photodiode PD is connected to one end of the resistor R2, and the other end of the resistor R2 is grounded.

[0008] As a further improvement of the present invention, the current mirror circuit includes a transistor Q1 and a transistor Q2, the base of the transistor Q1 is connected to the base of the transistor Q2, the collector of the transistor Q2 is connected to the anode of the photodiode PD, the collector of the transistor Q2 is connected to the base of the transistor Q1, the emitters of the transistor Q1 and the transistor Q2 are grounded, and the collector of the transistor Q1 is connected to the second interface of the operational amplifier module U1 through the capacitor C3.

[0009] As a further improvement of the present utility model, the fourth interface of the operational amplifier module U1 is connected to the eighth interface through the capacitor C10, one end of the capacitors C4 and C5 connected in parallel is connected to the power supply VCC and one end of the inductor L1, the other end of the capacitors C4 and C5 connected in parallel is grounded, one end of the capacitors C6 and C7 connected in parallel is simultaneously connected to the other end of the inductor L1 and the eighth interface of the operational amplifier module U1, the other end of the capacitors C6 and C7 connected in parallel is grounded, and the fifth interface of the operational amplifier module U1 is grounded.

[0010] As a further improvement of the present utility model, the first interface of the limiting amplifier module U2 is connected to one end of the resistor R5 and the resistor R4 respectively, the other end of the resistor R5 is connected to the twentieth interface of the limiting amplifier module U2, the other end of the resistor R4 is grounded, the second interface of the limiting amplifier module U2 is connected to the 3.3V power supply through the capacitor C11, the third interface of the limiting amplifier module U2 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the voltage follower circuit; the fourth interface and the fifth interface of the limiting amplifier module U2 are the signal negative input terminal and the positive input terminal, one end of the capacitor C8 is connected to the fourth interface of the limiting amplifier module U2, the other end of the capacitor C8 is connected to the sixth interface of the operational amplifier module U1, and one end of the capacitor C9 is connected to the fifth interface of the limiting amplifier module U2 The other end of the capacitor C9 is connected to the seventh interface of the operational amplifier module U1, the sixth interface, the seventh interface and the eighth interface of the limiting amplifier module U2 are all grounded, the ninth interface and the tenth interface of the limiting amplifier module U2 are connected through the capacitor C12, the twelfth interface and the thirteenth interface of the limiting amplifier module U2 are the positive and negative signal output ends, and are connected to the processor through capacitors C15 and C16 respectively, one end of the resistor R7 is connected to the twelfth interface of the limiting amplifier module U2, and the other end of the resistor R7 is grounded, one end of the resistor R8 is connected to the thirteenth interface, and the other end of the resistor R8 is grounded, the eighteenth interface, the seventeenth interface, the nineteenth interface and the eleventh interface of the limiting amplifier module U2 are connected to the 3.3V power supply, and the twenty-first interface of the limiting amplifier module U2 is grounded.

[0011] As a further improvement of the present invention, the voltage follower circuit includes a chip U3, the first interface of the chip U3 is connected to the processor through a resistor R9, the second interface is the inverting input end directly connected to the first interface, the third interface is connected to the third interface of the limiting amplifier module U2 through a resistor R3, the fourth interface is grounded, and the eighth interface is respectively connected to one end of the capacitor C13 and the inductor L2, the other end of C13 is grounded, and the other end of the inductor L2 is connected to the power supply VCC.

[0012] As a further improvement of the present invention, the operational amplifier module U1 adopts the chip AD8015.

[0013] As a further improvement of the present invention, the limiting amplifier module U2 adopts the chip MAX3969.

[0014] As a further improvement of the present invention, the chip U3 adopts the chip NE5532.

[0015] The beneficial effects of the present invention are:

[0016] This circuit utilizes the high input impedance and low output impedance of current mirror technology at the AD8015 input stage to enable photodiode signal detection in low-light conditions. This technology also effectively isolates the photodiode from subsequent circuitry, preventing current variations caused by load effects. This enhances the stability and consistency of the current signal, thereby reducing the introduction of noise. The MAX3969 performs subsequent limiting amplification, ensuring high-frequency signal transmission quality. This utility model offers high sensitivity, low noise, and precise signal amplification, making it suitable for high-speed optical communication systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is an overall circuit diagram of the utility model. DETAILED DESCRIPTION

[0018] The present invention will be further described below with reference to the embodiments in the accompanying drawings:

[0019] like Figure 1 As shown, a laser receiving circuit for a laser communication system includes a photodiode PD, a current mirror circuit, an operational amplifier module U1, a limiting amplifier module U2 and a voltage follower circuit; the photodiode PD, the current mirror circuit, the operational amplifier module U1 and the limiting amplifier module U2 are connected in series in sequence, and the voltage follower circuit is arranged at the third interface of the limiting amplifier module U2.

[0020] The operational amplifier module U1 uses the chip AD8015; the limiting amplifier module U2 uses the chip MAX3969; and the chip U3 uses the NE5532.

[0021] The cathode of the photodiode PD is connected to the +9V input voltage via resistor R1. One end of the parallel connection of capacitors C1 and C2 is connected to the cathode of the photodiode PD, and the other end of the parallel connection of capacitors C1 and C2 is grounded. The anode of the photodiode PD is connected to one end of resistor R2, the other end of which is grounded. The photodiode operates in a reverse biased state, converting the received light signal into a weak current signal. The weak current output by the photodiode passes through the input of a current mirror, making the current at the output of the current mirror proportional to the input current. Through the current mirror's current replication function, the weak photocurrent signal is replicated and input to the AD8015 for subsequent voltage amplification. The photodiode PD, resistors R1 and R2, capacitors C1 and C2 form the photodetection and current signal conditioning circuit. After receiving the light signal, the photodiode PD generates a weak current, which passes through resistors R1 and R2 to provide initial signal conditioning. Capacitors C1 and C2 filter out unwanted high-frequency noise to ensure the quality of the input signal.

[0022] The current mirror circuit includes a transistor Q1 and a transistor Q2, wherein the base of the transistor Q1 is connected to the base of the transistor Q2, the collector of the transistor Q2 is connected to the anode of the photodiode PD, the collector of the transistor Q2 is connected to the base of the transistor Q1, and the emitters of the transistor Q1 and the transistor Q2 are grounded, thereby ensuring that the working states of the two transistors are consistent. The current I flowing through the collector of Q1 OUT This replicated current is fed to the AD8015 high-speed operational amplifier. The collector of transistor Q1 is connected to the second port of operational amplifier module U1 via capacitor C3. The current mirror circuit receives the weak output current of the photodiode and improves the stability of the current signal. This current mirror circuit is placed at the input stage of the AD8015, enabling the weak current output by the photodiode PD to be effectively detected and output to the next-stage operational amplifier module U1 without affecting the input impedance. Two matched NPN transistors Q1 and Q2 are used: Q2 is used to collect the input current, and Q1 is used to output a current proportional to the input current.

[0023] The fourth interface of the operational amplifier module U1 is connected to the eighth interface via the capacitor C10. One end of the capacitors C4 and C5 connected in parallel is connected to the power supply VCC and one end of the inductor L1. The other end of the capacitors C4 and C5 connected in parallel is grounded. One end of the capacitors C6 and C7 connected in parallel is simultaneously connected to the other end of the inductor L1 and the eighth interface of the operational amplifier module U1. The other end of the capacitors C6 and C7 connected in parallel is grounded. The fifth interface of the operational amplifier module U1 is grounded. The current signal I output by the current mirror OUT It is connected to the input of AD8015 to preliminarily amplify the current signal output by the current mirror and convert it into a differential voltage output. The low noise and high bandwidth characteristics ensure the quality and speed of signal amplification.

[0024] Capacitors C3, C4, C5, C6, C7, C10, inductor L1, and chip AD8015 form a high-speed operational amplifier module U1. Capacitors C4, C5, C6, and C7 are the power input capacitors of AD8015, and together with inductor L1, they form a π-type filter for filtering and reducing noise. The current I flowing through the collector of Q1 OUT It is connected to the input of AD8015 through capacitor C3 to ensure that the DC bias does not enter the next stage circuit and improve the dynamic response range of the circuit through AC coupling. The fourth interface of AD8015, namely the VBYP port, is connected to the power supply through capacitor C10 to improve the noise resistance of the circuit.

[0025] The first interface of the limiting amplifier module U2 is connected to one end of the resistor R5 and the resistor R4 respectively, the other end of the resistor R5 is connected to the twentieth interface of the limiting amplifier module U2, the other end of the resistor R4 is grounded, the second interface of the limiting amplifier module U2 is connected to the 3.3V power supply through the capacitor C11, the third interface of the limiting amplifier module U2 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the voltage follower circuit; the fourth interface and the fifth interface of the limiting amplifier module U2 are the signal negative input terminal and the positive input terminal, one end of the capacitor C8 is connected to the fourth interface of the limiting amplifier module U2, the other end of the capacitor C8 is connected to the sixth interface of the operational amplifier module U1, one end of the capacitor C9 is connected to the fifth interface of the limiting amplifier module U2, and the other end of the capacitor C9 is connected to the The end is connected to the seventh interface of the operational amplifier module U1, the sixth interface, the seventh interface and the eighth interface of the limiting amplifier module U2 are all grounded, the ninth interface and the tenth interface of the limiting amplifier module U2 are connected through capacitor C12, the twelfth interface and the thirteenth interface of the limiting amplifier module U2 are the positive output end and the negative output end of the signal, and are connected to the processor through capacitors C15 and C16 respectively, one end of the resistor R7 is connected to the twelfth interface of the limiting amplifier module U2, and the other end of the resistor R7 is grounded, one end of the resistor R8 is connected to the thirteenth interface, and the other end of the resistor R8 is grounded, the eighteenth interface, the seventeenth interface, the nineteenth interface and the eleventh interface of the limiting amplifier module U2 are connected to the 3.3V power supply, and the twenty-first interface of the limiting amplifier module U2 is grounded.

[0026] After initial amplification by the AD8015, the signal is input to the MAX3969. The MAX3969 further amplifies the signal and ensures that it is not overloaded or distorted during high-speed transmission. After limiting amplification, the signal can be directly used in subsequent optical communication processing systems. Resistors R4, R5, and R6 set the voltage bias to ensure that the MAX3969 operates under the proper operating conditions. Capacitors C11 and C14 filter and stabilize the signal, eliminating high-frequency noise and ensuring accurate data transmission. The output of the AD8015 is connected to the input of the MAX3969 via coupling capacitors C8 and C9. AC coupling blocks the DC component, allowing AC signals to be transmitted between different voltage bias points, thereby eliminating DC bias differences between different circuits and preventing any impact on subsequent stages.

[0027] The MAX3969's output signals FX_RD+ and FX_RD- are differential output signals. The MAX3969 sends the processed signals to the subsequent processor chip through these two pins.

[0028] The voltage follower circuit includes a chip U3, the first interface of which is connected to the processor through a resistor R9, the second interface is the inverting input end directly connected to the first interface, the third interface is connected to the third interface of the limiting amplifier module U2 through a resistor R3, the fourth interface is grounded, and the eighth interface is respectively connected to one end of the capacitor C13 and the inductor L2, the other end of C13 is grounded, and the other end of the inductor L2 is connected to the power supply VCC.

[0029] In the design of the chip MAX3969, a voltage follower circuit can be configured to monitor the voltage signal input to the chip and stably transmit this voltage to the processor system without affecting the normal operation of the MAX3969.

[0030] The NE5532 is configured as a voltage follower circuit to monitor the signal power at the RSSI terminal of the MAX3969. The voltage follower circuit provides high input impedance to ensure that it does not affect the normal operation of the MAX3969, while its low output impedance ensures that the signal is stably transmitted to the monitoring circuit.

[0031] RX_PWR_MON is the output of the voltage follower circuit, which monitors the optical power information at the RSSI end of the MAX3969 and transmits it to the subsequent processor chip.

Claims

1. A laser receiving circuit for a laser communication system, characterized in that: It includes a photodiode PD, a current mirror circuit, an operational amplifier module U1, a limiting amplifier module U2 and a voltage follower circuit; The photodiode PD, the current mirror circuit, the operational amplifier module U1 and the limiting amplifier module U2 are connected in series in sequence, and the voltage follower circuit is provided at the third interface of the limiting amplifier module U2; The photodiode PD operates in a reverse bias state, converting the received light signal into a weak current signal. The weak current output by it passes through the input end of the current mirror circuit, so that the current at the output end of the current mirror circuit is proportional to the input current. Through the current replication effect of the current mirror, the weak photocurrent signal is copied and input to the operational amplifier module U1 for subsequent voltage amplification; the signal after preliminary amplification by the operational amplifier module U1 is input to the limiting amplifier module U2; the limiting amplifier module U2 further amplifies the signal and ensures that the signal is not overloaded or distorted during high-speed transmission; the voltage follower circuit is used to monitor the voltage signal of the limiting amplifier module U2.

2. A laser receiving circuit for a laser communication system according to claim 1, characterized in that: The cathode of the photodiode PD is connected to the +9V input voltage through a resistor R1, one end of the capacitors C1 and C2 connected in parallel is connected to the cathode of the photodiode PD, the other end of the capacitors C1 and C2 connected in parallel is grounded, the anode of the photodiode PD is connected to one end of the resistor R2, and the other end of the resistor R2 is grounded.

3. A laser receiving circuit for a laser communication system according to claim 1, characterized in that: The current mirror circuit includes a transistor Q1 and a transistor Q2, the base of the transistor Q1 is connected to the base of the transistor Q2, the collector of the transistor Q2 is connected to the anode of the photodiode PD, the collector of the transistor Q2 is connected to the base of the transistor Q1, the emitters of the transistor Q1 and the transistor Q2 are grounded, and the collector of the transistor Q1 is connected to the second interface of the operational amplifier module U1 through the capacitor C3.

4. A laser receiving circuit for a laser communication system according to claim 1, characterized in that: The fourth interface of the operational amplifier module U1 is connected to the eighth interface through the capacitor C10, one end of the capacitors C4 and C5 connected in parallel is connected to the power supply VCC and one end of the inductor L1, the other end of the capacitors C4 and C5 connected in parallel is grounded, one end of the capacitors C6 and C7 connected in parallel is simultaneously connected to the other end of the inductor L1 and the eighth interface of the operational amplifier module U1, the other end of the capacitors C6 and C7 connected in parallel is grounded, and the fifth interface of the operational amplifier module U1 is grounded.

5. The laser receiving circuit for a laser communication system according to claim 1, wherein: The first interface of the limiting amplifier module U2 is connected to one end of the resistor R5 and the resistor R4 respectively, the other end of the resistor R5 is connected to the twentieth interface of the limiting amplifier module U2, the other end of the resistor R4 is grounded, the second interface of the limiting amplifier module U2 is connected to the 3.3V power supply through the capacitor C11, the third interface of the limiting amplifier module U2 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the voltage follower circuit; the fourth interface and the fifth interface of the limiting amplifier module U2 are the signal negative input terminal and the positive input terminal, one end of the capacitor C8 is connected to the fourth interface of the limiting amplifier module U2, the other end of the capacitor C8 is connected to the sixth interface of the operational amplifier module U1, one end of the capacitor C9 is connected to the fifth interface of the limiting amplifier module U2, and the other end of the capacitor C9 is connected to the One end is connected to the seventh interface of the operational amplifier module U1, the sixth interface, the seventh interface and the eighth interface of the limiting amplifier module U2 are all grounded, the ninth interface and the tenth interface of the limiting amplifier module U2 are connected through capacitor C12, the twelfth interface and the thirteenth interface of the limiting amplifier module U2 are the positive output end and the negative output end of the signal, and are connected to the processor through capacitors C15 and C16 respectively, one end of the resistor R7 is connected to the twelfth interface of the limiting amplifier module U2, and the other end of the resistor R7 is grounded, one end of the resistor R8 is connected to the thirteenth interface, and the other end of the resistor R8 is grounded, the eighteenth interface, the seventeenth interface, the nineteenth interface and the eleventh interface of the limiting amplifier module U2 are connected to the 3.3V power supply, and the twenty-first interface of the limiting amplifier module U2 is grounded.

6. The laser receiving circuit for a laser communication system according to claim 1, wherein: The voltage follower circuit includes a chip U3, the first interface of the chip U3 is connected to the processor through a resistor R9, the second interface is the inverting input end directly connected to the first interface, the third interface is connected to the third interface of the limiting amplifier module U2 through a resistor R3, the fourth interface is grounded, and the eighth interface is respectively connected to one end of the capacitor C13 and the inductor L2, the other end of C13 is grounded, and the other end of the inductor L2 is connected to the power supply VCC.

7. A laser receiving circuit for a laser communication system according to claim 1, characterized in that: The operational amplifier module U1 uses the chip AD8015.

8. The laser receiving circuit for a laser communication system according to claim 1, wherein: The limiting amplifier module U2 adopts the chip MAX3969.

9. The laser receiving circuit for a laser communication system according to claim 6, wherein: The chip U3 adopts the chip NE5532.