Voltage sampling circuit

By using a voltage follower to replace the high-precision, high resistance value, and low-temperature drift resistors, the problem of high hardware cost in voltage sampling technology is solved, and voltage sampling with low cost and high input impedance is achieved.

CN223217567UActive Publication Date: 2025-08-12HUNAN NEXT GENERATION INSTRUMENTAL T&C TECH CO LTD
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Patent Information

Application Number
CN202422346826.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Priority Date
2023-11-23
Filing Date
2024-09-25
Publication Date
2025-08-12
Estimated Expiration
2034-09-25

AI Technical Summary

Technical Problem

In the existing voltage sampling technology, high-precision, high resistance value, and low-temperature drift resistance lead to higher hardware costs.

Method used

A voltage follower is used to replace high-precision, high resistance value, low temperature drift resistors, and a high input impedance is provided through a voltage follower to reduce hardware costs.

Benefits of technology

Reduces hardware costs, while meeting the requirements of high input impedance and improving sampling accuracy.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a voltage sampling circuit which comprises a signal input terminal, a voltage follower, an amplifying circuit and an ADC, the signal input terminal is used for inputting a signal to be sampled, and the signal input terminal is connected with the input end of the voltage follower. The output end of the voltage follower is connected with the input end of the amplification circuit so as to amplify the to-be-sampled signal. The output end of the amplifying circuit is connected with the input end of the ADC so as to be used for sampling amplified to-be-sampled signals, the to-be-sampled signals are input into the voltage follower from the signal input terminal and input into the amplifying circuit through the voltage follower to be amplified, and the amplified to-be-sampled signals are input into the ADC to be sampled. As the voltage follower has very high input impedance, the voltage follower is adopted to replace a high-precision, high-resistance and low-temperature-drift resistor, the input impedance which is high enough is provided, and the hardware cost is reduced.
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Description

Technical Field

[0001] The present application relates to the technical field of voltage sampling, and in particular to a voltage sampling circuit. Background Art

[0002] In data acquisition, to reduce input current and improve sampling accuracy, a high input impedance, typically above 100MΩ, is often required. One existing technique uses high-precision, high-value, low-drift resistors to increase input impedance. However, these resistors are expensive, leading to high hardware costs. Utility Model Content

[0003] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a voltage sampling circuit that can solve the problem of high hardware cost of traditional voltage sampling technology.

[0004] The voltage sampling circuit according to an embodiment of the present application includes:

[0005] Signal input terminal, used to input the signal to be sampled;

[0006] A voltage follower, wherein the signal input terminal is connected to an input end of the voltage follower;

[0007] an amplifier circuit, wherein the output end of the voltage follower is connected to the input end of the amplifier circuit for amplifying the signal to be sampled;

[0008] ADC, the output end of the amplifying circuit is connected to the input end of the ADC for sampling the amplified signal to be sampled.

[0009] The voltage sampling circuit according to the embodiment of the present application has at least the following beneficial effects:

[0010] The signal to be sampled is input from the signal input terminal to the voltage follower, which then feeds the amplifier circuit for amplification. The amplified signal to be sampled is then fed into the ADC for sampling. Compared to conventional voltage sampling techniques, the voltage sampling circuit of the present application utilizes a voltage follower in place of a high-precision, high-resistance, low-temperature drift resistor, providing sufficiently high input impedance and reducing hardware costs, as the voltage follower has very high input impedance.

[0011] According to some embodiments of the present application, the voltage follower includes a first operational amplifier, the non-inverting input terminal of the first operational amplifier is connected to the signal input terminal, the inverting input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier, and the output terminal of the first operational amplifier is connected to the amplification circuit.

[0012] According to some embodiments of the present application, the voltage follower further includes a first resistor, one end of the first resistor is connected to the non-inverting input of the first operational amplifier, and the other end of the first resistor is connected to the inverting input of the first operational amplifier.

[0013] According to some embodiments of the present application, the voltage follower further includes a second resistor, one end of the second resistor is connected to the inverting input terminal of the first operational amplifier, and the other end of the second resistor is grounded.

[0014] According to some embodiments of the present application, the amplification circuit includes a second operational amplifier and a third operational amplifier, the output of the voltage follower is connected to the inverting input of the second operational amplifier, the non-inverting input of the second operational amplifier is grounded, the output of the second operational amplifier is connected to the inverting input of the third operational amplifier, the non-inverting input of the third operational amplifier is grounded, and the output of the third operational amplifier is connected to the input of the ADC.

[0015] According to some embodiments of the present application, the amplification circuit also includes a range switching circuit, which includes a single-pole three-throw switch and a third resistor, a fourth resistor, a fifth resistor and a sixth resistor connected in series in sequence, the voltage follower is connected to one end of the third resistor, one end of the sixth resistor is connected to the inverting input of the third operational amplifier, the moving contact of the single-pole three-throw switch is connected to the inverting input of the second operational amplifier, the first static contact of the single-pole three-throw switch is connected between the third resistor and the fourth resistor, the second static contact of the single-pole three-throw switch is connected between the fourth resistor and the fifth resistor, and the third static contact of the single-pole three-throw switch is connected between the fifth resistor and the sixth resistor.

[0016] According to some embodiments of the present application, the amplifying circuit further includes a first capacitor, one end of the first capacitor is connected to the inverting input end of the second operational amplifier, and the other end of the first capacitor is connected to the output end of the second operational amplifier.

[0017] According to some embodiments of the present application, the amplifying circuit further includes a seventh resistor, and the non-inverting input terminal of the second operational amplifier is grounded through the seventh resistor.

[0018] According to some embodiments of the present application, the amplification circuit also includes an eighth resistor and a second capacitor, the output end of the third operational amplifier is connected to one end of the eighth resistor, the other end of the eighth resistor is connected to the input end of the ADC, the other end of the eighth resistor is connected to one end of the second capacitor, and the other end of the second capacitor is grounded.

[0019] According to some embodiments of the present application, a ninth resistor is further included, one end of the ninth resistor is connected to the inverting input end of the third operational amplifier, and the other end of the ninth resistor is connected to the output end of the third operational amplifier.

[0020] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become obvious from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The present application is further described below with reference to the accompanying drawings and embodiments, wherein:

[0022] Figure 1 This is a functional block diagram of the voltage sampling circuit of this application;

[0023] Figure 2 This is a circuit structure diagram of the voltage sampling circuit of this application.

[0024] Figure Number:

[0025] Signal input terminal 100,

[0026] Voltage follower 200,

[0027] Amplifier circuit 300,

[0028] ADC400. DETAILED DESCRIPTION

[0029] The following describes in detail embodiments of the present application. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application.

[0030] In the description of this application, it should be understood that descriptions involving orientation, such as the orientation or positional relationship indicated by up, down, etc., are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0031] In the description of this application, "a plurality" refers to more than two. The use of "first" or "second" is solely for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features indicated, or implicitly indicating the order of the technical features indicated.

[0032] In the description of this application, unless otherwise clearly defined, terms such as setting, installing, and connecting should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in this application based on the specific content of the technical solution.

[0033] Refer to the following Figures 1 to 2 A voltage sampling circuit according to an embodiment of the present application is described.

[0034] According to the voltage sampling circuit of the embodiment of the present application, Figure 1 As shown, the system includes: a signal input terminal 100, a voltage follower 200, an amplifier circuit 300, and an ADC 400. The signal input terminal 100 is used to input a signal to be sampled and is connected to the input of the voltage follower 200. The output of the voltage follower 200 is connected to the input of the amplifier circuit 300 for amplifying the signal to be sampled. The output of the amplifier circuit 300 is connected to the input of the ADC 400 for sampling the amplified signal to be sampled.

[0035] In this embodiment, a signal to be sampled is input from a signal input terminal 100 to a voltage follower 200, and then input to an amplifier circuit 300 for amplification via the voltage follower 200. The amplified signal to be sampled is then input to an ADC 400 for sampling. Compared to conventional voltage sampling techniques, the voltage sampling circuit of this embodiment of the present application utilizes a voltage follower 200 in place of a high-precision, high-resistance, low-temperature drift resistor, providing sufficiently high input impedance and reducing hardware costs.

[0036] In one embodiment of the present application, Figure 2 As shown, the voltage follower 200 includes a first operational amplifier U1, the non-inverting input terminal of the first operational amplifier U1 is connected to the signal input terminal 100, the inverting input terminal of the first operational amplifier U1 is connected to the output terminal of the first operational amplifier U1, and the output terminal of the first operational amplifier U1 is connected to the amplification circuit 300.

[0037] In this embodiment, the signal to be sampled is input to the subsequent amplifier circuit 300 through the first operational amplifier U1 . Since the first operational amplifier U1 has a high input impedance, the input impedance is increased by the first operational amplifier U1 .

[0038] In one embodiment of the present application, Figure 2 As shown, the voltage follower 200 further includes a first resistor R14 , one end of the first resistor R14 is connected to the non-inverting input terminal of the first operational amplifier U1 , and the other end of the first resistor R14 is connected to the inverting input terminal of the first operational amplifier U1 .

[0039] In this embodiment, when the signal to be sampled is input, the first operational amplifier U1 is in the in-phase follower state, wherein the voltages at the in-phase input terminal and the inverting input terminal of the first operational amplifier U1 are in a "virtual short" state. Due to the influence of the input offset voltage of the first operational amplifier U1:

[0040] U1(3)-U1(2)=Vos,

[0041] Wherein, U1(3) is the voltage of the non-inverting input terminal of the first operational amplifier U1, U1(2) is the voltage of the inverting input terminal of the first operational amplifier U1, and Vos is the input offset voltage of the first operational amplifier U1.

[0042] The current flowing through the first resistor R14 is:

[0043] I14=Vos / r14,

[0044] Wherein, I14 is the current flowing through the first resistor R14, and r14 is the resistance value of the first resistor R14.

[0045] Therefore, the input current of the voltage follower 200 is:

[0046] Iin=I14+Ib,

[0047] Wherein, Iin is the input current of the voltage follower 200, and Ib is the input bias current of the first operational amplifier U1.

[0048] Therefore, the input resistance of the voltage follower 200 is:

[0049] Rin=VA / Iin,

[0050] Wherein, Rin is the input resistance of the voltage follower 200 , and VA is the voltage at the non-inverting input terminal of the first operational amplifier U1 .

[0051] When the first operational amplifier U1 of model AD8512 is used, the input offset voltage of the first operational amplifier U1 is 1.8mV, the input bias current is 0.7nA, and when the signal to be sampled is 10V, the input resistance of the voltage follower 200 can be obtained to be 11GΩ, which meets the high-impedance input requirement.

[0052] In one embodiment of the present application, Figure 2 As shown, the voltage follower 200 further includes a second resistor R15 , one end of the second resistor R15 is connected to the inverting input terminal of the first operational amplifier U1 , and the other end of the second resistor R15 is grounded.

[0053] In this embodiment, when signal input terminal 100 is left floating, that is, the non-inverting input of first operational amplifier U1 is left floating, the output of first operational amplifier U1 may be biased toward the op amp power rail. Excessively high power rail voltage may be input to ADC 400, exceeding the acceptable input voltage range of ADC 400 and thus easily damaging ADC 400. The non-inverting input of first operational amplifier U1 is grounded via first resistor R14 and second resistor R15, and both the inverting input and output of first operational amplifier U1 are grounded via second resistor R15. When the non-inverting input of first operational amplifier U1 is left floating, the output voltage of first operational amplifier U1 approaches 0V, rather than the power rail voltage, thereby protecting ADC 400.

[0054] In one embodiment of the present application, Figure 2 As shown, the amplifier circuit 300 includes a second operational amplifier U3 and a third operational amplifier U2, the output end of the voltage follower 200 is connected to the inverting input end of the second operational amplifier U3, the non-inverting input end of the second operational amplifier U3 is grounded, the output end of the second operational amplifier U3 is connected to the inverting input end of the third operational amplifier U2, the non-inverting input end of the third operational amplifier U2 is grounded, and the output end of the third operational amplifier U2 is connected to the input end of ADC400.

[0055] In this embodiment, the second operational amplifier U3 and the third operational amplifier U2 are cascaded to form a two-stage amplification circuit to amplify the signal to be sampled. The amplification effect is good, so that the ADC400 can sample the amplified signal to be sampled.

[0056] In one embodiment of the present application, Figure 2 As shown, the amplification circuit 300 also includes a range switching circuit, which includes a single-pole three-throw switch and a third resistor R5, a fourth resistor R6, a fifth resistor R7 and a sixth resistor R8 connected in series in sequence. The voltage follower 200 is connected to one end of the third resistor R5, one end of the sixth resistor R8 is connected to the inverting input end of the third operational amplifier U2, the moving contact of the single-pole three-throw switch is connected to the inverting input end of the second operational amplifier U3, the first static contact of the single-pole three-throw switch is connected between the third resistor R5 and the fourth resistor R6, the second static contact of the single-pole three-throw switch is connected between the fourth resistor R6 and the fifth resistor R7, and the third static contact of the single-pole three-throw switch is connected between the fifth resistor R7 and the sixth resistor R8.

[0057] In this embodiment, by connecting the first, second, or third stationary contacts of the single-pole, triple-throw switch, the input current at the inverting input of the third operational amplifier U2 can be changed, thereby changing the range of the signal to be sampled. When the movable contact of the single-pole, triple-throw switch is connected to the first stationary contact, the amplifier circuit 300 achieves the maximum amplification factor and the minimum range of the signal to be sampled. When the movable contact of the single-pole, triple-throw switch is connected to the second stationary contact, the amplifier circuit 300 achieves a medium amplification factor and a medium range of the signal to be sampled. When the movable contact of the single-pole, triple-throw switch is connected to the third stationary contact, the amplifier circuit 300 achieves the minimum amplification factor and the maximum range of the signal to be sampled.

[0058] It is understandable that the number and resistance values of the resistors connected in series in the range switching circuit can be changed according to the application scenario, so that different ranges can be switched through the range switching circuit.

[0059] In one embodiment of the present application, Figure 2 As shown, the amplifier circuit 300 further includes a first capacitor C1 , one end of the first capacitor C1 is connected to the inverting input end of the second operational amplifier U3 , and the other end of the first capacitor C1 is connected to the output end of the second operational amplifier U3 .

[0060] In this embodiment, high-frequency oscillation can be suppressed by providing the first capacitor C1 between the inverting input terminal and the output terminal of the second operational amplifier U3.

[0061] According to one embodiment of the present application, Figure 2 As shown, the amplifier circuit 300 further includes a seventh resistor R9, and the non-inverting input terminal of the second operational amplifier U3 is grounded through the seventh resistor R9.

[0062] In this embodiment, the seventh resistor R9 can balance the input bias current of the second operational amplifier U3.

[0063] In one embodiment of the present application, Figure 2 As shown, the amplifier circuit 300 also includes an eighth resistor R13 and a second capacitor C2, the output end of the third operational amplifier U2 is connected to one end of the eighth resistor R13, the other end of the eighth resistor R13 is connected to the input end of ADC400, the other end of the eighth resistor R13 is connected to one end of the second capacitor C2, and the other end of the second capacitor C2 is grounded.

[0064] In this embodiment, the eighth resistor R13 and the second capacitor C2 form an anti-aliasing filter, which can attenuate high-frequency signals input to the ADC 400 .

[0065] According to some embodiments of the present application, Figure 2As shown, a ninth resistor R11 is further included. One end of the ninth resistor R11 is connected to the inverting input end of the third operational amplifier U2, and the other end of the ninth resistor R11 is connected to the output end of the third operational amplifier U2.

[0066] In this embodiment, the ninth resistor R11 is a feedback resistor, which feeds back the output signal of the third operational amplifier U2 to the inverting input terminal, thereby controlling the output of the third operational amplifier U2.

[0067] The embodiments of the present application are described in detail above in conjunction with the accompanying drawings, but the present application is not limited to the above embodiments. Various changes can be made within the scope of knowledge possessed by ordinary technicians in the relevant technical field without departing from the purpose of the present application.

Claims

1. A voltage sampling circuit, characterized in that: include: A signal input terminal (100) is used to input a signal to be sampled; A voltage follower (200), wherein the signal input terminal (100) is connected to an input end of the voltage follower (200); an amplifier circuit (300), wherein the output end of the voltage follower (200) is connected to the input end of the amplifier circuit (300) for amplifying the signal to be sampled; ADC (400), the output end of the amplifying circuit (300) is connected to the input end of the ADC (400) for sampling the amplified signal to be sampled.

2. The voltage sampling circuit according to claim 1, wherein: The voltage follower (200) comprises a first operational amplifier, wherein a non-inverting input terminal of the first operational amplifier is connected to the signal input terminal (100), an inverting input terminal of the first operational amplifier is connected to an output terminal of the first operational amplifier, and an output terminal of the first operational amplifier is connected to the amplifying circuit (300).

3. The voltage sampling circuit according to claim 2, wherein: The voltage follower (200) further comprises a first resistor, one end of the first resistor being connected to the non-inverting input end of the first operational amplifier, and the other end of the first resistor being connected to the inverting input end of the first operational amplifier.

4. The voltage sampling circuit according to claim 3, wherein: The voltage follower (200) further comprises a second resistor, one end of the second resistor is connected to the inverting input terminal of the first operational amplifier, and the other end of the second resistor is grounded.

5. The voltage sampling circuit according to claim 1, wherein: The amplifier circuit (300) comprises a second operational amplifier and a third operational amplifier, the output end of the voltage follower (200) is connected to the inverting input end of the second operational amplifier, the non-inverting input end of the second operational amplifier is grounded, the output end of the second operational amplifier is connected to the inverting input end of the third operational amplifier, the non-inverting input end of the third operational amplifier is grounded, and the output end of the third operational amplifier is connected to the input end of the ADC (400).

6. The voltage sampling circuit according to claim 5, wherein: The amplifying circuit (300) further includes a range switching circuit, which includes a single-pole triple-throw switch and a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor connected in series in sequence. The voltage follower (200) is connected to one end of the third resistor, one end of the sixth resistor is connected to the inverting input end of the third operational amplifier, the moving contact of the single-pole triple-throw switch is connected to the inverting input end of the second operational amplifier, the first static contact of the single-pole triple-throw switch is connected between the third resistor and the fourth resistor, the second static contact of the single-pole triple-throw switch is connected between the fourth resistor and the fifth resistor, and the third static contact of the single-pole triple-throw switch is connected between the fifth resistor and the sixth resistor.

7. The voltage sampling circuit according to claim 5, wherein: The amplifying circuit (300) further comprises a first capacitor, one end of the first capacitor being connected to the inverting input end of the second operational amplifier, and the other end of the first capacitor being connected to the output end of the second operational amplifier.

8. The voltage sampling circuit according to claim 5, wherein: The amplifying circuit (300) further includes a seventh resistor, and the non-inverting input terminal of the second operational amplifier is grounded via the seventh resistor.

9. The voltage sampling circuit according to claim 5, wherein: The amplifying circuit (300) further comprises an eighth resistor and a second capacitor, the output end of the third operational amplifier being connected to one end of the eighth resistor, the other end of the eighth resistor being connected to the input end of the ADC (400), the other end of the eighth resistor being connected to one end of the second capacitor, and the other end of the second capacitor being grounded.

10. The voltage sampling circuit according to claim 5, wherein: The system further includes a ninth resistor, one end of which is connected to the inverting input end of the third operational amplifier, and the other end of which is connected to the output end of the third operational amplifier.