Semiconductor high-temperature annealing equipment

Abstract

The utility model discloses semiconductor high-temperature annealing equipment, which comprises an annealing cavity provided with at least one furnace door; the workbench is arranged in the annealing cavity; the heating device is arranged in the annealing cavity; and the annealing box is arranged on the workbench. According to the semiconductor high-temperature annealing equipment provided by the utility model, the annealing quality and the annealing efficiency of wafers can be improved.

Description

Technical Field

[0001] The utility model relates to the field of semiconductor processing equipment, in particular to semiconductor high-temperature annealing equipment. Background Art

[0002] The semiconductor device manufacturing process requires multiple annealing processes. During the annealing process, the semiconductor material's lattice structure is altered, defects are repaired, and impurities are diffused, thereby improving its electrical and structural properties. The rapid development of integrated circuits has placed higher demands on the annealing process. Existing annealing furnaces often use metal resistance heating or low-frequency induction heating in graphite chambers to perform high-temperature thermal annealing. This process is difficult to control and can easily cause problems such as wafer contamination. Utility Model Content

[0003] The purpose of the utility model is to provide a semiconductor high-temperature annealing device that can meet the temperature requirements of the annealing process, avoid contamination of wafers during the annealing process, and ensure product quality.

[0004] The utility model provides a semiconductor high temperature annealing device, which at least comprises:

[0005] The annealing chamber is provided with at least one furnace door;

[0006] A workbench, disposed in the annealing chamber;

[0007] a heating device, disposed in the annealing chamber; and

[0008] The annealing box is arranged on the workbench.

[0009] In one embodiment of the present invention, the semiconductor high temperature annealing equipment further includes a gas device, and the gas device is connected to the workbench.

[0010] In one embodiment of the present invention, an air inlet is provided on one side of the annealing box, and the air inlet is connected to the gas device.

[0011] In one embodiment of the present invention, a gas delivery hole is further provided on the workbench, and the gas delivery hole is connected to the gas device and the gas inlet hole.

[0012] In one embodiment of the present invention, the annealing box includes an upper cover and a lower cover, and the lower cover is embedded in the upper cover.

[0013] In one embodiment of the present invention, the air inlet is provided on the lower cover.

[0014] In one embodiment of the present invention, the annealing box includes a plurality of carriers and a plurality of pillars. The plurality of carriers are arranged in an overlapping manner. The pillars are arranged on adjacent carriers and between the carriers and the upper cover.

[0015] In an embodiment of the present invention, there are at least three pillars adjacent to the carrier trays and between the carrier trays and the upper cover.

[0016] In one embodiment of the present invention, a first fixing unit is further provided on at least one side of the carrier to place wafers.

[0017] In one embodiment of the present invention, the annealing box further comprises a cover plate, and the cover plate is arranged between the upper cover and the support pillar close to the upper cover.

[0018] In summary, the present invention provides a semiconductor high-temperature annealing device that meets the temperature requirements of wafers of various materials in the annealing process. It prevents particles on the inner wall of the semiconductor high-temperature annealing equipment chamber from falling and contaminating the wafer, and prevents impurity components from escaping and contaminating the semiconductor wafer during the annealing process, thereby improving the production yield of semiconductor devices. It can meet the needs of annealing multiple wafers at the same time, which helps to improve the equipment operation rate, improve the performance of semiconductor devices and increase the production yield. At the same time, it does not limit the conditions and steps of the annealing process, can adapt to the annealing process requirements of different wafers, has strong practicality, a wide range of applications, and is convenient and safe to operate.

[0019] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 Schematic diagram of the structure of a semiconductor high-temperature annealing device in one embodiment.

[0022] Figure 2 Schematic diagram of the annealing box structure in one embodiment.

[0023] Figure 3 Schematic diagram of the assembly of an annealing box in one embodiment.

[0024] Explanation of reference numerals: 10, annealing chamber; 101, first opening; 102, second opening; 11, chamber wall; 12, first furnace door; 121, handle; 13, second furnace door; 131, adjustment unit; 132, pressure detection unit; 20, workbench; 21, groove; 22, gas delivery hole; 23, heating device; 24, gas device; 25, gas outlet unit; 30, annealing box; 31, upper cover; 32, lower cover; 321, air inlet; 33, carrier plate; 331, first fixing unit; 332, second fixing unit; 34, pillar; 35, pressure plate. DETAILED DESCRIPTION

[0025] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0026] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the conditions for the implementation of this solution. Therefore, they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed in this solution without affecting the efficacy and purpose of this solution. At the same time, the terms such as "upper", "lower", "left", "right", "middle" and "one" quoted in this specification are only for the convenience of description and are not used to limit the scope of the implementation of this solution. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of this solution without substantially changing the technical content.

[0027] See also Figure 1 As shown, the utility model provides a semiconductor high-temperature annealing equipment, including an annealing chamber 10, a workbench 20 and an annealing box 30 and other structures. The workbench 20 is arranged at one end of the annealing chamber 10, and is used to provide annealing temperature and annealing atmosphere for the wafer to be annealed. The annealing box 30 is arranged on the workbench 20, and is used to place the wafer to be annealed. It can prevent particles and impurity atmosphere from falling during the annealing process from contaminating the wafer, and can meet the annealing steps and annealing conditions of different semiconductor devices. It can be widely used in the preparation process of different types of semiconductor devices.

[0028] See also Figure 1As shown, in one embodiment of the present invention, the specific structure and size of the annealing chamber 10 can be set as needed. In this embodiment, the annealing chamber 10 is, for example, in the shape of a cube, a rectangular parallelepiped or a cylinder. The shape of the annealing chamber 10 is, for example, a rectangular parallelepiped, which is convenient for setting other structures such as a workbench 20 or an annealing box 30, which helps to uniformly increase the temperature in the annealing chamber 10 and improve the annealing quality of the wafer. In this embodiment, the long side of the annealing chamber 10 is, for example, parallel to the ground of the workplace. The annealing chamber 10 is, for example, formed by a chamber wall 11. The material of the chamber wall 11 is, for example, a high-temperature resistant insulation material such as high-aluminum castable, refractory fiber or high-aluminum brick. The thickness of the chamber wall 11 is, for example, set according to the material of the chamber wall 11. For example, a first opening 101 and a second opening 102 are respectively provided on the two end surfaces of the annealing chamber 10. The shape of the first opening 101 is, for example, rectangular or circular, and is also rectangular for example, for the entry and exit of wafers. The shape of the second opening 102 is not limited. The shape of the second opening 102 is, for example, set according to the specific structure of the annealing structure.

[0029] See also Figure 1 As shown, in one embodiment of the present invention, the annealing chamber 10, for example, includes at least one furnace door. In this embodiment, the annealing chamber 10, for example, includes a first furnace door 12 and a second furnace door 13. The first furnace door 12 and the second furnace door 13 are, for example, disposed on opposite sides of the annealing chamber 10. The first furnace door 12 is, for example, disposed on an end face adjacent to a first opening 101 of the annealing chamber 10. In this embodiment, the shape of the first furnace door 12 is, for example, rectangular or circular. The shape of the first furnace door 12 is, for example, the same as the shape of the openings on both end faces of the annealing chamber 10, or is, for example, rectangular. The size of the first furnace door 12 is, for example, larger than the size of the first opening 101, so as to fully cover the first opening 101. One side of the first furnace door 12 is connected to the annealing chamber 10, for example, by a shaft connection, a hinge connection, or other movable connection method. The first furnace door 12 can, for example, rotate around the side connected to the annealing chamber 10, for example, move away from or toward the annealing chamber 10 to open or close the annealing chamber 10, and wafers can enter and exit the annealing chamber 10 through the first furnace door 12. A stepped protrusion is provided at one end of the first furnace door 12 near the first opening 101. The shape and size of the protrusion are, for example, the same as the shape and size of the first opening 101, and the thickness of the protrusion is, for example, the same as the thickness of the chamber wall 11. A sealing unit (not shown) is provided at the end of the stepped protrusion away from the first opening 101 to ensure a sealed environment within the annealing chamber 10. A handle 121 is also provided at the end of the first furnace door 12 away from the first opening 101 to facilitate opening or closing the first furnace door 12.

[0030] See also Figure 1As shown, in one embodiment of the present invention, a second furnace door 13 is, for example, disposed on an end surface adjacent to the second opening 102 of the annealing chamber 10. The shape of the second furnace door 13 is, for example, the same as that of the second opening 102, and the second furnace door 13 is, for example, fixedly connected to the second opening 102, such as by bolting or flange connection. The second furnace door 13 completely closes the annealing chamber 10 and is typically kept closed, being fully opened only for equipment maintenance. The material and thickness of the second furnace door 13 are, for example, the same as those of the annealing chamber 10, and a sealing unit (not shown) is provided at the connection between the second furnace door 13 and the second opening 102 to ensure the sealing of the annealing chamber 10. The second furnace door 13 is, for example, provided with an adjustment unit 131, which adjusts the air pressure or atmosphere conditions within the annealing chamber 10 to accommodate different annealing processes. The adjustment unit 131 is, for example, a butterfly valve, a gate valve, or a stop valve. In this embodiment, the adjustment unit 131 is, for example, a butterfly valve. The second furnace door 13 is further provided with a pressure detection unit 132 , for example. In this embodiment, the pressure detection unit 132 is integrated with the adjustment unit 131 , for example, to detect the pressure in the annealing chamber 10 or the annealing box 30 to adapt to different annealing processes.

[0031] See also Figure 1 As shown, in one embodiment of the present invention, a heating device 23 and a gas device 24 are further provided in the semiconductor high-temperature annealing equipment. In this embodiment, the specific locations of the heating device 23 and the gas device 24 are not limited. The heating device 23 is, for example, provided on the chamber wall or on the workbench. The heating device 23 is, for example, provided at both ends of the workbench 20 to ensure that the temperature of the workbench 20 can be uniformly increased and the temperature difference at different positions on the workbench 20 is reduced. The heating device 23 is, for example, an electric unit. In other embodiments, the annealing chamber 10 is, for example, a graphite chamber. The heating device 23 is, for example, provided on the chamber wall to uniformly increase the temperature of the annealing chamber 10. The gas device 24 is, for example, provided at any position, or, for example, provided outside the annealing chamber 10, and the gas device 24 is, for example, connected to the workbench 20. The gas device 24 is, for example, a gas generating unit such as nitrogen.

[0032] See also Figure 1As shown, in one embodiment of the present invention, a workbench 20 is disposed within the annealing chamber 10, and is, for example, disposed on a side of the annealing chamber 10 near the ground of the work area. In this embodiment, the shape of the workbench 20 is, for example, circular, rectangular, or other shapes. The workbench 20 is, for example, configured as a rectangle according to the shape of the annealing chamber, or is, for example, in the shape of a rectangular plate. The width of the workbench 20 is, for example, one-third to four-fifths of the width of the annealing chamber 10, the length of the workbench 20 is, for example, one-third to four-fifths of the length of the annealing chamber 10, and the thickness of the workbench 20 is, for example, 20 mm to 50 mm. The workbench 20 is used to place wafers and provide annealing temperature for the wafers.

[0033] See also Figure 1 As shown, in one embodiment of the present invention, the workbench 20 is made of graphite, for example, to meet higher annealing temperature requirements. Compared to other materials, graphite can be etched to form various special structures, improving annealing efficiency. For example, in this embodiment, the workbench 20 is provided with a groove 21 and a gas vent 22. The groove 21 is located on a side of the workbench 20 away from the chamber wall 11. In this embodiment, the groove 21 is located at any position on a side of the workbench 20, or at the center of the workbench 20, to ensure uniform temperature distribution of the wafers on the workbench 20 during the annealing process and maintain the quality of the annealing process. In this embodiment, the number of grooves 21 is determined based on the dimensions of the annealing chamber 10, and the number of grooves 21 is, for example, one. The shape and dimensions of the groove 21 are, for example, the same as those of the annealing box 30 subsequently provided on the workbench 20. The shape of the groove 21 is, for example, rectangular, and the depth of the groove 21 is, for example, 3 mm to 8 mm, or 5 mm. The groove 21 ensures accurate positioning of the subsequent annealing box 30. The gas supply hole 22, for example, passes through the workbench 20 along the thickness direction of the workbench 20, and the gas supply hole 22, for example, is arranged in the groove 21. In this embodiment, the diameter and number of the gas supply holes 22 in each groove 21 are set according to the production output, and the number of gas supply holes 22 in each groove 21 is another example of 1, and the diameter of the gas supply hole 22 is, for example, 8 mm to 10 mm, or another example of 9 mm. One end of the gas supply hole 22 is connected to the gas device 24, and the other end is connected to the annealing box 30 arranged on the workbench 20. The annealing box 30 is placed in the groove 21, which ensures that the gas supply hole 22 is connected to the annealing box 30, and is used to input annealing gas into the annealing box 30, while ensuring the annealing pressure and annealing atmosphere in the annealing box 30.

[0034] See also Figures 1 to 3As shown, in one embodiment of the present invention, the annealing box 30 is, for example, disposed on the groove 21 of the workbench 20, and enters or exits the annealing chamber 10 through the first furnace door 12 for loading wafers. In this embodiment, the shape of the annealing box 30 is, for example, a cylinder, a rectangular parallelepiped, or a cube, and the shape of the annealing box 30 is, for example, a rectangular parallelepiped. The annealing box 30 is, for example, a sealed or non-sealed structure, and the annealing box 30 completely shields the wafers, preventing particles on the chamber wall 11 from falling onto the wafers and contaminating the wafers during the annealing process, and preventing impurity gases from evaporating from the high temperature of the workbench 20 and contaminating the wafers. The annealing box 30 includes, for example, an upper cover 31, a lower cover 32, a carrier plate 33, pillars 34, and a pressure plate 35. The carrier plate 33, pillars 34, and pressure plate 35 are, for example, disposed within a chamber enclosed by the upper cover 31 and the lower cover 32. The pillars 34 are used to support the carrier plate 33 to prevent damage to the wafers. The pressure plate 35 is, for example, disposed between the upper cover 31 and the carrier plate 33 to prevent particles from falling onto the wafers when the carrier plate 33 is removed from the annealing box 30. In this embodiment, the annealing box 30 is made of, for example, a high-temperature resistant material. Specifically, the annealing box 30 is made of, for example, boron nitride. That is, the upper cover 31, the lower cover 32, the carrier plate 33, the pillars 34, and the pressure plate 35 are made of, for example, boron nitride. This ensures that the annealing box 30 does not crack or deform under annealing conditions of 1700°C to 1800°C.

[0035] See also Figure 2 and Figure 3As shown, in one embodiment of the present invention, the upper cover 31 and the lower cover 32 are, for example, box-shaped with the same shape but different sizes, and the size of the upper cover 31 is smaller than that of the lower cover 32, so that the upper cover 31 can fit neatly within the lower cover 32, that is, the upper cover 31 and the lower cover 32 together form a rectangular parallelepiped cavity. In this embodiment, the lower cover 32 is, for example, disposed on the groove 21 of the workbench 20, and the upper cover 31 is, for example, disposed on the lower cover 32. The size of the annealing box 30 is, for example, determined based on production conditions. The lower cover 32 is provided with an air inlet 321, which, for example, extends through the wall of the annealing box 30. When the annealing box 30 is disposed in the groove 21, the air inlet 321 is, for example, connected to the gas supply hole 22 in the groove 21, for supplying gas into the annealing box 30 to ensure the annealing pressure requirements and the gas atmosphere required for annealing, thereby improving the efficiency of the annealing process. In this embodiment, the size, number, and position of the air inlet holes 321, for example, match those of the air delivery holes 22, that is, the number and size of the air inlet holes 321, for example, are the same as the number and size of the air delivery holes 22 within a groove 21, and the air inlet holes 321, for example, are disposed at the center of the lower cover 32. When the annealing box 30 is sealed, for example, an air outlet unit 25 is further disposed on the annealing box. The air outlet unit 25 is disposed on a side surface of the upper cover 31 near the second furnace door 13, and is electrically connected to the pressure detection unit 132. The pressure detection unit 132 cooperates with the pressure detection unit 132 to detect the pressure environment within the annealing box 30 and to discharge gas within the annealing box 30 to ensure pressure balance.

[0036] See also Figures 1 to 3As shown, in one embodiment of the present invention, the annealing box 30 is provided with, for example, multiple trays 33, multiple pillars 34, and a pressure plate 35. The pillars 34 are, for example, positioned between adjacent trays 33 and between the trays 33 and the upper cover 31. The pressure plate 35 is, for example, positioned between the upper cover 31 and the pillars 34 closest to the upper cover 31, forming a stacked structure to prevent compression damage to the wafers. In this embodiment, the pressure plate 35 is, for example, rectangular in shape and smaller than the upper cover 31, or larger than the trays 33. The number of pressure plates 35 is, for example, one. There are at least three pillars 34 between adjacent trays 33 and between the trays 33 and the upper cover 31 to ensure the stability of the stacked structure. The present invention does not limit the shape and size of the pillars 34; for example, they can be set based on actual production conditions to ensure the stability of the stacked structure and facilitate wafer placement. In this embodiment, the pillars 34 are, for example, cylindrical in shape, with a diameter of, for example, 10 mm to 50 mm and a height of, for example, 10 mm to 50 mm. The number of carriers 33 can be set, for example, based on specific production conditions, to form stacked structures of varying heights to meet production requirements. The carriers 33 are used, for example, to support wafers. In this embodiment, the carriers 33 are shaped, for example, circular or rectangular, or, for example, a circular plate. The carriers 33 are provided with, for example, a first fixing unit 331 and a second fixing unit 332. The first fixing unit 331 is used to position the wafers, and the second fixing unit 332 is used to position the pillars 34. The first fixing unit 331 and the second fixing unit 332 are provided on at least one side of the carrier 33. This facilitates placement of the carriers 33 within the annealing chamber 30 and placement of the wafers on the carriers 33. The shapes and depths of the first fixing units 331 and the second fixing units 332 are, for example, determined based on the shapes and sizes of the pillars 34 and the wafers, respectively. In other embodiments, the first fixing units 331 and the second fixing units 332 may be other positioning or fixing devices, such as, for example, a boss and a through-hole. The present invention does not limit the diameter and thickness of the carrier 33. The diameter and thickness of the carrier 33 are set, for example, according to the size of the wafers to be produced and the size of the lower cover 32. In this embodiment, at least one wafer is placed on each carrier 33, and for example, three wafers are placed on each carrier 33, and the thickness of the carrier 33 is, for example, 5 mm to 30 mm.

[0037] In one embodiment of the present invention, a semiconductor high temperature annealing device provided by the present invention is used. The present application also provides a method for using the semiconductor high temperature annealing device, including:

[0038] Step S11: placing the wafer in an annealing box, and placing the annealing box in a groove of a workbench.

[0039] Step S12: close the first furnace door and adjust the adjustment unit of the second furnace door.

[0040] Step S13: Adjust the gas device and the heating device to perform annealing.

[0041] See also Figure 2 and Figure 3 As shown, in one embodiment of the present invention, in step S11, a wafer is placed on a carrier 33, and a plurality of carriers 33 are stacked by pillars 34 to form a stacked structure. In this embodiment, the number of carriers 33 is, for example, 3, and each carrier 33 is, for example, provided with 3 wafers, and 3 pillars 34 are provided between adjacent carriers 33, between the carrier 33 and the lower cover 32, and between the carrier 33 and the upper cover 31 for support, and the pillars 34 do not contact the wafers. The carrier 33, pillars 34, wafers and pressure plate 35 are placed on the lower cover 32 in sequence, and then the upper cover 31 is placed on the lower cover 32. The assembled annealing box 30 is placed in the groove 21 of the workbench 20 so that the annealing box 30 is completely aligned with the groove 21, thereby ensuring that the air inlet 321 on the lower cover 32 is connected to the air delivery hole 22 on the workbench 20.

[0042] See also Figures 1 to 3 As shown, in one embodiment of the present invention, in step S12, the first furnace door 12 is closed, and the adjustment unit 131 on the second furnace door 13 is adjusted to achieve a vacuum state in the annealing chamber 10. A sealed annealing box 30 or a non-sealed annealing box 30 is selected according to the annealing process, and the annealing box 30 can achieve a sealed state or a non-sealed state when the upper cover 31 and the lower cover 32 are closed, for example, by adjusting the production process.

[0043] See also Figures 1 to 3 As shown, in one embodiment of the present invention, in step S13, after adjusting the adjustment unit 131 to achieve vacuum in the annealing chamber 10, the gas device 24 is adjusted to introduce annealing gas into the annealing box 30. In this embodiment, the annealing gas is, for example, nitrogen. Gas is introduced into the annealing box 30 to achieve a slightly positive pressure or pressure balance in the annealing box 30, and the heating device 23 is adjusted to anneal the wafer. The present invention does not limit the adjustment sequence, adjustment intensity, and adjustment time of the gas device 24 and the heating device 23. The specific adjustment method and parameter setting of the gas device 24 and the heating device 23 are set, for example, according to the specific annealing process requirements. By setting up the annealing box 30, the annealing box 30 completely covers the wafer, shielding the particles accumulated on the inner wall of the annealing chamber 10 from falling, avoiding wafer contamination, and at the same time ensuring a slight positive pressure or pressure balance in the annealing box 30, preventing the escape gas generated after the graphite on the workbench 20 is heated from entering the annealing box 30, avoiding the wafer from being contaminated by graphite gas, and improving the wafer annealing quality and production yield.

[0044] See also Figures 1 to 3As shown, in one embodiment of the present invention, a non-sealed annealing box 30 is selected. In step S13, nitrogen is continuously introduced into the annealing box 30. After reaching a slightly positive pressure state in the annealing box 30, the heating device 23 is turned on to anneal the wafer. During the entire annealing process, the slightly positive pressure state in the annealing box 30 is maintained. By setting up the annealing box 30, the particles accumulated on the inner wall of the annealing chamber 10 are blocked from falling. At the same time, the gas device 24 ensures that the slightly positive pressure state is maintained in the annealing box 30, avoiding contamination of the wafer by the escaped gas impurities, thereby improving the wafer annealing quality and production yield.

[0045] See also Figures 1 to 3 As shown, in one embodiment of the present invention, a sealed annealing box 30 is selected. In step S13, nitrogen is introduced into the annealing box 30, and the gas outlet unit 25 on the annealing box 30 is electrically connected to the pressure detection unit 132 on the second furnace door 13. The pressure detection unit 132 detects the pressure in the annealing box 30 and cooperates with the gas device 24 and the gas outlet unit 25 to ensure the pressure balance in the annealing box 30. The heating device 23 is turned on to anneal the wafers. During the entire annealing process, the pressure balance in the annealing box 30 is maintained, and the pressure state in the annealing box 30 is monitored, for example, by the pressure detection unit 132. By providing the annealing box 30, particles accumulated on the inner wall of the annealing chamber 10 are blocked from falling. The annealing box 30 is sealed to prevent gas impurities from entering the annealing box 30 and contaminating the wafers. At the same time, the gas device 24 and the pressure detection unit 132 ensure that the positive pressure balance is maintained in the annealing box 30, ensuring the gas conditions and pressure conditions for annealing, thereby improving the annealing quality and production yield of the wafers.

[0046] See also Figures 1 to 3 As shown, in one embodiment of the present invention, a sealed annealing box 30 is selected. In step S13, the nitrogen flow rate required for annealing is calculated based on the target temperature and pressure, the required nitrogen flow rate is introduced into the annealing box 30, the gas input of the gas device 24 is terminated, and the heating device 23 is turned on to anneal the wafer. The calculation formula is, for example, PV=nRT, where P is, for example, the target pressure, V is, for example, the volume of the annealing box 30, n is, for example, the amount of gas, R is the gas constant, and T is the target temperature. During the entire annealing process, no gas is introduced into the annealing box 30. By setting up the annealing box 30, the particles accumulated on the inner wall of the annealing chamber 10 are blocked from falling. At the same time, a sufficient amount of nitrogen is introduced into the annealing box 30 at one time to ensure that the annealing box 30 is sealed, and gas impurities are prevented from entering the annealing box 30 to contaminate the wafer, thereby improving the wafer annealing quality and production yield.

[0047] In summary, the present invention provides a semiconductor high-temperature annealing device, which sets an annealing box and sets the wafer to be annealed in the annealing box, thereby preventing particles deposited on the cavity wall of the semiconductor high-temperature annealing device from falling and contaminating the wafer. In addition, by setting an air inlet on the annealing box, the air inlet is connected to the gas device to ensure the air pressure environment and pressure environment in the annealing box, thereby preventing impurity gas from escaping into the annealing box and contaminating the wafer during the annealing process, thereby improving the annealing quality of the wafer. At the same time, the semiconductor high-temperature annealing device provided by the present invention can meet the temperature requirements and process step requirements of annealing different types of wafers, and can meet the requirements of annealing multiple wafers at the same time, thereby improving the production yield and production efficiency of semiconductor devices.

[0048] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the utility model involved in this application is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but should also cover other technical solutions formed by any combination of the above-mentioned technical features or their equivalent features without departing from the concept of the utility model, such as the technical solutions formed by the mutual replacement of the above-mentioned features with the technical features with similar functions disclosed in this application (but not limited to). In addition to the technical features described in the specification, the remaining technical features are known technologies to those skilled in the art. In order to highlight the innovative features of the present utility model, the remaining technical features will not be repeated here.

[0049] Thus, although the present invention has been described herein with reference to specific embodiments thereof, freedom of modification, various changes and substitutions are intended to be within the foregoing disclosure, and it should be understood that in some cases, some features of the present invention will be employed without the corresponding use of other features without departing from the scope and spirit of the proposed invention. Thus, many modifications may be made to adapt particular circumstances or materials to the true scope and spirit of the present invention. The present invention is not intended to be limited to the specific terminology used in the claims below and / or to the specific embodiments disclosed as the best mode contemplated for carrying out the invention, but the present invention will include any and all embodiments and equivalents falling within the scope of the appended claims. Thus, the scope of the present invention will be determined solely by the appended claims.

Claims

1. A semiconductor high temperature annealing device, characterized in that: include: The annealing chamber is provided with at least one furnace door; A workbench, disposed in the annealing chamber; A heating device is arranged in the annealing chamber; as well as The annealing box is arranged on the workbench.

2. The semiconductor high temperature annealing equipment according to claim 1, characterized in that: The semiconductor high temperature annealing equipment further includes a gas device connected to the workbench.

3. The semiconductor high temperature annealing equipment according to claim 2, characterized in that: An air inlet is provided on one side of the annealing box, and the air inlet is connected to the gas device.

4. The semiconductor high temperature annealing equipment according to claim 3, characterized in that: The workbench is also provided with a gas delivery hole, which is connected with the gas device and the gas inlet hole.

5. The semiconductor high temperature annealing equipment according to claim 4, characterized in that: The annealing box includes an upper cover and a lower cover, and the lower cover is embedded in the upper cover.

6. The semiconductor high temperature annealing equipment according to claim 5, characterized in that: The air inlet is arranged on the lower cover.

7. The semiconductor high temperature annealing equipment according to claim 5, characterized in that: The annealing box includes a plurality of carriers and a plurality of pillars. The plurality of carriers are overlapped and arranged. The pillars are arranged on adjacent carriers and between the carriers and the upper cover.

8. The semiconductor high temperature annealing equipment according to claim 7, characterized in that: There are at least three pillars adjacent to the carrier plates and between the carrier plates and the upper cover.

9. The semiconductor high temperature annealing equipment according to claim 7, characterized in that: A first fixing unit is further provided on at least one side of the carrier to place wafers.

10. The semiconductor high temperature annealing equipment according to claim 7, characterized in that: The annealing box further includes a cover plate, which is arranged between the upper cover and the support pillars close to the upper cover.

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