Power-loss star-sealing circuit of integrated door motor controller and elevator

Abstract

The utility model discloses a power-loss star sealing circuit of an integrated door motor controller and an elevator. The star sealing circuit comprises a power-loss detection module, a signal self-locking module and a three-phase full-bridge inversion module. And the direct current power supply and the signal self-locking module are connected with the power loss detection module. The DC power supply and the three-phase full-bridge inversion module are connected with the signal self-locking module. And the three-phase full-bridge inversion module is connected with the three-phase motor. The circuit can be widely applied to the technical field of electronic circuits.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a power-off and star-locking circuit of an integrated door machine controller and an elevator. Background Art

[0002] In the related art, in elevator star-sealing structures, a power-loss detection module, which is connected to the door machine's DC power supply and used to generate a power-loss signal, is often directly connected to the three-phase full-bridge inverter module that generates the star-sealing signal. This structure can directly control the star-sealing of the three-phase full-bridge inverter module when a power-loss signal is generated, thereby increasing the speed of star-sealing. However, this structure also generates a corresponding power-loss signal when the door machine's DC power supply becomes temporarily unstable. This makes the entire star-sealing structure prone to misjudgment and reduces the accuracy of the star-sealing circuit's execution. Therefore, there are still technical problems that need to be solved in the related art. Utility Model Content

[0003] The purpose of this application is to solve one of the technical problems existing in the prior art to at least a certain extent.

[0004] To this end, an object of an embodiment of the present application is to provide a power-off star-sealing circuit of an integrated door machine controller and an elevator, which can improve the accuracy of star-sealing.

[0005] In order to achieve the above technical objectives, the technical solution adopted by the embodiment of the present application includes: a power failure and star-locking circuit of an integrated door machine controller, comprising:

[0006] Power failure detection module, signal self-locking module and three-phase full-bridge inverter module.

[0007] The DC power supply and the signal self-locking module are connected to the power failure detection module. The DC power supply and the three-phase full-bridge inverter module are connected to the signal self-locking module. The three-phase full-bridge inverter module is connected to the three-phase motor.

[0008] In addition, the power failure and star-blocking circuit of the integrated door machine controller according to the above embodiment of the present invention may also have the following additional technical features:

[0009] Furthermore, in an embodiment of the present application, the power failure detection module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first diode, a first capacitor, a first transistor, a second transistor, and a first field-effect transistor. One end of the first resistor, the base of the second transistor, and the collector of the first transistor are connected to the DC power supply. The other end of the first resistor and one end of the third resistor are connected to the anode of the first diode. One end of the first capacitor and the cathode of the first diode are connected to the emitter of the second transistor. The collector of the second transistor is connected to one end of the second resistor. The other end of the second resistor is connected to the base of the first transistor. The emitter of the first transistor and one end of the fourth resistor are connected to the gate of the first field-effect transistor. The other end of the fourth resistor, the other end of the first capacitor, and the other end of the third resistor are grounded. The source of the first field-effect transistor is connected to the DC power supply. The drain of the first field-effect transistor serves as the second output of the power failure detection module. The gate of the first field-effect transistor serves as the first output of the power failure detection module.

[0010] Furthermore, in an embodiment of the present application, the first field-effect transistor is a P-channel field-effect transistor. The first capacitor is an electrolytic capacitor. The positive electrode of the first capacitor is connected to the negative electrode of the first diode. The negative electrode of the first capacitor is grounded.

[0011] Furthermore, in an embodiment of the present application, the signal self-locking module includes a second diode, a fifth resistor, a second capacitor, a third capacitor, a fourth capacitor, a third transistor, and a second field-effect transistor. The anode of the second diode is connected to the DC power supply, and one end of the second capacitor and one end of the fifth resistor are connected to the cathode of the anode of the second diode. The other end of the fifth resistor and one end of the third capacitor are connected to the emitter of the third transistor. The base of the third transistor, the drain of the second field-effect transistor, and the other end of the third capacitor are connected. The collector of the third transistor and one end of the fourth capacitor are connected to the gate of the second field-effect transistor. The other end of the second capacitor, the other end of the fourth capacitor, and the source of the second field-effect transistor are grounded. The gate of the second field-effect transistor serves as the input of the signal self-locking module and is connected to the first output of the power failure detection module. The base of the third transistor serves as the output of the signal self-locking module. The base of the third transistor and the second output of the power failure detection module are connected to the output of the three-phase full-bridge inverter module.

[0012] Furthermore, in an embodiment of the present application, the second capacitor is an electrolytic capacitor, the positive electrode of the second capacitor is connected to the negative electrode of the second diode, and the negative electrode of the second capacitor is grounded.

[0013] Furthermore, in an embodiment of the present application, the three-phase full-bridge inverter module includes a third field-effect transistor, a fourth field-effect transistor, a fifth field-effect transistor, a sixth field-effect transistor, a seventh field-effect transistor, and an eighth field-effect transistor. The drain of the third field-effect transistor, the drain of the fourth field-effect transistor, and the drain of the fifth field-effect transistor are connected to the second output terminal of the power failure detection module. The source of the third field-effect transistor is connected to the drain of the sixth field-effect transistor, the source of the fourth field-effect transistor is connected to the drain of the seventh field-effect transistor, the source of the fifth field-effect transistor is connected to the drain of the eighth field-effect transistor, and the source of the sixth field-effect transistor, the source of the seventh field-effect transistor, and the source of the eighth field-effect transistor are all grounded. The gate of the third field-effect transistor, the gate of the fourth field-effect transistor, the gate of the fifth field-effect transistor, the gate of the sixth field-effect transistor, the gate of the seventh field-effect transistor, and the gate of the eighth field-effect transistor are all connected to the PWM signal. The drain of the sixth field effect transistor, the drain of the seventh field effect transistor, and the drain of the eighth field effect transistor are connected to three ends of the three-phase motor.

[0014] Furthermore, in the embodiment of the present application, the third field effect transistor, the fourth field effect transistor, the fifth field effect transistor, the sixth field effect transistor, the seventh field effect transistor, and the eighth field effect transistor are all N-channel field effect transistors.

[0015] Furthermore, in an embodiment of the present application, the star sealing circuit further includes a filter capacitor, one end of the filter capacitor is connected to the output of the DC power supply, and the other end of the filter capacitor is grounded.

[0016] On the other hand, an embodiment of the present application further provides a semiconductor device, comprising a power failure and star-locking circuit of the integrated door machine controller as described in any of the above items.

[0017] The advantages and benefits of this application will be partially given in the following description, and partially become apparent from the following description, or learned through practice of this application:

[0018] The present application can set a signal self-locking module between the power failure detection module and the three-phase full-bridge inverter module to convert the signal of the power failure detection module into a driving signal of the signal self-locking module, thereby avoiding the power failure detection module from being directly connected to the three-phase full-bridge inverter module, avoiding the power failure detection signal from directly driving the three-phase full-bridge inverter module, reducing the miscontrol of the three-phase full-bridge inverter module, and improving the accuracy of the star sealing execution of the star sealing circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 The figure is a module diagram of a power failure and star-blocking circuit of an integrated door machine controller in a specific embodiment of the present utility model.

[0020] Figure 2 The present invention is a schematic structural diagram of a power failure and star-sealing circuit of an integrated door machine controller in a specific embodiment of the present invention.

[0021] Figure 3 This is a structural diagram of a power failure and star-blocking circuit of an integrated door machine controller in another specific embodiment of the present utility model. DETAILED DESCRIPTION

[0022] The following describes the embodiment of the present invention in detail with reference to the accompanying drawings, and explains the power-off and star-locking circuit of the integrated door machine controller and the principle and process of the elevator in the embodiment of the present invention.

[0023] Reference Figure 1 , this application provides a power failure and star-blocking circuit for an integrated door machine controller. Figure 1 The star-sealing circuit can include a power failure detection module 1, a signal self-locking module 2, and a three-phase full-bridge inverter module 3. The DC power supply and the signal self-locking module 2 are connected to the power failure detection module 1. The DC power supply and the three-phase full-bridge inverter module 3 are connected to the signal self-locking module 2. The three-phase full-bridge inverter module 3 is connected to the three-phase motor.

[0024] Further, refer to Figure 2 The power failure detection module 1 may include a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, a first capacitor C1, a first transistor Q1, a second transistor Q2, and a first field-effect transistor Q3. One end of the first resistor R1, the base of the second transistor Q2, and the collector of the first transistor Q1 may be connected to a DC power supply VIN. The other end of the first resistor R1 and one end of the third resistor R3 may be connected to the anode of the first diode D1. One end of the first capacitor C1 and the cathode of the first diode D1 may be connected to the emitter of the second transistor Q2. The collector of the second transistor Q2 may be connected to one end of the second resistor R2. The other end of the second resistor R2 may be connected to the base of the first transistor Q1. The emitter of the first transistor Q1 and one end of the fourth resistor R4 may be connected to the gate of the first field-effect transistor Q3. The other end of the fourth resistor R4, the other end of the first capacitor C1, and the other end of the third resistor R3 may be grounded. The source of the first field effect transistor Q3 can be connected to the DC power supply V1 N. The drain of the first field effect transistor Q3 serves as the second output terminal of the power failure detection module 1. The gate of the first field effect transistor Q3 serves as the first output terminal of the power failure detection module 1.

[0025] Further, refer to Figure 2 The first field effect transistor Q3 is a P-channel field effect transistor. The first capacitor C1 is an electrolytic capacitor. The positive electrode of the first capacitor C1 can be connected to the negative electrode of the first diode D1. The negative electrode of the first capacitor C1 is grounded.

[0026] Further, refer to Figure 2 The signal self-locking module 2 may include a second diode D2, a fifth resistor R5, a second capacitor C2, a third capacitor C3, a fourth capacitor C5, a third transistor Q7, and a second field-effect transistor Q8. The anode of the second diode D2 may be connected to the DC power supply VIN, and one end of the second capacitor C2 and one end of the fifth resistor R5 may be connected to the cathode of the anode of the second diode D2. The other end of the fifth resistor R5 and one end of the third capacitor C3 may be connected to the emitter of the third transistor Q7. The base of the third transistor Q7 and the drain of the second field-effect transistor Q8 may be connected to the other end of the third capacitor C3. The collector of the third transistor Q7 and one end of the fourth capacitor C5 may be connected to the gate of the second field-effect transistor Q8. The other end of the second capacitor C2, the other end of the fourth capacitor C5, and the source of the second field-effect transistor Q8 are grounded. The gate of the second field-effect transistor Q8 serves as the input of the signal self-locking module 2 and may be connected to the first output of the power failure detection module 1. The base of the third transistor Q7 serves as the output of the signal self-locking module 2. The base of the third transistor Q7 and the second output end of the power failure detection module 1 can be connected to the output end of the three-phase full-bridge inverter module 3 .

[0027] Further, refer to Figure 2 The second capacitor C2 is an electrolytic capacitor. The positive electrode of the second capacitor C2 can be connected to the negative electrode of the second diode D2. The negative electrode of the second capacitor C2 is grounded.

[0028] Further, refer to Figure 2 The three-phase full-bridge inverter module 3 may include a third field-effect transistor Q4, a fourth field-effect transistor Q5, a fifth field-effect transistor Q6, a sixth field-effect transistor Q9, a seventh field-effect transistor Q10, and an eighth field-effect transistor Q11. The drain of the third field-effect transistor Q4, the drain of the fourth field-effect transistor Q5, and the drain of the fifth field-effect transistor Q6 may be connected to the second output terminal of the power failure detection module 1. The source of the third field-effect transistor Q4 may be connected to the drain of the sixth field-effect transistor Q9, the source of the fourth field-effect transistor Q5 may be connected to the drain of the seventh field-effect transistor Q10, and the source of the fifth field-effect transistor Q6 may be connected to the drain of the eighth field-effect transistor Q11. The sources of the sixth field-effect transistor Q9, the seventh field-effect transistor Q10, and the eighth field-effect transistor Q11 are all grounded. The gates of the third field-effect transistor Q4, the fourth field-effect transistor Q5, the fifth field-effect transistor Q6, the sixth field-effect transistor Q9, the seventh field-effect transistor Q10, and the eighth field-effect transistor Q11 are all connected to the PWM signal. The drains of the sixth field-effect transistor Q9, the seventh field-effect transistor Q10, and the eighth field-effect transistor Q11 can be connected to the three terminals U, V, and W of the three-phase motor.

[0029] Further, refer to Figure 2 The third field effect transistor Q4, the fourth field effect transistor Q5, the fifth field effect transistor Q6, the sixth field effect transistor Q9, the seventh field effect transistor Q10 and the eighth field effect transistor Q11 are all N-channel field effect transistors.

[0030] Further, refer to Figure 2 The star sealing circuit may further include a filter capacitor C4, one end of the filter capacitor C4 may be connected to the DC power supply VIN, and the other end of the filter capacitor C4 may be grounded.

[0031] Furthermore, the filter capacitor C4 is an electrolytic capacitor. The positive electrode of the filter capacitor C4 can be connected to the output of the DC power supply VIN. The negative electrode of the filter capacitor C4 is grounded.

[0032] The specific implementation principle of this application is described below with reference to the accompanying drawings:

[0033] In this embodiment, the integrated door machine controller's power failure and star-blocking circuit is as follows: Figure 3 As shown. The circuit may include a power failure detection module (11), a signal self-locking module (12), and a three-phase full-bridge inverter module (13). The output signal of the power failure detection module (11) may be a power failure trigger signal (UV). The network to which the power failure star-sealing circuit is externally connected includes a positive terminal (VIN) of the DC power supply output of the door machine, a ground (GND) of the DC power supply output of the door machine, and a three-phase motor connected to the U terminal, the V terminal, and the W terminal of the three-phase full-bridge inverter module (13).

[0034] In the power failure detection module (11), the output positive terminal (VIN) of the door machine DC power supply is connected to the base of the PNP transistor Q2, the collector of the NPN transistor Q1 and the source of the P-channel field effect transistor Q3. The input voltage is divided by the resistor R1 and the resistor R3. The voltage of the resistor R3 is: The voltage of the resistor R3 charges the electrolytic capacitor C1 through the diode D1, and the positive end of the electrolytic capacitor C1 is connected to the emitter of the PNP transistor Q2.

[0035] When the door operator input voltage is within the normal range, the base-emitter voltage UBE of transistor Q2 is greater than 0, transistor Q2 is turned off, and the subsequent transistor Q1 is also turned off, making the power failure trigger signal (UV) low. The emitter of transistor Q1 is connected to the gate of field effect transistor Q3. At this time, the gate of P-channel field effect transistor Q3 is low, field effect transistor Q3 is turned on, the input voltage is normal, and the integrated door operator controller is powered, and the door operator operates normally.

[0036] When the gate machine input voltage VIN decreases, the diode D1 is cut off, and the voltage of the electrolytic capacitor C1 does not decrease with the input voltage. When the input voltage drops to 0.7V lower than the voltage of the electrolytic capacitor C1, that is, the emitter-base voltage UEB of the transistor Q2 is greater than or equal to 0.7V. The transistor Q2 is turned on, and the electrolytic capacitor C1 provides current to the transistor Q1 through the resistor R2, so that the transistor Q1 is turned on and outputs the power failure trigger signal (UV). At this time, the gate-source voltage of the field effect transistor Q3 is 0, the field effect transistor Q3 is cut off, and the circuit is disconnected, preventing the field effect transistor Q8 in the signal self-locking module (12) from turning on and causing a short circuit to other devices, thereby protecting the equipment from being damaged.

[0037] In the signal self-locking module (12), the positive terminal (VIN) of the DC power output of the door machine is connected to the positive terminal of the diode D2, and the electrolytic capacitor C2 is charged through the diode D2. The emitter of the PNP transistor Q7 is connected to the positive terminal of the electrolytic capacitor C2, the base is connected to the P terminal of the three-phase full-bridge inverter circuit (the P terminal is connected to the drain of the field effect transistor Q3), and the collector is connected to the gate of the field effect transistor Q8 to receive the power failure trigger signal (UV). The drain of the field effect transistor Q8 is connected to the P terminal, and the source is connected to the DC power output ground (GND) of the door machine.

[0038] When the input voltage (VIN) is within the normal range, the transistor Q7 and the field effect transistor Q8 are cut off, and the integrated door machine controller works normally.

[0039] When the input voltage (VIN) is lower than the set threshold, the power failure detection module (11) outputs a power failure trigger signal (UV), the field effect tube Q8 is turned on, and the P terminal is connected to the DC power output ground (GND) of the gate machine, then the base of the transistor Q7 is pulled down, the electrolytic capacitor C2 releases current through the resistor R5 to flow to the base of the transistor Q7, the transistor Q7 is turned on, and the gate voltage of the field effect tube Q8 is pulled up by the capacitor C2, continuing to maintain the conduction of the field effect tube Q8. At this time, the transistor Q7 and the field effect tube Q8 form a self-locking loop, maintaining the conduction of the field effect tube Q8. The time for maintaining the conduction of the field effect tube Q8 is related to the energy storage of the electrolytic capacitor C2. At this time, a closed loop is formed between the field effect tube Q8, the body diode of the field effect tube inside the three-phase full-bridge inverter module (13), and the three-phase winding of the motor.

[0040] The drain of the field effect tube Q3 of the power failure detection module (11) is connected to the P terminal of the three-phase full-bridge inverter module (13). When the field effect tube Q3 is normally turned on, the three-phase full-bridge inverter module (13) controls the conduction and cutoff of the six field effect tubes Q4, Q5, Q6, Q9, Q10, and Q11 through a PWM signal, converting the DC input voltage into a three-phase AC power with adjustable output voltage and output frequency, thereby driving the motor.

[0041] When the input voltage decreases, the power failure detection module (11) outputs a power failure trigger signal (UV), the field effect tube Q3 is turned off, the three-phase full-bridge inverter module (13) stops outputting three-phase AC power, and the motor stops rotating. The signal self-locking module (12) receives the power failure trigger signal (UV) to form a self-locking loop, and the field response tube Q8 remains turned on. At this time, a closed loop is formed between the field effect tube Q8, the body diode of the field effect tube inside the three-phase full-bridge inverter module (13), and the three-phase winding of the motor.

[0042] When the motor loses power and is forced to rotate by an external force, the three-phase winding of the motor cuts the magnetic flux lines, generating a potential difference between the phases. The potential difference generates a short-circuit current through the closed loop formed in the above circuit, causing the motor to generate resistance when it is rotated by an external force, hindering the rotation of the motor and allowing the elevator door to close slowly, protecting the mechanical structure of the elevator door from damage due to the impact of closing the door, affecting the service life of the equipment, while ensuring the safety of passengers.

[0043] In this embodiment, the rated input voltage of the door machine is 24V, and the set power-off voltage threshold can modify the resistance values of the resistor R1 and the resistor R3 according to actual needs, and the transistor Q7 and the field effect transistor Q8 in the signal self-locking module (12) are selected appropriately according to the actual conditions of different door machines.

[0044] In summary, the power-off star-sealing circuit of the present application can disconnect the external input voltage when the door machine suddenly loses power, prevent damage to internal equipment, and complete the power-off star-sealing. The power-off star-sealing circuit can avoid the door machine from hitting the door due to being dragged by external forces, affecting the service life of the elevator door, and at the same time improving the safety of the elevator. The power-off star-sealing circuit of the present application does not use electromagnetic switching devices such as contactors, which is more conducive to the integration of an integrated door machine controller. At the same time, the power-off star-sealing circuit of the present application has a simple structure, which is conducive to cost control of the integrated door machine controller.

[0045] In addition, an embodiment of the present application further provides an elevator, which may include one or more power-off and star-locking circuits of the integrated door machine controller described in any of the above embodiments.

[0046] It should be noted that the contents of the above-mentioned integrated door machine controller's power-loss star-sealing circuit embodiment are all applicable to this elevator embodiment. The functions specifically implemented by this elevator embodiment are the same as those of the above-mentioned integrated door machine controller's power-loss star-sealing circuit embodiment, and the beneficial effects achieved are also the same as those achieved by the above-mentioned integrated door machine controller's power-loss star-sealing circuit embodiment.

[0047] In the description of the present invention, it should be noted that, unless otherwise specified or limited, the term "switch" should be understood in a broad sense, for example, it can mean transformation or conversion. For those skilled in the art, the specific meaning of the above terms in the present invention can be understood according to the specific circumstances.

[0048] In this specification, references to specific terms refer to specific structures or features described in conjunction with an embodiment or example as being included in at least one embodiment or example of the present invention. In this specification, schematic representations of these terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0049] Although the embodiments of the present invention have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and purpose of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0050] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A power failure and star-blocking circuit of an integrated door machine controller, characterized in that: include: Power failure detection module, signal self-locking module and three-phase full-bridge inverter module; The DC power supply and the signal self-locking module are connected to the power failure detection module; the DC power supply and the three-phase full-bridge inverter module are connected to the signal self-locking module; the three-phase full-bridge inverter module is connected to the three-phase motor; wherein the power failure detection module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first diode, a first capacitor, a first transistor, a second transistor and a first field effect transistor; one end of the first resistor, the base of the second transistor and the collector of the first transistor are connected to the DC power supply; the other end of the first resistor and one end of the third resistor are connected to the positive electrode of the first diode; one end of the first capacitor is connected to the positive electrode of the first diode The first end and the cathode of the first diode are connected to the emitter of the second transistor; the collector of the second transistor is connected to one end of the second resistor; the other end of the second resistor is connected to the base of the first transistor; the emitter of the first transistor and one end of the fourth resistor are connected to the gate of the first field effect transistor; the other end of the fourth resistor, the other end of the first capacitor and the other end of the third resistor are grounded; the source of the first field effect transistor is connected to the DC power supply; the drain of the first field effect transistor serves as the second output end of the power failure detection module; and the gate of the first field effect transistor serves as the first output end of the power failure detection module.

2. The power failure and star-blocking circuit of the integrated door machine controller according to claim 1 is characterized in that: The first field effect transistor is a P-channel field effect transistor; the first capacitor is an electrolytic capacitor; the positive electrode of the first capacitor is connected to the negative electrode of the first diode; and the negative electrode of the first capacitor is grounded.

3. The power failure and star-blocking circuit of the integrated door machine controller according to claim 1 is characterized in that: The signal self-locking module includes a second diode, a fifth resistor, a second capacitor, a third capacitor, a fourth capacitor, a third transistor and a second field-effect transistor; the anode of the second diode is connected to the DC power supply, one end of the second capacitor and one end of the fifth resistor are connected to the cathode of the anode of the second diode; the other end of the fifth resistor and one end of the third capacitor are connected to the emitter of the third transistor; the base of the third transistor, the drain of the second field-effect transistor and the other end of the third capacitor are connected; the collector of the third transistor and one end of the fourth capacitor are connected to the gate of the second field-effect transistor; the other end of the second capacitor, the other end of the fourth capacitor and the source of the second field-effect transistor are grounded; the gate of the second field-effect transistor serves as the input end of the signal self-locking module and is connected to the first output end of the power failure detection module; the base of the third transistor serves as the output end of the signal self-locking module; the base of the third transistor and the second output end of the power failure detection module are connected to the output end of the three-phase full-bridge inverter module.

4. The power failure and star-blocking circuit of the integrated door machine controller according to claim 3 is characterized in that: The second capacitor is an electrolytic capacitor; the positive electrode of the second capacitor is connected to the negative electrode of the second diode; and the negative electrode of the second capacitor is grounded.

5. The power failure and star-blocking circuit of the integrated door machine controller according to claim 1 is characterized in that: The three-phase full-bridge inverter module includes a third field effect tube, a fourth field effect tube, a fifth field effect tube, a sixth field effect tube, a seventh field effect tube and an eighth field effect tube; the drain of the third field effect tube, the drain of the fourth field effect tube and the drain of the fifth field effect tube are connected to the second output end of the power failure detection module; the source of the third field effect tube is connected to the drain of the sixth field effect tube, the source of the fourth field effect tube is connected to the drain of the seventh field effect tube, the source of the fifth field effect tube is connected to the drain of the eighth field effect tube The drain of the field effect tube is connected, the source of the sixth field effect tube, the source of the seventh field effect tube and the source of the eighth field effect tube are all grounded; the gate of the third field effect tube, the gate of the fourth field effect tube, the gate of the fifth field effect tube, the gate of the sixth field effect tube, the gate of the seventh field effect tube and the gate of the eighth field effect tube are all connected to the PWM signal; the drain of the sixth field effect tube, the drain of the seventh field effect tube and the drain of the eighth field effect tube are connected to the three ends of the three-phase motor.

6. The power failure and star-blocking circuit of the integrated door machine controller according to claim 5 is characterized in that: The third field effect transistor, the fourth field effect transistor, the fifth field effect transistor, the sixth field effect transistor, the seventh field effect transistor, and the eighth field effect transistor are all N-channel field effect transistors.

7. The power failure and star-blocking circuit of the integrated door machine controller according to claim 1 is characterized in that: The star-sealing circuit further includes a filter capacitor, one end of which is connected to the output of the DC power supply, and the other end of which is grounded.

8. The power failure and star-blocking circuit of the integrated door machine controller according to claim 7 is characterized in that: The filter capacitor is an electrolytic capacitor; the positive electrode of the filter capacitor is connected to the output of the DC power supply, and the negative electrode of the filter capacitor is grounded.

9. An elevator, characterized in that: The invention comprises a power failure and star-sealing circuit of the integrated door machine controller as claimed in any one of claims 1 to 8.

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