Wafer transfer box

By setting a baffle in the chip transfer box to isolate the contact between the silver-containing surface of the silicon wafer and the environment, the problem of fogging caused by environmental factors in the chip transfer box is solved, the quality and production efficiency of the silicon wafer are improved, and the cost is reduced.

CN223260562UActive Publication Date: 2025-08-22GTA SEMICON CO LTD
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Patent Information

Application Number
CN202422040237.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-21
Publication Date
2025-08-22
Estimated Expiration
2034-08-21

AI Technical Summary

Technical Problem

During the production process of semiconductor silicon wafers, the silicon wafer stays in the wafer transfer box for a long time after TiNiAg deposition, resulting in the silver surface being susceptible to environmental factors to fog, affecting the appearance quality and performance consistency.

Method used

A baffle is installed in the chip transfer box to isolate the direct contact between the silver-containing surface of the silicon wafer and the surrounding environment, reducing the influence of temperature, humidity and air flow.

Benefits of technology

It improves the appearance quality and performance consistency of silicon wafers, reduces rework and scrap rates, extends the service life of silicon wafers, and reduces production costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a wafer conveying box. The wafer conveying box comprises a silicon wafer frame and a baffle arranged on the silicon wafer frame. According to the wafer conveying box, the baffles are arranged, so that the direct contact between the silver-containing surfaces of the silicon wafers in the first silicon wafer containing unit and the surrounding environment can be effectively isolated, the influence of temperature, humidity and airflow on the silver-containing surfaces of the silicon wafers is reduced, and the fogging phenomenon is reduced; the silicon wafers in the wafer conveying box can be protected in the same physical space, and a uniform environment isolation effect can be obtained regardless of the positions of the silicon wafers; by reducing the fogging phenomenon on the surface of the silicon wafer, the appearance quality and the performance consistency of the silicon wafer are improved, so that the rework and the rejection rate caused by the quality problem are reduced, and the production efficiency is improved; the surface of the silicon wafer is better protected, so that the negative influence of environmental factors on the performance of the silicon wafer is reduced, and the service life of the silicon wafer is prolonged; although the additional installation cost of the baffle is low, the production efficiency and the quality are improved, and the overall production cost can be remarkably reduced.
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Description

Technical Field

[0001] The utility model relates to the technical field of wafer processing, in particular to a wafer transfer box. Background Art

[0002] Titanium nickel silver (TiNiAg) deposition is a key step in semiconductor silicon wafer production, forming a functional thin film on the wafer surface. This film not only improves the wafer's electrical conductivity but also provides essential protection during subsequent manufacturing. However, after TiNiAg deposition, the wafer undergoes a series of tests and processing, typically performed in a wafer transfer cassette, to ensure its safety and integrity.

[0003] While wafer cassettes provide essential protection, in actual production, silicon wafers often remain in the cassette for extended periods. This extended stay, combined with testing and other operations, exposes the wafers to environmental challenges. Because silver (Ag) is extremely sensitive to ambient temperature, humidity, and airflow, the first wafer in the cassette (with the TiNiAg coating facing outward) is susceptible to these environmental factors, resulting in a slight haze on the surface.

[0004] Therefore, in order to reduce or avoid the fogging phenomenon of silicon wafers in the wafer transfer box after TiNiAg deposition and improve the production efficiency and product quality of silicon wafers, the present application provides a wafer transfer box. Utility Model Content

[0005] In view of the problem in the prior art that silicon wafers are retained in a wafer cassette for a long time, resulting in slight fogging on the surface of the silicon wafers, the present application provides a wafer cassette. By providing a baffle on the portion of the silver-containing surface of the silicon wafer placed in the first silicon wafer accommodating unit that is not blocked by the silicon wafer rack, the wafer cassette can effectively isolate the silver-containing surface of the silicon wafer from direct contact with the surrounding environment, reducing the impact of temperature, humidity, and airflow on the silicon wafer surface, thereby reducing the occurrence of fogging. By providing the baffle, each silicon wafer in the wafer cassette is ensured to receive the same physical spatial protection, achieving a uniform environmental isolation effect regardless of the position of the silicon wafer. By reducing the fogging phenomenon on the silicon wafer surface, the appearance quality and performance consistency of the silicon wafer are improved, thereby reducing rework and scrap rates caused by quality issues and improving production efficiency.

[0006] One embodiment of the present application provides a film transmission box, comprising:

[0007] a silicon wafer rack, wherein a plurality of silicon wafer accommodating units are disposed therein, wherein along a first direction, the plurality of silicon wafer accommodating units are respectively a first silicon wafer accommodating unit, a second silicon wafer accommodating unit, ..., an Nth silicon wafer accommodating unit, where N ≥ 2, each silicon wafer accommodating unit being configured to accommodate a silicon wafer, and wherein at least a portion of the silver-containing surface of the silicon wafer placed in the first silicon wafer accommodating unit is not obscured by the silicon wafer rack;

[0008] A baffle is provided near the first silicon wafer accommodating unit and at least blocks a portion of the silver-containing surface of the silicon wafer placed in the first silicon wafer accommodating unit that is not blocked by the silicon wafer rack.

[0009] As an embodiment, the baffle is arranged outside the silicon wafer rack, and the surface of the baffle that blocks the silicon wafer is parallel to the silicon wafer.

[0010] As an embodiment, the exterior of the silicon wafer rack near the first silicon wafer accommodating unit includes a first shielding portion, a second shielding portion, and a third shielding portion;

[0011] The first shielding portion and the third shielding portion are connected via the second shielding portion;

[0012] The second shielding portion is parallel to the surface of the silicon wafer;

[0013] The first shielding portion has a first opening;

[0014] The third shielding portion has a second opening.

[0015] As an embodiment, the baffle at least covers the first opening and partially covers the second opening.

[0016] As an embodiment, the baffle covers the first shielding portion, the second shielding portion, the third shielding portion, the first opening and a portion of the second opening.

[0017] As an embodiment, the bottom of the baffle is flush with the bottom of the silicon wafer accommodating unit.

[0018] As an embodiment, the top of the baffle has a first curved portion, and the first curved portion covers the top of the silicon wafer;

[0019] The bottom of the baffle has a second arc-shaped portion, and the second arc-shaped portion covers the bottom of the silicon wafer.

[0020] As an embodiment, the baffle is detachably connected to the exterior of the silicon wafer rack.

[0021] As an embodiment, a groove is provided on the outside of the silicon wafer rack, and a clamping portion is provided on the baffle, and the clamping portion is adapted to the groove.

[0022] As an embodiment, the groove is arranged above the first shielding portion.

[0023] As described above, the film transmission box of the present application has the following beneficial effects:

[0024] The wafer transfer box of the present application can effectively isolate the direct contact between the silver-containing surface of the silicon wafer in the first silicon wafer accommodating unit and the surrounding environment by setting a baffle, reduce the impact of temperature, humidity and airflow on the silver-containing surface of the silicon wafer, and thus reduce the occurrence of fogging; ensure that each silicon wafer in the wafer transfer box can obtain the same physical space protection, and obtain a uniform environmental isolation effect regardless of the position of the silicon wafer; by reducing the fogging phenomenon on the surface of the silicon wafer, the appearance quality and performance consistency of the silicon wafer are improved, thereby reducing rework and scrap rate caused by quality problems and improving production efficiency; since the surface of the silicon wafer is better protected, the negative impact of environmental factors on its performance is reduced, thereby extending the service life of the silicon wafer; although the installation cost of the baffle is relatively low, the improvement in production efficiency and quality brought about by it can significantly reduce the overall production cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic structural diagram showing a film transfer box without a baffle in an embodiment of the present invention.

[0026] Figure 2 It is a perspective structural diagram of the film transfer box after the baffle is provided in the embodiment of the utility model.

[0027] Figure 3 It is a schematic structural diagram of the film transfer box after the baffle is provided in the embodiment of the utility model.

[0028] Component number description

[0029] 10, silicon wafer rack; 11, groove; 20, silicon wafer accommodating unit; 30, baffle; 31, clamping portion; 110, first shielding portion; 111, first opening; 120, second shielding portion; 130, third shielding portion; 131, second opening; 310, first arc-shaped portion; 320, second arc-shaped portion. DETAILED DESCRIPTION

[0030] The following describes the embodiments of the present invention through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present invention from the disclosure herein. The present invention may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different perspectives and applications without departing from the spirit of the present invention.

[0031] See also Figures 1 to 3 It should be noted that the illustrations provided in this embodiment are merely schematic illustrations of the basic concept of the present invention. Therefore, the illustrations only show components related to the present invention and are not drawn according to the number, shape, and size of components in actual implementation. In actual implementation, the type, quantity, and proportion of each component may be changed arbitrarily, and the component layout may also be more complex.

[0032] In semiconductor manufacturing, silicon wafer production is a complex and delicate process involving the deposition of multiple metal films, such as titanium nickel silver (TiNiAg) composite metal layers, to meet specific electrical and physical performance requirements. However, during the silicon wafer production process, from the completion of TiNiAg deposition to final packaging and shipment, the silicon wafers undergo multiple tests and inspections, resulting in a relatively long retention time in the wafer cassette.

[0033] Crucially, the surface properties of silver (Ag), as part of the metal layer, are extremely sensitive to environmental conditions, particularly changes in temperature, humidity, and airflow. This sensitivity leads to a specific problem: in the wafer cassette, the outermost layer of the silicon wafer containing the TiNiAg composite metal layer, facing outward, is susceptible to a slight "fogging" phenomenon due to prolonged exposure to these environmental factors. Fogging refers to the phenomenon in which the Ag surface changes from bright to dark, resembling the presence of water vapor, due to the influence of ambient temperature, humidity, and airflow. This phenomenon not only affects the appearance quality of the silicon wafer but can also adversely affect its electrical performance.

[0034] In order to solve the above-mentioned defects, the present application provides a film transmission box, which is now described in detail through the following embodiments.

[0035] This embodiment provides a film transmission box, such as Figure 1 As shown, the wafer box includes a wafer rack 10, which is divided into an inner portion and an outer portion. A plurality of wafer accommodating units 20 are provided inside the wafer rack 10. Along a first direction, the plurality of wafer accommodating units 20 are respectively named the first wafer accommodating unit, the second wafer accommodating unit, ..., the N-1th wafer accommodating unit and the Nth wafer accommodating unit, where N is an integer greater than or equal to 2, and each wafer accommodating unit 20 is used to place a wafer. The first direction can be from the closest wafer to the wafer. Figure 1 The surface moves away from Figure 1 The direction of the surface can also be considered Figure 1 In the direction from front to back, the first silicon wafer accommodating unit is arranged at the front of the silicon wafer rack 10. Figure 1 As can be seen, the front-facing surface of the silicon wafer placed in the first silicon wafer receiving unit is partially unobstructed by the silicon wafer rack 10. This front-facing surface of the silicon wafer is a silver-containing surface, that is, a surface coated with a TiNiAg composite metal layer. The exterior of the silicon wafer rack 10 is the outer surface of the silicon wafer rack 10.

[0036] like Figure 2 and Figure 3 As shown, the wafer box also includes a baffle 30, which is arranged on the silicon wafer rack 10. The baffle 30 can be arranged outside the silicon wafer rack 10 or inside the silicon wafer rack 10, and is at least used to block the front-facing portion of the surface of the silicon wafer in the first silicon wafer accommodating unit, and the above-mentioned portion of the surface refers to the surface that is not blocked by the silicon wafer rack 10.

[0037] The wafer transfer box provided in this embodiment can effectively isolate the surface of the TiNiAg composite metal layer plated in the silicon wafer from direct contact with the surrounding environment by setting a baffle 30, reduce the impact of temperature, humidity and airflow on the surface of the silicon wafer, and reduce the occurrence of fogging; ensure that each silicon wafer in the wafer transfer box can obtain the same physical space protection, and obtain a uniform environmental isolation effect regardless of the position of the silicon wafer; by reducing the fogging phenomenon on the surface of the silicon wafer, the appearance quality and performance consistency of the silicon wafer are improved, the rework and scrap rate caused by quality problems are reduced, and the production efficiency is improved; the surface of the silicon wafer is better protected, the negative impact of environmental factors on its performance is reduced, and the service life of the silicon wafer is extended; the cost of setting the baffle 30 is relatively low, but the improvement in production efficiency and quality brought about by the baffle 30 can significantly reduce the overall production cost.

[0038] In an optional embodiment, if Figure 2 and Figure 3 As shown, the baffle 30 is disposed outside the silicon wafer rack 10, and the surface of the baffle 30 shielding the silicon wafer is parallel to the silicon wafer, that is, the surface composed of the length and width of the baffle 30 is parallel to the surface composed of the length and width of the silicon wafer.

[0039] In an optional embodiment, if Figure 1 and Figure 2As shown, the exterior of the wafer rack 10 near the first wafer accommodating unit (i.e., the front exterior surface of the wafer rack 10) includes a first shielding portion 110, a second shielding portion 120, and a third shielding portion 130. The first shielding portion 110 is connected to the third shielding portion 130 via the second shielding portion 120. The length and width of the first shielding portion 110, the length and width of the second shielding portion 120, and the length and width of the third shielding portion 130 are parallel to the length and width of the silicon wafers. The first shielding portion 110 has a first opening 111, and the third shielding portion 130 has a second opening 131. As an embodiment, the first shielding portion 110, the second shielding portion 120 and the third shielding portion 130 form an "H"-shaped front outer surface with the first opening 111 and the second opening 131. When the baffle 30 is not set, the front outer surface will partially block the surface of the TiNiAg composite metal layer of the silicon wafer in the first silicon wafer accommodating unit. The surface of the silicon wafer blocked by the front outer surface will not fog, but the outer surface of the silicon wafer not blocked by the front outer surface is prone to fog, which further leads to uneven surface quality of the silicon wafer. After the baffle 30 is set, the wafer box can effectively block the direct impact of temperature and humidity changes in the surrounding environment and airflow on the "H" edge area of ​​the silicon wafer, significantly reduce the occurrence of "H"-shaped fogging phenomenon, improve the appearance quality and performance consistency of the silicon wafer, reduce rework and scrap rate caused by quality problems, and improve production efficiency.

[0040] In an optional embodiment, if Figure 2 and Figure 3 As shown, the baffle 30 at least covers the first opening 111 and partially covers the second opening 131. By completely covering the first opening 111, the upper portion of the silicon wafer can be effectively shielded; by partially covering the second opening 131, the lower portion of the silicon wafer can be effectively shielded. Because the first opening 111 leaves the upper portion of the silicon wafer uncovered, and the second opening 131 leaves the lower portion uncovered, fogging occurs on a portion of the silicon wafer surface. By shielding the first opening 111 and partially covering the second opening 131, the silicon wafer surface is completely covered, preventing fogging.

[0041] In an optional embodiment, if Figure 2 and Figure 3 As shown, the baffle 30 covers the first shielding portion 110, the second shielding portion 120, the third shielding portion 130, the first opening 111 and part of the second opening 131. By setting the baffle 30 to cover the front outer surface of the silicon wafer rack 10, the baffle 30 can be set as a regularly shaped structure, which facilitates the processing and installation of the baffle 30 and does not require large-scale modification of the silicon wafer rack 10 of the wafer cassette.

[0042] In an optional embodiment, if Figure 2As shown, the bottom of the baffle 30 is flush with the bottom of the silicon wafer receiving unit 20. In this way, the baffle 30 can completely cover the surface of the silicon wafer without wasting the material of the baffle 30, which is conducive to cost saving.

[0043] In an optional embodiment, if Figure 3 As shown, the top of the baffle 30 has a first curved portion 310, which covers the top of the silicon wafer; the bottom of the baffle 30 has a second curved portion 320, which covers the bottom of the silicon wafer. Since the silicon wafer is generally a circular structure, the top and bottom of the baffle 30 are respectively provided with the first curved portion 310 and the second curved portion 320, which can completely cover the silicon wafer without causing material waste, and at the same time can be adapted to the structure of the silicon wafer rack 10.

[0044] In an optional embodiment, the baffle 30 is detachably connected to the outside of the silicon wafer rack 10, and is configured to be easy to install and disassemble, thereby facilitating operation.

[0045] In an optional embodiment, if Figures 1 to 3 As shown, a groove 11 is provided on the exterior of the wafer rack 10, and a latching portion 31 is provided on the baffle 30, which fits in the groove 11. The baffle 30 is latched to the groove 11 of the wafer rack 10 via the latching portion 31. The baffle 30 has a simple design and is easy to install and remove. It is compatible with the existing structure of the wafer rack 10, eliminating the need for large-scale modification of the wafer rack 10. While the installation cost of the baffle 30 is relatively low, the increased production efficiency and quality improvements it brings can significantly reduce overall production costs.

[0046] In an optional embodiment, if Figure 1 As shown, the groove 11 is arranged above the first shielding portion 110, which is conducive to the rational use of the original structure of the silicon wafer rack 10. The baffle 30 can be set and connected without large-scale modification of the original structure of the silicon wafer rack 10, which is low in cost and simple to operate.

[0047] The wafer transfer box provided in this embodiment can effectively isolate the surface of the silicon wafer coated with the TiNiAg composite metal layer from direct contact with the surrounding environment by providing a baffle 30, reduce the impact of temperature, humidity and airflow on the silicon wafer surface, and reduce the occurrence of fogging; ensure that each silicon wafer in the wafer transfer box can receive the same physical space protection, and obtain a uniform environmental isolation effect regardless of the position of the silicon wafer; the baffle 30 has a simple design and is easy to install and remove. It is compatible with the structure of the original silicon wafer rack 10 and does not require large-scale modification of the wafer transfer box or the silicon wafer rack 10; by reducing the fogging phenomenon on the silicon wafer surface, the appearance quality and performance consistency of the silicon wafer are improved, rework and scrap rate due to quality problems are reduced, and production efficiency is improved; because the silicon wafer surface is better protected, the negative impact of environmental factors on its performance is reduced, and the service life of the silicon wafer is extended; the installation cost of the baffle 30 is relatively low, but the production efficiency improvement and quality improvement brought by the baffle 30 can significantly reduce the overall production cost.

[0048] After installing baffle 30 in the wafer cassette of this embodiment, tracking of silicon wafers produced over a six-month period revealed no fogging of the TiNiAg composite metal coating on the wafers. Comparing wafers in cassettes without baffle 30 with those in cassettes with baffle 30, the incidence of fogging on the wafer surfaces decreased from 10% to 0%.

[0049] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed in the present invention are intended to be covered by the claims of the present invention.

Claims

1. A film transmission box, characterized in that: include: A wafer rack is provided with a plurality of wafer accommodating units inside the wafer rack. Along a first direction, the plurality of wafer accommodating units are respectively a first wafer accommodating unit, a second wafer accommodating unit ... an Nth wafer accommodating unit, N ≥ 2, each Each of the silicon wafer accommodating units is used to accommodate a silicon wafer, and at least a portion of the silver-containing surface of the silicon wafer placed in the first silicon wafer accommodating unit is not blocked by the silicon wafer rack; A baffle is provided near the first silicon wafer accommodating unit and at least blocks a portion of the silver-containing surface of the silicon wafer placed in the first silicon wafer accommodating unit that is not blocked by the silicon wafer rack.

2. The film transfer box according to claim 1, characterized in that: The baffle is arranged outside the silicon wafer rack, and the surface of the baffle that blocks the silicon wafer is parallel to the silicon wafer.

3. The film transmission box according to claim 1 or 2, characterized in that: The outer portion of the silicon wafer rack near the first silicon wafer accommodating unit includes a first shielding portion, a second shielding portion and a third shielding portion; The first shielding portion and the third shielding portion are connected via the second shielding portion; The second shielding portion is parallel to the surface of the silicon wafer; The first shielding portion has a first opening; The third shielding portion has a second opening.

4. The film transfer box according to claim 3, characterized in that: The baffle covers at least the first opening and partially covers the second opening.

5. The film transfer box according to claim 4, characterized in that: The blocking plate covers the first blocking portion, the second blocking portion, the third blocking portion, the first opening, and a portion of the second opening.

6. The film transfer box according to claim 5, characterized in that: The bottom of the baffle is flush with the bottom of the silicon wafer accommodating unit.

7. The film transfer box according to claim 6, characterized in that: The top of the baffle has a first arc-shaped portion, and the first arc-shaped portion covers the top of the silicon wafer; The bottom of the baffle has a second arc-shaped portion, and the second arc-shaped portion covers the bottom of the silicon wafer.

8. The film transfer box according to claim 7, characterized in that: The baffle is detachably connected to the exterior of the silicon wafer rack.

9. The film transfer box according to claim 8, characterized in that: A groove is provided on the outside of the silicon wafer rack, and a clamping portion is provided on the baffle, and the clamping portion is adapted to the groove.

10. The film transfer box according to claim 9, characterized in that: The groove is arranged above the first shielding portion.