Transceiver circuit with multifunctional meshes and transceiver

Abstract

The utility model discloses a transmit-receive circuit with multifunctional mesh and a transceiver, and relates to the related field of transceiver devices, the transmit-receive circuit comprises a signal receiving module, a signal processing module, a signal sending module and a multifunctional mesh module, the four modules comprise an interface circuit, a filter circuit, a coupling circuit and an impedance distribution circuit, the first antenna and the second antenna are respectively used for realizing signal receiving, filtering, coupling and impedance matching; the transceiver comprises a POE (Power Over Ethernet) port, a power supply module, a photodiode, a boosting module, a memory, a multifunctional mesh and a shell; according to the utility model, the problem of power supply is solved through the POE network port, the problem of insufficient interfaces is solved through the multifunctional mesh module, and the problem of heat dissipation is solved through the porous heat dissipation shell.

Description

Technical Field

[0001] The utility model relates to the field of transceivers, and in particular to a transceiver circuit and a transceiver with a multifunctional mesh. Background Art

[0002] With the continuous development of communication technology, the requirements for data transmission speed, distance, reliability, and flexibility are increasing. Early communication systems used simple analog signal transmission methods, but this method was susceptible to interference and had limited transmission quality and distance. The emergence of digital communication technology has greatly improved communication performance, and transceivers have also continued to evolve accordingly. From the initial low-speed, short-distance transmission to the gradual development of high-speed, long-distance and multi-mode transmission, in the field of wireless communication, transceivers need to cope with complex wireless environments, including signal attenuation, multipath propagation, interference and other problems. To address these problems, technologies such as modulation and demodulation, coding and error correction, and spectrum expansion are adopted. In wired communications, such as Ethernet communications, transceivers need to adapt to the ever-increasing network bandwidth requirements while meeting the requirements of lower power consumption, smaller package size, and lower cost. With the advancement of integrated circuit technology, transceivers are becoming more and more integrated, integrating more functions into a single chip, improving performance and reducing system complexity. However, current transceiver technology still has the following drawbacks:

[0003] 1. Directly use an ordinary fiber optic transceiver, place it on the cabinet, power it, and connect the network cable to the switch port of the local network. This method not only takes up space, but also requires a separate power supply. Often, the cabinets in enterprises are very clean and tidy, and it is impossible to introduce new power sockets.

[0004] 2. The fiber optic transceiver used with the network camera requires a separate power supply. Sometimes the interface is insufficient, which is inconvenient and also increases costs and energy.

[0005] Therefore, a transceiver circuit and transceiver with a multifunctional mesh solves the power supply problem through the POE network port, solves the problem of insufficient interfaces through the multifunctional mesh module, and solves the heat dissipation problem through the porous heat dissipation shell. Utility Model Content

[0006] The purpose of the utility model is to provide a transceiver circuit and a transceiver with a multifunctional mesh in order to solve the problems of power supply, insufficient interface and heat dissipation of traditional transceivers.

[0007] In order to achieve the above technical effects, the present invention adopts the following technical solutions:

[0008] A transceiver circuit and a transceiver with a multifunctional mesh, comprising: a transceiver circuit and a transceiver;

[0009] As a further description of the above technical solution, the transceiver circuit includes a signal receiving module, a signal processing module, a signal sending module and a multi-functional mesh module; the signal receiving module receives an external input signal through an interface circuit; the signal processing module is used to process the received signal, and the signal sending module is used to send the processed signal; the multi-functional mesh module includes a filtering circuit, a coupling circuit and an impedance distribution circuit, which are respectively used to realize signal filtering, coupling and impedance matching, the input end of the signal processing module is connected to the output end of the signal receiving module, the input end of the signal sending module is connected to the output end of the signal processing module, and the input end of the multi-functional mesh module is respectively connected to the output ends of the signal receiving module, the signal processing module and the signal sending module.

[0010] As a further description of the above technical solution, the interface circuit includes a resistor, a capacitor, a control chip, a voltage regulator diode and a coil. The control chip adopts a JZ6302 control chip and includes 5 pins. The voltage regulator diode is used to stabilize the voltage, and the coil is used to reduce power loss; the first capacitor is connected in parallel with the second capacitor, and the endpoint is connected to the first resistor, and the point is connected to pin 5 of the control chip; the first resistor is connected in series with the second resistor, and the second resistor is connected in parallel with the third capacitor, and the endpoint is connected to pin 4 of the control chip; the coil is connected in parallel with the control chip, and the two endpoints are respectively connected to pins 1 and 5 of the control chip; the voltage regulator diode is connected in series with the control chip, and the anode of the voltage regulator diode is connected to pin 1 of the control chip. The third resistor and the fourth resistor are connected in series and then in parallel with the fourth capacitor. The parallel endpoints are connected to the cathode of the voltage regulator diode, the middle point of the series is connected to pin 3 of the control chip, and pin 2 of the control chip is grounded; the interface circuit is used for POF input optical signals and electrical signals.

[0011] As a further description of the above technical solution, the filtering circuit includes a resistor, a capacitor, a control chip, a diode and a coil. The control chip adopts the Xinlite SIT65HVD230 control chip and includes 9 pins. The diode is used to improve the filtering effect, and the coil is used to form a filtering network with the capacitor; the first capacitor is connected in parallel in the circuit alone, the second capacitor is connected in parallel with the third capacitor, the end point is connected to pin 2 of the control chip, the other end point is connected in parallel with the first resistor, and the parallel end point is connected to pin 3 of the control chip; the second resistor is connected in parallel with the fourth capacitor, the end point is connected to pin 3 of the control chip, and the other end point is connected in series with the third resistor and connected to pin 4 of the control chip; the fifth capacitor is directly connected in parallel to pins 6, 7 and 9 of the control chip; the sixth capacitor and the diode are connected in series to pin 1 of the control chip; the coil is connected in series to pin 8 of the control chip, the fourth resistor is connected in parallel with the seventh capacitor, and then in series with the fifth resistor, and the parallel end point is connected to pin 5 of the control chip; the eighth capacitor is in the circuit and grounded; the filtering circuit is used to filter the signal.

[0012] As a further description of the above technical solution, the coupling circuit includes a resistor, a capacitor, a coil and a control chip; the coil is used to transmit energy and signals, and the control chip adopts an RTL8213B Ethernet chip; the first resistor is connected in series to pin 1 of the control chip, the first capacitor, the second capacitor and the third capacitor are respectively connected in parallel and in series with the coil, and the endpoints are connected to pins 2 and 3 of the control chip; the fourth capacitor, the fifth capacitor and the sixth capacitor are respectively connected in parallel, and the endpoints are connected to pins 4 and 5 of the control chip; the seventh capacitor is connected in series with the third resistor, and the endpoint is connected to pin 6 of the control chip, and the other endpoint is connected in series with the eighth capacitor to pin 7 of the control chip; the fourth resistor is connected in parallel with the ninth capacitor, and the endpoint is connected to pin 33 of the control chip; pin 41 of the control chip is grounded; the coupling circuit is used to realize the coupling function of the circuit.

[0013] As a further description of the above technical solution, the impedance distribution circuit includes a resistor, a capacitor, an NPN-type transistor and a coil; a first capacitor and a second capacitor are connected in parallel and then in series with the coil; a third capacitor and a fourth capacitor are connected in parallel, with their endpoints connected in series with the second resistor and the third resistor; a fourth resistor and a fifth resistor are connected in parallel, with their endpoints connected to the base of the first transistor; the fifth resistor and the fifth capacitor are connected in parallel, with their endpoints connected in series with the sixth resistor and connected to the collector of the first transistor; the sixth capacitor is connected in parallel to the base of the second transistor, and the emitter of the second transistor is connected to the emitter of the first transistor; the collectors of the first transistor and the second transistor are respectively connected in series with a seventh capacitor and an eighth capacitor, with their endpoints connected in parallel with the seventh resistor; the emitters of the first transistor and the second transistor are connected in series with the collector of the third transistor, and the emitter of the third transistor is connected in series with the eighth resistor, with their endpoints grounded; a ninth resistor and a ninth capacitor are connected in parallel, with their endpoints connected to the base of the third transistor; the impedance distribution circuit is used to distribute the impedance of the signal.

[0014] As a further description of the above technical solution, the transceiver includes an A end and a B end, wherein the A end of the transceiver includes a POE network port, a power module and a photodiode, and the B end of the transceiver includes a boost module, a memory, a multifunctional mesh and a housing; wherein:

[0015] The POE network port is used to transmit network data and provide DC power;

[0016] The power supply module is used to power the transceiver and the terminal product;

[0017] The photodiode is used to receive the optical signal and convert it into an electrical signal;

[0018] The boost module is used to convert the input voltage provided by the POE network port and the power module into a stable 48V output voltage;

[0019] The memory is used to store configuration information and temporary data of the transceiver;

[0020] The multifunctional mesh has filtering, coupling and impedance matching functions;

[0021] The housing is used to dissipate heat for the transceiver;

[0022] The POE network port is embedded in the A end of the transceiver, the input end of the power module is connected to the output end of the POE network port, the input end of the photodiode is connected to the output end of the power module, the input end of the boost module is connected to the output end of the photodiode, the output end of the memory is connected to the input end of the boost module, the input end of the multi-functional mesh is connected to the output end of the boost module, and the shell surrounds the outside of the transceiver.

[0023] As a further description of the above technical solution, the POE network port includes a data transmission pin, a power pin, a detection pin and a control pin; the data transmission pin is used to transmit Ethernet data signals, including sending and receiving; the power pin is used to provide direct current; the detection pin is used to detect the power requirements of the connected device; the control pin is used to control the power on, off and power adjustment; the above pins are all connected to the input end of the interface circuit.

[0024] As a further description of the above technical solution, the memory adopts DRAM dynamic random access memory.

[0025] As a further description of the above technical solution, the housing of the transceiver adopts a porous heat dissipation housing, the A end of the transceiver is a white housing, and the B end of the transceiver is a black housing.

[0026] The beneficial positive effects of the utility model are:

[0027] Different from conventional technologies, the utility model discloses a transceiver circuit and transceiver with a multifunctional mesh, which solves the power supply problem through the POE network port, solves the problem of insufficient interfaces through the multifunctional mesh module, and solves the heat dissipation problem through the porous heat dissipation shell. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without inventive work. Among them:

[0029] Figure 1 This is a schematic diagram of the structure of the transceiver circuit of the utility model;

[0030] Figure 2 A schematic plan view of the overall structure of the utility model;

[0031] Figure 3 This is a schematic diagram of the structure of the interface circuit of the utility model;

[0032] Figure 4 This is a schematic diagram of the structure of the filter circuit of the utility model;

[0033] Figure 5 This is a schematic diagram of the structure of the coupling circuit of the utility model;

[0034] Figure 6 This is a schematic diagram of the structure of the impedance matching circuit of the utility model;

[0035] Figure 7 This is a schematic structural diagram of the overall appearance of the utility model;

[0036] In the figure, 1-signal receiving module, 2-signal processing module, 3-signal sending module, 4-multi-function mesh module, 5-POE network port, 6-power module, 7-photodiode, 8-boost module, 9-memory, 10-multi-function mesh, and 11-housing. DETAILED DESCRIPTION

[0037] The preferred embodiments of the present invention are described below in conjunction with the accompanying drawings. It should be understood that the embodiments described herein are only used to illustrate and explain the present invention and are not used to limit the present invention.

[0038] like Figure 1 and Figure 3-Figure 6 A transceiver circuit with a multifunctional mesh comprises: a signal receiving module (1), a signal processing module (2), a signal sending module (3) and a multifunctional mesh module (4); the signal receiving module (1) receives an external input signal through an interface circuit (101); the signal processing module (2) is used to process the received signal, and the signal sending module (3) is used to send the processed signal; the multifunctional mesh module (4) comprises a filtering circuit (401), a coupling circuit (402) and an impedance distribution circuit (403), which are respectively used to implement signal filtering, coupling and impedance matching; the input end of the signal processing module (2) is connected to the output end of the signal receiving module (1), the input end of the signal sending module (3) is connected to the output end of the signal processing module (2), and the input end of the multifunctional mesh module (4) is respectively connected to the output ends of the signal receiving module (1), the signal processing module (2) and the signal sending module (3).

[0039] In the above embodiment, the interface circuit (101) includes a resistor (1011), a capacitor (1012), a control chip (1013), a voltage-stabilizing diode (1014) and a coil (1015); the control chip (1013) adopts a JZ6302 control chip and includes 5 pins; the voltage-stabilizing diode (1014) is used to stabilize voltage; and the coil (1015) is used to reduce power loss; the first capacitor (10121) and the second capacitor (10122) are connected in parallel, with the endpoint connected to the first resistor (10111), and the point is connected to pin 5 of the control chip (1013); the first resistor (10111) and the second resistor (10112) are connected in series, and the second resistor (10112) and the third capacitor (10123) are connected in parallel, with the endpoint connected to the control chip (1013). Pin 4 of the chip (1013); the coil (1015) is connected in parallel with the control chip (1013), and two endpoints are respectively connected to pins 1 and 5 of the control chip (1013); the voltage stabilizing diode (1014) is connected in series with the control chip (1013), and the anode of the voltage stabilizing diode (1014) is connected to pin 1 of the control chip (1013); a third resistor (10113) and a fourth resistor (10114) are connected in series and then connected in parallel with a fourth capacitor (10124), and the parallel endpoints are connected to the cathode of the voltage stabilizing diode (1014), and the middle point of the series connection is connected to pin 3 of the control chip (1013); and pin 2 of the control chip (1013) is grounded; and the interface circuit (101) is used for POF input of optical signals and electrical signals.

[0040] In the above embodiment, the filtering circuit (401) includes a resistor (4011), a capacitor (4012), a control chip (4013), a diode (4014) and a coil (4015). The control chip (4013) adopts a SIT65HVD230 control chip from Xinlite and includes 9 pins. The diode (4014) is used to improve the filtering effect. The coil (4015) is used to form a filtering network with the capacitor. The first capacitor (40121) is connected in parallel in the circuit alone. The second capacitor (40122) and the third capacitor (40123) are connected in parallel, with an end point connected to pin 2 of the control chip (4013) and the other end point connected in parallel with the first resistor (40111). The parallel end point is connected to pin 3 of the control chip (4013). The second resistor (40112) and the fourth capacitor (40124) are connected in parallel. The invention relates to a circuit comprising a first resistor (40113) and a second resistor (40114) connected in parallel, with an end point connected to pin 3 of the control chip (4013), and the other end point connected in series with the third resistor (40113) and connected to pin 4 of the control chip (4013); a fifth capacitor (40125) directly connected in parallel to pins 6, 7 and 9 of the control chip (4013); a sixth capacitor (40126) and the diode (4014) connected in series to pin 1 of the control chip (4013); the coil (4015) connected in series to pin 8 of the control chip (4013); a fourth resistor (40114) connected in parallel to the seventh capacitor (40127), and then connected in series with the fifth resistor (40115), with the parallel end point connected to pin 5 of the control chip (4013); an eighth capacitor (40128) in the circuit and grounded; and the filter circuit (401) is used for filtering signals.

[0041] In the above embodiment, the coupling circuit (402) includes a resistor (4021), a capacitor (4022), a coil (4023) and a control chip (4024); the coil (4023) is used to transmit energy and signals, and the control chip (4024) adopts an RTL8213B Ethernet chip; the first resistor (40211) is connected in series to pin 1 of the control chip (4024); the first capacitor (40221), the second capacitor (40222) and the third capacitor (40223) are connected in parallel and in series with the coil (4023), and the end points are connected to pins 2 and 3 of the control chip (4024); the fourth capacitor (40224), The fifth capacitor (40225) and the sixth capacitor (40226) are connected in parallel, respectively, with their endpoints connected to pins 4 and 5 of the control chip (4024); the seventh capacitor (40227) is connected in series with the third resistor (40213), with its endpoint connected to pin 6 of the control chip (4024), and the other endpoint is connected in series with the eighth capacitor (40228) to pin 7 of the control chip (4024); the fourth resistor (40214) and the ninth capacitor (40229) are connected in parallel, with their endpoints connected to pin 33 of the control chip (4024); pin 41 of the control chip (4024) is grounded; and the coupling circuit (402) is used to realize the coupling function of the circuit.

[0042] In the above embodiment, the impedance distribution circuit (403) includes a resistor (4031), a capacitor (4032), an NPN transistor (4033) and a coil (4034); the first capacitor (40321) and the second capacitor (40322) are connected in parallel and then connected in series with the coil (4034); the third capacitor (40323) and the fourth capacitor (40324) are connected in parallel, with their endpoints connected in series with the second resistor (40312) and the third resistor (40313); the fourth resistor (40314) and the fifth resistor (40315) are connected in parallel, with their endpoints connected to the base of the first transistor (40331); the fifth resistor (40315) and the fifth capacitor (40325) are connected in parallel, with their endpoints connected in series with the sixth resistor (40316) and connected to the collector of the first transistor (40331); the sixth capacitor (40326) is connected in parallel with the second resistor (40312) and the third resistor (40313). The base of the transistor (40332) is connected to the emitter of the second transistor (40332); the emitter of the second transistor (40332) is connected to the emitter of the first transistor (40331); the collectors of the first transistor (40331) and the second transistor (40332) are connected in series with the seventh capacitor (40327) and the eighth capacitor (40328), respectively, and the endpoints are connected in parallel with the seventh resistor (40317); the emitters of the first transistor (40331) and the second transistor (40332) are connected in series with the collector of the third transistor (40333); the emitter of the third transistor (40333) is connected in series with the eighth resistor (40318), and the endpoints are grounded; the ninth resistor (40319) and the ninth capacitor (40329) are connected in parallel, and the endpoints are connected to the base of the third transistor (40333); and the impedance distribution circuit (403) is used to distribute the impedance of the signal.

[0043] like Figure 2 and Figure 7 A transceiver with a multifunctional mesh includes an A end and a B end, wherein the A end of the transceiver includes a POE network port (5), a power module (6) and a photodiode (7), and the B end of the transceiver includes a boost module (8), a memory (9), a multifunctional mesh (10) and a housing (11); wherein:

[0044] The POE network port (5) is used to transmit network data and provide DC power;

[0045] The power supply module (6) is used to supply power to the transceiver and the terminal product;

[0046] The photodiode (7) is used to receive the optical signal and convert it into an electrical signal;

[0047] The boost module (8) is used to convert the input voltage provided by the POE network port (5) and the power module (6) into a stable 48V output voltage;

[0048] The memory (9) is used to store configuration information and temporary data of the transceiver;

[0049] The multifunctional mesh (10) has filtering, coupling and impedance matching functions;

[0050] The housing (11) is used to dissipate heat for the transceiver;

[0051] The POE network port (5) is embedded in the A end of the transceiver, the input end of the power module (6) is connected to the output end of the POE network port (5), the input end of the photodiode (7) is connected to the output end of the power module (6), the input end of the boost module (8) is connected to the output end of the photodiode (7), the output end of the memory (9) is connected to the input end of the boost module (8), the input end of the multifunctional mesh (10) is connected to the output end of the boost module (8), and the housing (11) surrounds the outside of the transceiver.

[0052] In a specific embodiment, the boost module (8) includes a control chip (801), an inductor (802), a power switch tube (803), a diode (804) and a capacitor (805); the control chip (801) adopts an AH1160 boost chip, which is responsible for controlling the on and off time of the switch and regulating the output voltage; the inductor (802) adopts a power inductor, which is responsible for storing and releasing energy, storing energy when the switch is on and releasing energy when the switch is off, so as to achieve voltage increase; the power switch tube (803) adopts a MOSFET metal oxide semiconductor field effect transistor, which is turned on and off according to the signal of the control chip (801). The transmission of energy is controlled; the diode (804) adopts a 1N5822 Schottky diode, which is used to prevent the current of the inductor from flowing back to the power supply when the inductor is discharged; the capacitor (805) adopts a ceramic capacitor, which is used to smooth the boosted voltage and reduce voltage ripple; the driving pin of the control chip (801) is connected to the gate of the power switch tube (803); one end of the inductor (802) is connected to the input power supply, and the other end is connected to the drain of the power switch tube (803); the anode of the diode (804) is connected to the connection point of the inductor (802) and the power switch tube (803), and the cathode is connected to the output end; the capacitor (805) is connected in parallel to both ends of the input power supply.

[0053] In the above embodiment, the POE network port (5) includes a data transmission pin (501), a power pin (502), a detection pin (503) and a control pin (504); the data transmission pin (501) is used to transmit Ethernet data signals, including sending and receiving; the power pin (502) is used to provide direct current; the detection pin (503) is used to detect the power demand of the connected device; the control pin (504) is used to control the opening and closing of the power supply and power regulation; the above pins are all connected to the input end of the interface circuit (101).

[0054] In the above embodiment, the memory (9) is a DRAM dynamic random access memory.

[0055] In the above embodiment, the housing of the transceiver is a porous heat dissipation housing, the A end of the transceiver is a white housing, and the B end of the transceiver is a black housing.

[0056] While specific embodiments of the present invention have been described above, those skilled in the art will appreciate that these specific embodiments are merely illustrative, and that those skilled in the art may omit, substitute, and modify the details of the methods and systems described above without departing from the principles and spirit of the present invention. For example, combining the steps of the above methods to perform substantially the same functions and achieve substantially the same results in substantially the same manner falls within the scope of the present invention. Therefore, the scope of the present invention is limited solely by the appended claims.

Claims

1. A transceiver circuit with a multifunctional mesh, characterized in that: include: A signal receiving module (1), a signal processing module (2), a signal sending module (3) and a multifunctional mesh module (4); The signal receiving module (1) receives an external input signal through an interface circuit (101); the signal processing module (2) is used to process the received signal, and the signal sending module (3) is used to send the processed signal; the multifunctional mesh module (4) comprises a filtering circuit (401), a coupling circuit (402) and an impedance distribution circuit (403), which are respectively used to implement signal filtering, coupling and impedance matching; the input end of the signal processing module (2) is connected to the output end of the signal receiving module (1), the input end of the signal sending module (3) is connected to the output end of the signal processing module (2), and the input end of the multifunctional mesh module (4) is respectively connected to the output ends of the signal receiving module (1), the signal processing module (2) and the signal sending module (3).

2. The transceiver circuit with a multifunctional mesh according to claim 1, characterized in that: The interface circuit (101) comprises a resistor (1011), a capacitor (1012), a control chip (1013), a voltage-stabilizing diode (1014) and a coil (1015); the control chip (1013) adopts a JZ6302 control chip and comprises 5 pins; the voltage-stabilizing diode (1014) is used to stabilize voltage; the coil (1015) is used to reduce power loss; the first capacitor (10121) and the second capacitor (10122) are connected in parallel, with an endpoint connected to the first resistor (10111), and the point is connected to pin 5 of the control chip (1013); the first resistor (10111) and the second resistor (10112) are connected in series, the second resistor (10112) and the third capacitor (10123) are connected in parallel, with an endpoint connected to the control chip (1 013); the coil (1015) is connected in parallel with the control chip (1013), and two endpoints are respectively connected to pins 1 and 5 of the control chip (1013); the voltage stabilizing diode (1014) is connected in series with the control chip (1013), and the anode of the voltage stabilizing diode (1014) is connected to pin 1 of the control chip (1013); a third resistor (10113) and a fourth resistor (10114) are connected in series and then connected in parallel with a fourth capacitor (10124), and the parallel endpoints are connected to the cathode of the voltage stabilizing diode (1014), and the middle point of the series connection is connected to pin 3 of the control chip (1013); and pin 2 of the control chip (1013) is grounded; and the interface circuit (101) is used for POF input of optical signals and electrical signals.

3. The transceiver circuit with a multifunctional mesh according to claim 1, characterized in that: The filtering circuit (401) comprises a resistor (4011), a capacitor (4012), a control chip (4013), a diode (4014) and a coil (4015). The control chip (4013) adopts a SIT65HVD230 control chip of Xinlite and comprises 9 pins. The diode (4014) is used to improve the filtering effect. The coil (4015) is used to form a filtering network with the capacitor. The first capacitor (40121) is connected in parallel in the circuit alone. The second capacitor (40122) and the third capacitor (40123) are connected in parallel, with one end connected to pin 2 of the control chip (4013) and the other end connected in parallel with the first resistor (40111). The parallel end is connected to pin 3 of the control chip (4013). The second resistor (40112) and the fourth capacitor (40124) are connected in parallel, with the ends connected to the first resistor (40111). The first end of the first resistor (40113) is connected to the pin 3 of the control chip (4013), and the other end is connected in series with the third resistor (40113) and connected to the pin 4 of the control chip (4013); the fifth capacitor (40125) is directly connected in parallel to the pins 6, 7 and 9 of the control chip (4013); the sixth capacitor (40126) and the diode (4014) are connected in series to the pin 1 of the control chip (4013); the coil (4015) is connected in series to the pin 8 of the control chip (4013); the fourth resistor (40114) and the seventh capacitor (40127) are connected in parallel, and then connected in series with the fifth resistor (40115), with the parallel end point connected to the pin 5 of the control chip (4013); the eighth capacitor (40128) is in the circuit and grounded; and the filter circuit (401) is used for filtering the signal.

4. The transceiver circuit with a multifunctional mesh according to claim 1, characterized in that: The coupling circuit (402) comprises a resistor (4021), a capacitor (4022), a coil (4023) and a control chip (4024); the coil (4023) is used to transmit energy and signals, and the control chip (4024) adopts an RTL8213B Ethernet chip; the first resistor (40211) is connected in series to pin 1 of the control chip (4024); the first capacitor (40221), the second capacitor (40222) and the third capacitor (40223) are connected in parallel and in series with the coil (4023), with their endpoints connected to pins 2 and 3 of the control chip (4024); the fourth capacitor (40224) and the fifth capacitor (40223) are connected in parallel to the first and second pins of the control chip (4024). (40225) and the sixth capacitor (40226) are connected in parallel, respectively, with their endpoints connected to pins 4 and 5 of the control chip (4024); the seventh capacitor (40227) is connected in series with the third resistor (40213), with its endpoint connected to pin 6 of the control chip (4024), and the other endpoint is connected in series with the eighth capacitor (40228) to pin 7 of the control chip (4024); the fourth resistor (40214) and the ninth capacitor (40229) are connected in parallel, with their endpoints connected to pin 33 of the control chip (4024); pin 41 of the control chip (4024) is grounded; and the coupling circuit (402) is used to realize the coupling function of the circuit.

5. The transceiver circuit with a multifunctional mesh according to claim 1, characterized in that: The impedance distribution circuit (403) comprises a resistor (4031), a capacitor (4032), an NPN transistor (4033) and a coil (4034); a first capacitor (40321) and a second capacitor (40322) are connected in parallel and then connected in series with the coil (4034); a third capacitor (40323) and a fourth capacitor (40324) are connected in parallel, with their endpoints connected in series with the second resistor (40312) and the third resistor (40313); a fourth resistor (40314) and a fifth resistor (40315) are connected in parallel, with their endpoints connected to the base of the first transistor (40331); the fifth resistor (40315) and the fifth capacitor (40325) are connected in parallel, with their endpoints connected in series with a sixth resistor (40316) and connected to the collector of the first transistor (40331); and a sixth capacitor (40326) is connected in parallel with the second transistor (40314). The base of the second transistor (40332) is connected to the emitter of the first transistor (40331); the collectors of the first transistor (40331) and the second transistor (40332) are connected in series with the seventh capacitor (40327) and the eighth capacitor (40328), respectively, and the endpoints are connected in parallel with the seventh resistor (40317); the emitters of the first transistor (40331) and the second transistor (40332) are connected in series with the collector of the third transistor (40333), the emitter of the third transistor (40333) is connected in series with the eighth resistor (40318), and the endpoints are grounded; the ninth resistor (40319) and the ninth capacitor (40329) are connected in parallel, and the endpoints are connected to the base of the third transistor (40333); the impedance distribution circuit (403) is used to distribute the impedance of the signal.

6. A transceiver with a multifunctional mesh, characterized in that: A transceiver circuit with a multifunctional mesh according to any one of claims 1 to 5, characterized in that it comprises: an A end and a B end, wherein the A end of the transceiver comprises a POE network port (5), a power module (6) and a photodiode (7), and the B end of the transceiver comprises a boost module (8), a memory (9), a multifunctional mesh (10) and a housing (11); wherein: The POE network port (5) is used to transmit network data and provide DC power; The power supply module (6) is used to supply power to the transceiver and the terminal product; The photodiode (7) is used to receive the optical signal and convert it into an electrical signal; The boost module (8) is used to convert the input voltage provided by the POE network port (5) and the power module (6) into a stable 48V output voltage; The memory (9) is used to store configuration information and temporary data of the transceiver; The multifunctional mesh (10) has filtering, coupling and impedance matching functions; The housing (11) is used to dissipate heat for the transceiver; The POE network port (5) is embedded in the A end of the transceiver, the input end of the power module (6) is connected to the output end of the POE network port (5), the input end of the photodiode (7) is connected to the output end of the power module (6), the input end of the boost module (8) is connected to the output end of the photodiode (7), the output end of the memory (9) is connected to the input end of the boost module (8), the input end of the multifunctional mesh (10) is connected to the output end of the boost module (8), and the housing (11) surrounds the outside of the transceiver.

7. The transceiver with a multifunctional mesh according to claim 6, characterized in that: The POE network port (5) comprises a data transmission pin (501), a power pin (502), a detection pin (503) and a control pin (504); the data transmission pin (501) is used to transmit Ethernet data signals, including sending and receiving; the power pin (502) is used to provide direct current; the detection pin (503) is used to detect the power demand of the connected device; the control pin (504) is used to control the opening and closing of the power supply and power regulation; the above pins are all connected to the input end of the interface circuit (101).

8. The transceiver with a multifunctional mesh according to claim 6, characterized in that: The memory (9) adopts DRAM dynamic random access memory.

9. The transceiver with a multifunctional mesh according to claim 6, characterized in that: The housing of the transceiver adopts a porous heat dissipation housing. The A end of the transceiver is a white housing, and the B end of the transceiver is a black housing.

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