Quantum random number generator packaging structure and chip

Abstract

The utility model discloses a quantum random number generator packaging structure and a chip, and belongs to the technical field of chip packaging. The quantum random number generator packaging structure comprises a substrate; the top cover covers the first side of the substrate, and a cavity is defined by the top cover on the first side of the substrate; the photoelectric detection array crystal grains are packaged on the substrate in a flip chip mode, and the light receiving sides of the photoelectric detection array crystal grains are arranged towards the cavity; the light source assembly is arranged on the first side of the substrate and located in the cavity. A chip core crystal grain device is connected and fixed by adopting a flip chip technology, a double-sided packaging structure is designed on the basis, an optical structure and a silicon circuit part are isolated, the occupied space is small, an additional light path protection structure does not need to be introduced, and light scattering is facilitated. The packaging structure has the advantages of high device density, small size, better optical characteristics, better electrical and heat dissipation characteristics, more stable structure and the like.

Description

Technical Field

[0001] The present application belongs to the field of chip packaging technology, and in particular relates to a quantum random number generator packaging structure and chip. Background Art

[0002] Quantum random number generators (QRNGs) generate random numbers with true unpredictability and physical security, making them crucial in a variety of fields, including cryptography, data security, and scientific simulation. However, because conventional QRNG implementations rely on discrete device technology, the cost of individual devices, size, stability, and mass production consistency are difficult to control, significantly increasing the difficulty of popularizing QRNGs. Utility Model Content

[0003] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a quantum random number generator packaging structure and chip. The chip is packaged using flip-chip technology, resulting in high device density, compact size, improved optical properties, better electrical and heat dissipation characteristics, and a more stable structure.

[0004] In a first aspect, the present application provides a quantum random number generator packaging structure, comprising:

[0005] substrate;

[0006] a top cover covering the first side of the substrate, wherein the top cover defines a cavity on the first side of the substrate;

[0007] A photodetection array die is flip-chip packaged on a substrate, with the light-receiving side of the photodetection array die facing the cavity;

[0008] A light source assembly is provided on the first side of the substrate, and the light source assembly is located in the cavity.

[0009] According to one embodiment of the present application, the substrate is provided with a light-transmitting portion, the photodetection array chip is provided on a second side of the substrate opposite to the first side, and the light-receiving side of the photodetection array chip is exposed to the first side of the substrate through the light-transmitting portion.

[0010] According to one embodiment of the present application, the light-transmitting portion is an opening penetrating the substrate.

[0011] According to one embodiment of the present application, the quantum random number generator package structure further includes:

[0012] The packaging layer is arranged on the second side of the substrate, and covers the photoelectric detection array die.

[0013] According to one embodiment of the present application, the quantum random number generator package structure further includes:

[0014] The post-processing and control logic circuit die on the second side of the substrate is flip-chip packaged, and the packaging layer covers the post-processing and control logic circuit die.

[0015] According to one embodiment of the present application, a pin holder is provided on a side of the packaging layer away from the substrate, and a lead connecting the substrate and the pin holder is provided in the packaging layer.

[0016] According to one embodiment of the present application, the material of the top cover is ceramic; or,

[0017] The top cover is made of metal, and the surface of the top cover located in the cavity is covered with an optical diffuse reflection coating.

[0018] According to one embodiment of the present application, the light source assembly includes one or more point light sources; wherein the multiple point light sources are centrally symmetrically arranged relative to the photodetection array die.

[0019] According to one embodiment of the present application, the cavity is filled with nitrogen or an inert gas.

[0020] In a second aspect, the present application provides a chip comprising the aforementioned quantum random number generator packaging structure.

[0021] The quantum random number generator package and chip of this application utilize flip-chip technology to connect and secure the core chip components. This minimizes space requirements and eliminates the need for additional optical path protection structures, facilitating light scattering. This package offers advantages such as high device density, compact size, improved optical properties, enhanced electrical and heat dissipation characteristics, and a more stable structure.

[0022] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become obvious from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0024] Figure 1 It is a structural diagram of a conventional chip packaging structure;

[0025] Figure 2 This is one of the structural diagrams of the quantum random number generator packaging structure provided in the embodiment of the present application;

[0026] Figure 3 This is the second structural diagram of the quantum random number generator packaging structure provided in the embodiment of the present application;

[0027] Figure 4This is one of the structural diagrams of the light source assembly arrangement structure provided in an embodiment of the present application.

[0028] Reference numerals:

[0029] Substrate 10 , light-transmitting portion 11 , top cover 20 , photodetection array die 30 , light source assembly 40 , integrated point light source 41 , cavity 50 , packaging layer 60 , pin holder 61 , post-processing and control logic circuit die 70 . DETAILED DESCRIPTION

[0030] Embodiments of the present application are described in detail below, with examples of the embodiments illustrated in the accompanying drawings. In the accompanying drawings, the sizes of layers, regions, and components, as well as their relative sizes, may be exaggerated for clarity. Throughout, the same or similar reference numerals represent the same or similar components or components having the same or similar functions. The embodiments described below with reference to the accompanying drawings are illustrative and intended only to explain the present application, and are not to be construed as limiting the present application.

[0031] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent to, connected to, or coupled to the other element or layer, or there can be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that while the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another. Thus, without departing from the teachings of the present disclosure, a first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part. Furthermore, when a second element, component, region, layer, or part is discussed, it does not necessarily mean that the first element, component, region, layer, or part is present in the present disclosure.

[0032] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0033] A quantum random number generator primarily consists of three components: an entropy source, a measurement device, and post-processing and control circuitry. The entropy source outputs quantum states, while the measurement device measures these states and generates initial random numbers. The post-processing and control circuitry extracts randomness from these data and controls the coordinated operation of the entropy source and measurement device, ensuring the entire system operates within a set parameter range and ultimately generating a high-quality random number sequence. The core entropy source currently employs three basic principles: branching path, spontaneous emission, and shot noise measurement. Shot noise measurement is relatively easy to implement on a chip.

[0034] The entropy source portion of the shot noise measurement scheme primarily consists of a light source, an optical cavity, and a light detector. The difficulty in implementing this scheme lies in constructing the optical system—that is, how to convert light from a point source into uniformly scattered light for the light detector within the limited chip volume, while also balancing the difficulty and cost of chip packaging. Because the optical system and its components are integral to the entire chip structure, these optical components cannot be integrated with the logic circuitry within a single, pure silicon semiconductor. This necessitates that the quantum random number generator chip utilize a SiP (System in Package) packaging process to integrate the point light source, light detector, and logic circuitry.

[0035] Reference Figure 1 , Figure 1 A conventional chip packaging structure based on wire bonding technology is shown. In this structure, a light sensor chip or logic circuit chip is typically bonded to a substrate using extremely fine metal wires. One end of the wire forms a primary bond to the chip, and the other end forms a secondary bond to the substrate. This requires injecting a filler material (molding) into the cavity during later chip processing to protect the bonding wire from breakage due to impact.

[0036] However, injecting the filler material encroaches on the optical path between the light source and the photodetector, preventing light from entering the photodetector. The only viable solution to this problem is to add an additional isolation device. This not only increases the difficulty and cost of chip packaging, but also, when the chip is heated, the different thermal expansion coefficients of the filler material and other optical components can cause the filler material to expand and damage other optical components.

[0037] At the same time, the uniform scattering and scattering efficiency of the light source are also difficult to implement in quantum random number generator chips based on shot noise measurement schemes. When the light emitted by a point light source is unevenly distributed in the optical cavity, it will cause the light intensity received by each unit in the photodetection array to be inconsistent, thus affecting the quality of the final random number generation. At the same time, if additional devices are introduced to scatter the light emitted by the point light source, a certain proportion of energy loss will be caused, which not only increases the cost of the components and the complexity of the chip implementation, but also requires increasing the luminous intensity of the light source to compensate for this loss. This in turn leads to increased chip temperature and more complex chip power consumption management. Increasing the light intensity not only causes heat and complex power consumption management, but also reduces the service life of the light source.

[0038] To this end, this application proposes a quantum random number generator packaging structure and chip. This utilizes flip-chip technology to connect and secure the core die components of the chip. Based on this, a double-sided packaging structure is designed to isolate the optical structure from the silicon circuitry. This minimizes space usage, eliminates the need for additional optical path protection structures, and facilitates light scattering. This packaging structure offers advantages such as high device density, compact size, improved optical properties, enhanced electrical and heat dissipation characteristics, and a more stable structure.

[0039] Reference Figure 2 , Figure 2 A quantum random number generator package structure is shown. One embodiment of the present application provides a quantum random number generator package structure. In this embodiment, the quantum random number generator package structure includes a substrate 10, a top cover 20, a photodetection array die 30, and a light source assembly 40. The top cover 20 covers the first side of the substrate 10 and defines a cavity 50 on the first side of the substrate 10. The photodetection array die 30 is flip-chip packaged on the substrate 10, with the light-receiving side of the photodetection array die 30 facing the cavity 50. The light source assembly is disposed on the first side of the substrate 10, and the light source assembly 40 is located within the cavity 50.

[0040] The substrate 10 may be made of FR4 (Flame Retardant Type 4), BT (Bismaleimide Triazine) or ceramics. The substrate 10 mainly serves as a support and may have conductive lines arranged therein to connect various internal components.

[0041] Flip chip packaging (also known as flip-chip packaging) involves depositing conductive bumps (such as tin-lead balls or bumps covered with other conductive adhesives) on signal contacts. Heat is then applied to melt the conductive bumps and directly bond them to the substrate 10, replacing traditional wire bonding. This method achieves a high-density, high-reliability electrical and mechanical connection between the chip and substrate. The conductive bumps serve both as a fixation and as a signal transmission mechanism.

[0042] Cavity 50 forms the optical path system. Light emitted by light source assembly 40 propagates within cavity 50 and ultimately reaches the light-receiving side of photodetection array die 30, enabling optical signal detection. Because the chip is packaged using a flip-chip package, the metal leads of traditional packages are eliminated. Therefore, no additional filling material is required within cavity 50, and light propagation within cavity 50 is not obstructed or lost. The packaging structure also requires no additional cost.

[0043] exist Figure 2 In the embodiment, the first side of the substrate 10 is the upward side, and the second side is the downward side. The top cover 20, the photodetection array die 30, and the light source assembly 40 can all be disposed on the upward side of the substrate 10, with the cavity 50 formed on the upward side of the substrate 10. The downward side of the photodetection array die 30 is provided with conductive bumps, which form a flip-chip package with the substrate 10. The upward side of the photodetection array die 30 is the light-receiving side, facilitating the reception of light.

[0044] It should be noted that, usually, the light receiving side of the photodetection array die 30 and the signal contact are located on the same side. In this case, a TSV (Through Silicon Via) hole can be formed on both sides of the photodetection array die 30 to guide the signal contact to the opposite side and form a conductive bump on the opposite side to achieve the following. Figure 2 Connections shown.

[0045] The photodetection array die 30 integrates at least one set of semiconductor light sensing units based on the photovoltaic effect or photoelectric effect principle to form a detection array; for example, a photodiode array, a CMOS (Complementary Metal-Oxide-Semiconductor) light detection array, or a CCD (Charge-Coupled Device) light detection array.

[0046] The height of the cavity 50 can range from 0.2 mm to 3.5 mm, such as 0.2 mm, 0.5 mm, 1 mm, 2 mm, or 3.5 mm. This height should be determined based on the size and position of the photodetection array die 30 and the light source assembly 40. The cavity 50 should meet the following conditions: the light emitted by the light source assembly 40, after diffuse reflection from the top cover 20, enters the photodetection array die 30 with an intensity sufficient to enable the photodetection array die 30 to operate in the linear region.

[0047] In some embodiments, cavity 50 is filled with nitrogen or an inert gas. This protects the components within the package structure from oxidation, prevents contamination, and maintains a stable environment. Furthermore, nitrogen has excellent thermal conductivity and fluidity, which helps balance the temperature distribution within cavity 50 and prevent local overheating.

[0048] As an example, the top cover 20 can be made of metal, and the inner surface (i.e., the downward-facing surface) of the top cover 20 can be coated with a special diffuse reflective coating with a reflection efficiency exceeding 90%. Diffuse reflective coating materials include, but are not limited to, polytetrafluoroethylene, alumina ceramics, aluminum nitride ceramics, and other polymer plastics and ceramics. Chip encapsulation adhesive can be used to bond the top cover 20 to the substrate 10.

[0049] As another example, the top cover 20 may also be directly made of all-ceramic, so that the inner surface of the top cover 20 does not need to be additionally covered with an optical diffuse reflection coating, and can also have a high reflection efficiency.

[0050] According to the quantum random number generator packaging structure of the present application, flip chip technology is used to connect and fix the core grain devices of the chip, which occupies little space and does not require the introduction of additional optical path protection structures, which is conducive to light scattering. The packaging structure has the advantages of high device density, small size, better optical properties, better electrical and heat dissipation properties, and a more stable structure.

[0051] Reference Figure 3 , Figure 3 A quantum random number generator package structure is shown. In some embodiments, a substrate 10 is provided with a light-transmitting portion 11, and a photodetection array die 30 is provided on a second side of the substrate 10 opposite the first side. The light-receiving side of the photodetection array die 30 is exposed to the first side of the substrate 10 through the light-transmitting portion 11.

[0052] In this embodiment, the photodetection array die 30 is provided with conductive bumps on its upward side, forming a flip-chip package with the substrate 10. Furthermore, the upward side of the photodetection array die 30 serves as the light-receiving side, facilitating the reception of light. This avoids the need for customizing the photodetection array die 30 itself, as previously mentioned, resulting in lower costs. Furthermore, the double-sided packaging structure isolates the optical structure from the silicon circuitry, thereby preventing any interaction due to their differing physical properties.

[0053] As an example, the light-transmitting portion 11 may be an opening penetrating the substrate 10, which can reduce the material used for the substrate 10. Of course, the light-transmitting portion 11 may also be formed of materials such as glass or transparent polyimide.

[0054] It should be noted that the light source assembly 40 and the cavity 50 are both located on the first side of the substrate 10. Due to the installation position of the light source assembly 40, the light within the cavity 50 may be uneven. When the photodetection array die 30 is located on the second side of the substrate 10, the light from the cavity 50 needs to pass through the light-transmitting portion 11 before being projected onto the photodetection array die 30. The edge of the light-transmitting portion 11 can block reflected light at a certain angle, thereby improving the uniformity of the light projected onto the photodetection array die 30 and thereby improving the quality of the collected data.

[0055] In some embodiments, the opening is located at the center of the portion of the substrate 10 covered by the cavity 50. The central location of the opening can further improve the uniformity of the light projected onto the photodetection array die 30.

[0056] In some embodiments, the light source assembly 40 includes one or more point light sources 41 , wherein the multiple point light sources 41 are centrally symmetrically arranged relative to the photodetection array die.

[0057] Point light sources 41 include, but are not limited to, LEDs (light-emitting diodes), laser light sources, or electromagnetic radiation sources. If the number of integrated point light sources 41 is greater than one, locally uniformly arranging each integrated point light source 41 around the photodetection array die can improve the uniformity of light projected onto the photodetection array die 30.

[0058] Reference Figure 4 , Figure 4 A light source assembly arrangement is shown. As an example, since the light-receiving side of the photodetection array die 30 is exposed through the light-transmitting portion 11, the centrally symmetrical arrangement of the integrated point light sources 41 relative to the photodetection array die is equivalent to the centrally symmetrical arrangement of the integrated point light sources 41 relative to the light-transmitting portion 11. Furthermore, the integrated point light sources 41 can be arranged close to the light-transmitting portion 11.

[0059] Continue to refer to Figure 3 In some embodiments, the quantum random number generator packaging structure further includes a packaging layer 60 . The packaging layer 60 is disposed on the second side of the substrate 10 . The packaging layer 60 covers the photodetection array die 30 .

[0060] The packaging layer 60 may be made of thermoplastic resin, such as epoxy resin or polyimide, or ceramic material, such as aluminum oxide (Alumina) and aluminum nitride (Aluminum Nitride).

[0061] The encapsulation layer 60 provides a necessary physical barrier for the photodetection array die 30, preventing corrosion from impurities in the air and thus degrading electrical performance. It also protects the die surface and connecting leads, shielding the die from external damage and environmental influences, both electrical and thermal.

[0062] In some embodiments, the quantum random number generator packaging structure further includes a post-processing and control logic circuit die 70 , which is flip-chip packaged on the second side of the substrate 10 , and the packaging layer 60 covers the post-processing and control logic circuit die 70 .

[0063] The post-processing and control logic circuit die 70 integrates logic circuitry, which can utilize technologies such as digital signal processing (DSP) or field-programmable gate arrays (FPGAs). This logic circuit processes the original random sequence generated by the photodetection array die 30 and extracts a final random sequence that is less than or equal to the actual random entropy value. The post-processing and control logic circuit die 70 also performs functions such as bias elimination and data output.

[0064] In this embodiment, the post-processing and control logic circuit die 70 also utilizes flip-chip packaging technology, achieving high-density, high-reliability electrical and mechanical connections. Together with the photodetection array die 30, it is located on the second side of substrate 10 and covered by encapsulation layer 60, providing enhanced security and improving the reliability of the package structure.

[0065] In other embodiments, the post-processing and control logic circuit die 70 may also be disposed on the first side of the substrate 10 .

[0066] In other embodiments, the post-processing and control logic circuit die 70 and the photodetection array die 30 may be integrated into the same die, thereby improving the integration of the quantum random number generator.

[0067] In some embodiments, a pin holder 61 is provided on the side of the packaging layer 60 away from the substrate 10 , and leads (not shown in the figure) connecting the substrate 10 and the pin holder 61 are provided in the packaging layer 60 .

[0068] Pin holders 61 are used to connect the external pins of the package structure. Substrate 10 is flip-chip connected to the photodetection array die 30 and the post-processing and control logic circuit die 70 via conductive bumps to achieve signal transmission. Signal lines are arranged within substrate 10, and some of these lines can be connected to the conductive bumps at one end and to pin holders 61 at the other.

[0069] One embodiment of the present application further provides a chip including the aforementioned quantum random number generator package structure. The specific structure and principle of the quantum random number generator package structure can be referred to in the aforementioned embodiments, which also have corresponding technical effects, and this embodiment will not be repeated here.

[0070] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and purpose of the present application, and the scope of the present application is defined by the claims and their equivalents.

Claims

1. A quantum random number generator packaging structure, characterized in that: include: substrate; a top cover covering the first side of the substrate, wherein the top cover defines a cavity on the first side of the substrate; A photodetection array die is flip-chip packaged on the substrate, with the light-receiving side of the photodetection array die facing the cavity; A light source assembly is provided on the first side of the substrate, and the light source assembly is located in the cavity.

2. The quantum random number generator packaging structure according to claim 1, characterized in that: The substrate is provided with a light-transmitting portion, the photodetection array die is provided on a second side of the substrate opposite to the first side, and the light-receiving side of the photodetection array die is exposed to the first side of the substrate through the light-transmitting portion.

3. The quantum random number generator packaging structure according to claim 2, characterized in that: The light-transmitting portion is an opening penetrating the substrate.

4. The quantum random number generator packaging structure according to claim 2, characterized in that: The quantum random number generator packaging structure also includes: A packaging layer is provided on the second side of the substrate, and the packaging layer covers the photoelectric detection array die.

5. The quantum random number generator packaging structure according to claim 4, characterized in that: The quantum random number generator packaging structure also includes: The post-processing and control logic circuit die on the second side of the substrate is flip-chip packaged, and the packaging layer covers the post-processing and control logic circuit die.

6. The quantum random number generator packaging structure according to claim 4, characterized in that: A pin seat is provided on a side of the packaging layer away from the substrate, and a lead connecting the substrate and the pin seat is provided in the packaging layer.

7. The quantum random number generator package structure according to any one of claims 1 to 6, characterized in that: The material of the top cover is ceramic; or, The top cover is made of metal, and the surface of the top cover located in the cavity is covered with an optical diffuse reflection coating.

8. The quantum random number generator package structure according to any one of claims 1 to 6, characterized in that: The light source assembly includes one or more point light sources; wherein the multiple point light sources are arranged in a centrally symmetrical manner relative to the photoelectric detection array die.

9. The quantum random number generator packaging structure according to any one of claims 1 to 6, characterized in that: The cavity is filled with nitrogen or an inert gas.

10. A chip, characterized in that: The invention comprises a quantum random number generator packaging structure according to any one of claims 1 to 9.

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