Package structure
By setting a buffer layer and conductive holes under the ceramic substrate, the problem of poor pad offset and fixation in the integration of the ceramic substrate and the plastic substrate is solved, the yield of the packaging structure is improved, and the damage to the ceramic substrate is avoided.
Patent Information
- Application Number
- CN202422277516.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-18
- Publication Date
- 2025-08-26
- Estimated Expiration
- 2034-09-18
AI Technical Summary
In the prior art, the heterogeneous integration of ceramic substrates and plastic substrates has problems of pad offset and poor fixation effect, resulting in a decrease in the yield of the packaging structure, especially during the process of punching, the corners of the ceramic substrate are easily damaged.
The buffer layer is located under the ceramic substrate. The horizontal dimension of the buffer layer is larger than that of the ceramic substrate. It is used to level and absorb stress during the punching, and combine conductive holes and insulating layers to solve the pad displacement problem and improve the stability of the packaging structure.
Through the design of the buffer layer, the problem of unstable ceramic substrate is solved, damage during the punching is avoided, and the yield of the packaging structure is improved.
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Figure CN223273287U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a packaging structure. Background Art
[0002] See also Figure 1 In the packaging industry, plastic / plastic substrates 1 are the most mature and widely used materials. However, they are currently facing many problems such as warping and heat dissipation, which has led the industry to consider replacing them with other materials. Ceramic substrates 2 can improve both warping and heat dissipation, so heterogeneous substrates combining the two substrates have been developed. However, ceramic substrates 2 also have the problem of shrinkage causing pad 3 displacement, see Figure 2 The tube core 4 is bonded on the ceramic substrate 2, and the pitch (Pitch) of the pads 5 of the tube core 4 is, for example, 150.4μm, and the spacing (Gap) is, for example, 45μm. Due to the displacement of the pads 3 of the ceramic substrate 2, the offset spacing (Gap) between the pads 3 of the ceramic substrate 2 and the pads 5 of the tube core 4 is 36.7μm and 40.7μm.
[0003] In addition, in the heterogeneous integration of the ceramic substrate 2 and the plastic substrate 1, since the ceramic substrate 2 is rigid and the bottom is unstable, when the substrate is mounted on the carrier, if the same thickness of tape or the same force is used to bond the ceramic substrate 2 and the plastic substrate 1, the fixing effect of one side will be poor, and the stress during the bonding will affect the ceramic substrate 2, especially if the ceramic substrate 2 is Figure 1 The corners shown in the dotted box 6 are easily damaged. Utility Model Content
[0004] In view of the problems existing in the related art, the purpose of the present invention is to provide a packaging structure to at least improve the yield of the packaging structure.
[0005] To achieve the above-mentioned objectives, the present invention provides a packaging structure, including: a first substrate, defining a housing space; a second substrate, arranged in the housing space, and having greater rigidity than the first substrate; a buffer layer, arranged in the housing space and located below the second substrate, and having a horizontal dimension greater than that of the second substrate, and the extension of the buffer layer does not exceed the bottom surface of the first substrate.
[0006] In some embodiments, the packaging structure further includes: a first insulating layer filling the accommodation space.
[0007] In some embodiments, a contact surface between the first insulating layer and the buffer layer is a curved surface.
[0008] In some embodiments, a top surface of the first insulating layer is flush with a top surface of the second substrate.
[0009] In some embodiments, the thickness of the second substrate is greater than the thickness of the first substrate.
[0010] In some embodiments, a portion of the first insulating layer covers a top surface of the first substrate.
[0011] In some embodiments, the packaging structure further includes: a second insulating layer disposed above the second substrate.
[0012] In some embodiments, the second insulating layer is provided with a conductive via electrically connected to the second substrate.
[0013] In some embodiments, the conductive via is connected to a pad of the second substrate.
[0014] In some embodiments, a bottom surface of the buffer layer is flush with a bottom surface of the first substrate.
[0015] In some embodiments, the buffer layer contacts the first substrate.
[0016] In some embodiments, the buffer layer covers a portion of a side surface of the second substrate.
[0017] In some embodiments, the first substrate is a plastic substrate.
[0018] In some embodiments, the second substrate is a ceramic substrate.
[0019] In some embodiments, the total thickness of the second substrate varies by more than 30 μm.
[0020] An embodiment of the present application also provides a packaging structure, including: a first substrate having a housing space; a second substrate arranged in the housing space, the rigidity of the second substrate being greater than that of the first substrate; a buffer layer completely located within the housing space, and the buffer layer is located below the second substrate, and the buffer layer extends beyond the side of the second substrate.
[0021] In some embodiments, a top surface of the second substrate is higher than a top surface of the first substrate.
[0022] In some embodiments, the packaging structure further includes: a first insulating layer filling the accommodation space; a second insulating layer disposed on the second substrate and the first insulating layer, with a portion of the first insulating layer located between the top surface of the first substrate and the second insulating layer.
[0023] In some embodiments, a side of the second substrate is spaced apart from the first substrate.
[0024] In some embodiments, a portion of the first insulating layer and a portion of the buffer layer are located between a side of the second substrate and the first substrate.
[0025] The beneficial technical effects of the present utility model are:
[0026] The embodiments of the present application solve the problem of heterogeneous substrates in component bonding. The problem of the unstable bottom of the second substrate is addressed through a buffer layer. The buffer layer has a leveling effect and can absorb the stress during component bonding, avoiding damage to the second substrate and improving the yield of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 The package structure of the prior art is shown.
[0028] Figure 2 The pad offset of a prior art ceramic substrate is shown.
[0029] Figure 3 A first substrate is shown formed on a carrier.
[0030] Figure 4 The formation of a buffer layer and a second substrate is shown.
[0031] Figure 5 The formation of a first insulating layer is shown.
[0032] Figure 6 The pads of the second substrate are shown exposed.
[0033] Figure 7 Removal of the carrier and release layer is shown.
[0034] Figure 8 The formation of a second insulating layer is shown.
[0035] Figure 9 The package structure according to the embodiment of the present application is shown. DETAILED DESCRIPTION
[0036] In order to better understand the spirit of the embodiments of the present application, some preferred embodiments of the present application are further described below.
[0037] The embodiments of the present application will be described in detail below. Throughout this specification, identical or similar components and components having identical or similar functions are represented by similar reference numerals. The embodiments described herein with respect to the accompanying drawings are illustrative and diagrammatic and are intended to provide a basic understanding of the present application. The embodiments of the present application should not be construed as limiting the present application.
[0038] As used herein, the terms "substantially," "substantially," and "approximately" are used to describe and illustrate small variations. When used in conjunction with an event or circumstance, the terms may refer to instances where the event or circumstance occurred precisely as well as instances where the event or circumstance occurred very approximately.
[0039] In this specification, unless otherwise specified or limited, relative terms such as "central", "longitudinal", "lateral", "front", "rear", "right", "left", "inner", "outer", "lower", "higher", "horizontal", "vertical", "above", "below", "above", "below", "top", "bottom" and their derivatives (such as "horizontally", "downwardly", "upwardly", etc.) should be interpreted as referring to the directions described in the discussion or depicted in the drawings. These relative terms are only used for convenience of description and do not require that the present application be constructed or operated in a specific orientation.
[0040] For ease of description, “first,” “second,” “third,” etc. may be used herein to distinguish different components in a figure or a series of figures. “First,” “second,” “third,” etc. are not intended to describe the corresponding components.
[0041] Figures 3 to 9 A method for forming the package structure 100 according to an embodiment of the present application is shown.
[0042] Figure 3 It is shown that a first substrate 10 is formed on a carrier 200, and a receiving space / receiving cavity 12 is formed in the first substrate 10. A carrier 200 and a release layer 180 located on the carrier 200 are provided. The carrier 200 can be a glass carrier substrate, a ceramic carrier substrate, etc. The release layer 180 can be formed of a polymer-based material, which can be removed from the upper structure formed in a subsequent step together with the carrier 200. In some embodiments, the release layer 180 is a thermal release material based on epoxy resin, which loses its adhesiveness when heated, such as a light-to-heat conversion (LTHC) release coating. In other embodiments, the release layer 180 can be an ultraviolet (UV) glue that loses its adhesiveness when exposed to UV light. The release layer 180 can be dispensed and cured in the form of a liquid, can be a laminated film laminated on the carrier 200, or can be similar. The top surface of the release layer 180 can be horizontal and can have a high degree of flatness. In some embodiments, the first substrate 10 is a plastic substrate.
[0043] See also Figure 4A buffer layer 30 is formed in the accommodation space 12, and the bottom surface of the buffer layer 30 is flush with the bottom surface of the first substrate 10. A second substrate 20 is formed on the buffer layer 30. In some embodiments, the second substrate 20 is a ceramic substrate with a total thickness variation (TTV) greater than 30 μm. The buffer layer 30 balances the thickness variation of the second substrate 20 to provide leveling for the second substrate 20. The buffer layer 30 can also prevent the stress during punching from damaging the second substrate 20, thereby protecting the second substrate 20. After the second substrate 20 is formed, the buffer layer 30 can be separated from the first substrate 10 or in contact with the first substrate 10. The side surface of the second substrate 20 is separated from the first substrate 10. The buffer layer 30 extends beyond the side surface of the second substrate 20 and covers part of the side surface of the second substrate 20. Part of the first insulating layer 41 and part of the buffer layer 30 are located between the side surface of the second substrate 20 and the first substrate 10. In some embodiments, the number of through holes corresponding to the pads 22 of the second substrate 20 can be adjusted according to actual needs.
[0044] See also Figure 5 For example, the first insulating layer 41 covering the second substrate 20 is filled in the receiving space 12 through a lamination process. In some embodiments, the contact surface 32 between the first insulating layer 41 and the buffer layer 30 is a curved surface.
[0045] See also Figure 6 , a planarization process (eg, grinding) is performed to expose the pad 22 of the second substrate 20, and the top surface of the first insulating layer 41 is flush with the top surface of the second substrate 20. Figure 6 In the illustrated embodiment, because the buffer layer 30 is disposed beneath the second substrate 20, the top surface of the second substrate 20 is higher than the top surface of the first substrate 10, and the first insulating layer 41 partially covers the top surface of the first substrate 10. In other embodiments, the thickness of the second substrate 20 may be smaller, and the top surface of the first insulating layer 41 may be flush with the top surfaces of the first substrate 10 and the second substrate 20. In still other embodiments, the thickness of the second substrate 20 is greater than that of the first substrate 10.
[0046] See also Figure 7 , the carrier 200 and the release layer 180 are removed.
[0047] See also Figure 8 , such as by lamination process to form a covering Figure 7 The second insulating layer 42 of the structure shown is located above the second substrate 20 and the first insulating layer 41. The material of the second insulating layer 42 is, for example, prepreg (PP). Part of the first insulating layer 41 is located between the top surface of the first substrate 10 and the second insulating layer 42.
[0048] See also Figure 9For example, a conductive via 50 is formed through the second insulating layer 42 by laser etching and electroplating to electrically connect the pad 22 of the second substrate 20. The second insulating layer 42 and the conductive via 50 constitute a redistribution layer (RDL). The problem of displacement of the pad 22 of the second substrate 20 is solved by redistribution of the second insulating layer 42 and the conductive via 50.
[0049] At this point, the production of package structure 100 is complete. Package structure 100 includes: a first substrate 10 having a housing space 12 defined therein; a second substrate 20 disposed in housing space 12, the second substrate 20 having greater rigidity than the first substrate 10; and a buffer layer 30 disposed in housing space 12 and located below the second substrate 20. The horizontal dimension of buffer layer 30 is greater than that of the second substrate 20, and the buffer layer 30 does not extend beyond the bottom surface of the first substrate 10, that is, the buffer layer 30 is completely located within the housing space 12. The embodiments of the present application solve the problem of heterogeneous substrates on the component. The buffer layer 30 is used to address the problem of the uneven bottom of the second substrate 20. The buffer layer 30 has a leveling effect and can absorb stress during component bonding, avoiding damage to the second substrate 20 and improving the yield of package structure 100.
[0050] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that the present invention is susceptible to various modifications and variations. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.
Claims
1. A packaging structure, characterized in that: include: A first substrate defines a receiving space; a second substrate, disposed in the accommodation space, wherein the second substrate has greater rigidity than the first substrate; A buffer layer is provided in the accommodation space and is located below the second substrate. The horizontal dimension of the buffer layer is larger than the horizontal dimension of the second substrate, and the extension of the buffer layer does not exceed the bottom surface of the first substrate.
2. The packaging structure according to claim 1, wherein: Also includes: The first insulating layer fills the accommodation space.
3. The packaging structure according to claim 2, wherein: A contact surface between the first insulating layer and the buffer layer is a curved surface.
4. The packaging structure according to claim 2, wherein: A top surface of the first insulating layer is flush with a top surface of the second substrate.
5. The packaging structure according to claim 4, wherein: Part of the first insulating layer covers a top surface of the first substrate.
6. The packaging structure according to claim 1, wherein: Also includes: The second insulating layer is disposed above the second substrate, and the second insulating layer is provided with a conductive hole electrically connected to the second substrate.
7. The packaging structure according to claim 1, wherein: A bottom surface of the buffer layer is flush with a bottom surface of the first substrate.
8. The packaging structure according to claim 1, wherein: The buffer layer contacts the first substrate.
9. The packaging structure according to claim 1, wherein: The buffer layer covers a portion of the side surface of the second substrate.
10. The packaging structure according to claim 1, wherein: The second substrate is a ceramic substrate.