Component carrier structure and semi-finished product comprising same

Abstract

The embodiment of the utility model provides a component bearing piece structure (100). The component carrier structure (100) comprises: a stack (102) comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106); and at least one identifier structure (108), the at least one identifier structure (108) being arranged in the stack (102); wherein the identifier structure (108) comprises a plurality of blind recesses (110) distributed at a surface (112) of at least one layer structure of the stack (102), the distribution of the plurality of blind recesses (110) on the surface (112) constituting an optically readable pattern of the identifier structure (108). The embodiment of the utility model further provides a semi-finished product, the semi-finished product comprises a plurality of component bearing part structures (100), and the semi-finished product is constructed to be capable of being divided into a plurality of independent component bearing part structures (100).

Description

Technical Field

[0001] The present application relates to the field of semiconductor device manufacturing, and in particular to a component carrier structure and a semi-finished product comprising the same. Background Art

[0002] This section provides background information related to the present application but does not necessarily constitute prior art.

[0003] Against the backdrop of the increasing product functionality of component carriers (such as printed circuit boards) equipped with one or more electronic components, the increasing miniaturization of these electronic components, and the increasing number of electronic components to be mounted on component carriers, increasingly powerful array-shaped components or packages with several electronic components are being used. These array-shaped components or packages have a plurality of contacts or connections, the spacing between which is becoming increasingly smaller. Such component carriers should be mechanically robust and electrically reliable in order to be able to operate even under harsh conditions.

[0004] Effectively controlling batch manufacturing processes for producing component carriers is challenging. It is desirable for component carriers or their preforms to have traceability, i.e., the ability to track and identify component carrier structures or their associated bodies, for example, during manufacture and / or use. Tracking component carrier structures can allow verification of the manufacturing history, location, manufacturing environment (e.g., temperature, humidity), or application of individual component carrier structures. Utility Model Content

[0005] This section provides a general summary of the application, and is not a comprehensive disclosure of its full scope or all of its features.

[0006] According to an exemplary embodiment of the present application, a component carrier structure is provided, which includes: a stack, the stack including at least one electrically conductive layer structure and at least one electrically insulating layer structure; and at least one identifier structure, at least one of the identifier structures being arranged in the stack; wherein the identifier structure includes a plurality of blind recesses distributed on the surface of at least one layer structure of the stack, and the distribution of the plurality of blind recesses on the surface constitutes an optically readable pattern of the identifier structure.

[0007] In the context of the present application, the term "component-carrier structure" may particularly denote any support structure capable of accommodating one or more components thereon and / or therein to provide mechanical support and / or electrical connection and / or optical connection and / or thermal connection. In other words, the component carrier may be configured as a mechanical and / or electronic support for the components.

[0008] In the context of the present application, the term "stack" may particularly denote an arrangement comprising a plurality of planar layer structures arranged parallel to each other.

[0009] In the context of the present application, the term "layer structure" may particularly denote a continuous layer, a patterned layer or a plurality of non-continuous islands in a common plane.The layer structure may be electrically insulating and / or electrically conductive.

[0010] In the context of the present application, the term "surface of the layer structure" may denote an accessible surface of an electrically conductive layer structure or an accessible surface of an electrically insulating layer structure.

[0011] In some embodiments, the surface of a layer structure may specifically refer to the main surface of the layer structure. The main surface of a layer structure may refer to the planar surface of the layer structure that generally has the largest surface area. The main surface of an electrically conductive layer structure may include pads, conductive traces, and other features for mounting electronic components and electrical connection. The main surface of an electrically insulating layer structure may include features for achieving electrical isolation. In certain embodiments, the main surface of a layer structure may be further defined as a surface with specific functional areas, such as a signal processing area, a power management area, or a user interface area. It will be understood that the definition of the main surface may vary depending on the design and application of the layer structure or even the entire component carrier structure, but the common feature is that it is the main working surface on the layer structure or component carrier structure for mounting electronic components and providing electrical functions and the required electrical isolation functions. The thickness of the layer structure can be defined by the distance between two relative main surfaces.

[0012] In the context of this application, the term "identifier structure" may particularly refer to a physical structure used to identify a component carrier structure, a semi-finished product including a component carrier structure, or even a layer structure thereof. The identifier structure may be an information-carrying structure and may include an identifier (e.g., a recognizable pattern) that identifies the component carrier structure or semi-finished product. In some embodiments, the identifier structure or a combination thereof may be unique to a particular component carrier structure or semi-finished product including a component carrier structure. In other embodiments, the identifier structure or a combination thereof may be identical for a certain number of component carrier structures, such as for a portion of component carrier structures manufactured within a common batch or lot. The identifier structure may, for example, include a data matrix code or a QR code. The identifier structure may include information such as a link to a specific dataset in a database. The identifier structure may, for example, include information about the properties of the component carrier structure itself, including, but not limited to, a unique identifier, process parameters, equipment number, batch number, panel serial number, material information, exception records, quality inspection results, and date and time information of panel production. Additionally or alternatively, information about defect conditions of the component carrier structure including the identifier structure may also be stored in the dataset. In particular, the manufacturing history of a semi-finished product or a part thereof (eg a layer structure) can be retrieved from a data set in a database to which the identifier structure is linked.

[0013] In the context of this application, the term "blind recess" may particularly refer to a recessed feature (such as a microstructure or micropore) formed on a surface (particularly a major surface) of a laminated layer structure that does not extend through the entire layer structure, wherein "laminated layer structure" or "layer structure" refers to the electrically conductive layer structure and / or electrically insulating layer structure of the laminate. With respect to a single blind recess, it may exist within a single layer structure or span a layer structure combination formed by combining multiple consecutive layer structures. In other words, in some embodiments, a single blind recess may be formed entirely within a single layer structure. However, in other embodiments, a single blind recess may also be formed entirely within a layer structure combination formed by combining two or more consecutive layer structures. To be more precise, "not extending through the entire layer structure" may mean that the blind recess does not extend through a single layer structure, or it may mean that the blind recess does not extend through a layer structure combination formed by combining two or more consecutive layer structures. "Not extending through" may particularly mean that the depth of the blind recess does not exceed the entire thickness of the layer structure, that is, it does not penetrate the entire thickness of a single layer structure or a layer structure combination. "Not through" can also specifically mean that the bottom wall of the blind recess is located inside a layer structure having a certain thickness. In particular, for a combination of multilayer structures, the blind recess may penetrate one or more of the layer structures, but will not penetrate the thickness of the entire multilayer structure combination.

[0014] In the context of the present application, the term "optically readable pattern" may particularly denote a pattern that can be read by an optical reader device for the purpose of identifying or characterizing a component carrier structure or a portion thereof. Exemplarily, the optically readable pattern may comprise a one-dimensional code, a two-dimensional code, a three-dimensional code, or a data matrix code. For example, a three-dimensional code may be a code comprising different colors and / or depth information. In some embodiments, a data matrix code may be preferred because such a code is still readable even when parts of it are damaged. Due to the harsh conditions that may exist during the manufacture of the component carrier structure, it may be advantageous to use such a fault-robust data matrix code.

[0015] An exemplary embodiment provides a component carrier structure comprising a stack of one or more electrically conductive layer structures and one or more electrically insulating layer structures. At least one identifier structure is disposed in the stack. Each identifier structure includes a plurality of blind recesses distributed along the surface of a corresponding layer structure of the stack. The distribution of the plurality of blind recesses on the surface forms an optically readable pattern of the identifier structure. When an optical reader (e.g., a scanner or camera) scans the optically readable pattern of the identifier structure, manufacturing information of the layer structure associated with the identifier structure, and even the entire component carrier structure, can be obtained. For example, by scanning the optically readable pattern of the identifier structure, the optical reader can link to a specific dataset in a database and retrieve information of interest from the dataset, such as production batch, panel number, process parameters, and processing time. In this way, entire production information can be tracked at the panel level and linked to machine parameters to understand panel-level production status and machine production information, thereby more precisely controlling and improving product quality and more accurately and efficiently locating anomalies within a batch. Furthermore, by analyzing panel-level production data, it is possible to identify which processes or parameters need to be optimized, further improving production efficiency and yield. In addition, the identifier structure provided in the embodiments of the present application can be flexibly set according to customer products and production processes and has wide applicability.

[0016] In the following, further exemplary embodiments of the component carrier structure will be explained.

[0017] In some optional embodiments, a plurality of blind recesses are arranged in an array on the surface of the layer structure to form an optically readable pattern of the identifier structure. This array arrangement can be used as a carrier for information storage and transmission. The optically readable pattern (e.g., a data matrix code) formed by the arrayed blind recesses can be quickly and accurately identified by optical scanning equipment (e.g., an optical camera or a machine vision system). In some embodiments, when the identifier structure is read by an optical scanning device, a color difference can be formed between the blind recesses on the identifier structure and other areas of the identifier structure where no blind recesses are present. This color difference can facilitate the identification of the information carried by the identifier structure. A uniform and regular array of blind recesses can reduce interference caused by surface unevenness or dirt during the reading process, helping to improve the contrast of the optical signal and the signal-to-noise ratio during the scanning process. The array distribution design can accommodate more blind recesses within a limited surface space, thereby increasing information density. A dense array effectively utilizes the surface space without interfering with other functional areas. During the manufacturing process, a uniform array structure can reduce manufacturing errors and improve production efficiency, while ensuring that the relative positions of blind recesses on different layer structures and the dimensions of each blind recess are substantially consistent. In addition, the array-distributed blind recesses can enhance the aesthetic appearance of the product, giving it a neat, symmetrical and orderly visual effect.

[0018] In some optional embodiments, bottom walls of at least some of the blind recesses in the plurality of blind recesses are defined by exposed surfaces of the electrically conductive layer structure or the electrically insulating layer structure.

[0019] In the context of the present application, an "exposed surface" of an electrically conductive layer structure or an electrically insulating layer structure may particularly denote a surface that is exposed due to the formation of a blind recess in the corresponding layer structure. An exposed surface does not necessarily mean that the surface will remain exposed during the subsequent manufacturing process of the component carrier structure. In other words, the exposed surface may only be temporarily exposed and may be covered by other features (such as fillers or other superimposed layer structures) during the subsequent manufacturing process. In some embodiments, the exposed surface of the layer structure is at a certain depth of the layer structure along the thickness direction of the layer structure. In some embodiments, the exposed surface of the layer structure is part of the main surface of the layer structure.

[0020] In some optional embodiments, at least some of the plurality of blind recesses are defined by both a via formed in the electrically conductive layer structure and / or the electrically insulating layer structure and a filling block formed of a filling material filled in the via. Bottom walls of the blind recesses defined by the via and the filling block are defined by a top surface of the filling block.

[0021] The design flexibility of the identifier structure can be enhanced by having at least some of the multiple blind recesses jointly defined by vias and filler blocks formed within the vias. In some embodiments, filling blocks of different sizes (e.g., different vertical heights) can be used in at least some of the vias, depending on the design requirements of the identifier structure, so that the different blind recesses defined thereby can have different longitudinal depths. When the identifier structure is read by an optical scanning device, color differences can be generated between the blind recesses of different longitudinal depths formed by the vias filled with filler blocks of different sizes (e.g., different vertical heights), as well as between the blind recesses and other areas of the identifier structure where no blind recesses exist. This further enhances the design flexibility of the identifier structure. For blind recesses jointly defined by vias and filler blocks, the size and positional accuracy of the blind recesses can be more easily controlled during the manufacturing process.

[0022] In some optional embodiments, the filling material filled in the via is different from the material of the stacked component layer structure. In an embodiment, the electrically conductive layer structure and the electrically insulating layer structure of the stacked component can be collectively referred to as the stacked component layer structure. In an embodiment, the filling material filled in the via can be different from the material of the stacked component layer structure in which the blind recess defined by the via is located. The filling material can be adaptively adjusted based on the manufacturing requirements of the identifier structure and the component carrier structure. For example, the properties of different filling materials can be selected based on specific needs, either optimizing electrical properties (such as dielectric constant) or improving physical properties (such as tensile strength and flexibility), thereby making the design more diverse and adaptable. In some applications, the filling material can advantageously increase the overall strength and stability of the structure. The top surface of the filling block forms the bottom wall of the blind recess, which may help balance stress and distribute load, thereby reducing the risk of warping and fracture of the PCB board. In some applications, the filling material can also have good thermal conductivity, achieving better heat dissipation through the via.

[0023] In some optional embodiments, the blind recesses distributed at the surface of the electrically conductive layer structure are defined by both the corresponding vias and the electrically conductive blocks filled in the vias.

[0024] In some optional embodiments, the electrically conductive block is a copper block formed by electroplating copper. Advantageously, copper electroplating is a common process in component carrier manufacturing. This process allows for precise control of the thickness and shape of the copper block in an economical and convenient manner, thereby ensuring the accuracy of the resulting blind recess. Furthermore, in some embodiments, the copper electroplating process within the blind via can be performed simultaneously with the copper electroplating process in other areas of the component carrier, thereby streamlining the component carrier manufacturing process.

[0025] In some optional embodiments, the total surface coverage of the plurality of blind recesses distributed on the surface of each electrically conductive layer structure or each electrically insulating layer structure is less than the surface coverage of the corresponding electrically conductive layer structure or electrically insulating layer structure. The overall coverage of the identifier structure provided on the layer structure of the stack is typically much less than the surface coverage of the layer structure. The provision of the identifier structure does not affect the arrangement of functional areas on the layer structure, particularly the electrically conductive layer structure. In some embodiments, the total surface coverage of the plurality of blind recesses distributed on the surface of each electrically conductive layer structure or electrically insulating layer structure is less than the surface coverage of the corresponding identifier structure, including the plurality of blind recesses.

[0026] In some optional embodiments, at least some of the multiple filling blocks corresponding to the multiple blind recesses distributed on the surface of the electrically conductive layer structure or the electrically insulating layer structure have a vertical extension that is different from the vertical extension of the electrically conductive layer structure or the electrically insulating layer structure. In some embodiments, the filling blocks extend at least partially across the vertical extension of the layer structure, from the surface of the layer structure exposed by the formation of the vias toward the opposing main surface. In some embodiments, at least some of the filling blocks may protrude beyond the vias, such that the filling blocks have a certain height relative to the main surface of the layer structure. In some embodiments, the material of the filling blocks may differ from the material of the layer structure in terms of optical detection performance, such that even if the filling blocks fill the entire blind recess flush with the surface of the corresponding layer structure, effective reading of the identifier structure can still be achieved. When the identifier structure is read using an optical scanning device, color differences may be generated between the filling blocks with different vertical extensions, and between the filling blocks and other areas of the identifier structure. The diversity of the vertical extensions of the filling blocks correspondingly enhances the design diversity of the blind recesses and, therefore, the entire identifier structure.

[0027] In some optional embodiments, the identifier structure includes a plurality of blind recesses distributed in a matrix on the surface of the layer structure, wherein the optically readable pattern includes a matrix pattern. The horizontally and vertically ordered arrangement of the blind recesses can facilitate effective reading of the identifier structure by an optical reading device.

[0028] In some optional embodiments, blind recesses are provided at most partially within the region of the structure through which a transversely extending line or a longitudinally extending line passing through the identifier structure passes. A plurality of blind recesses distributed at most partially within the region of the structure define the optically encoded information of the optically readable pattern. For example, when the identifier structure is arranged in a matrix, blind recesses may be provided at most partially within the region of the matrix through which a transversely extending line or a longitudinally extending line passing through the matrix passes. A plurality of blind recesses distributed at most partially within the region of the matrix define the optically encoded information of the optically readable pattern. In the context of the present application, both the transversely extending line and the longitudinally extending line extend parallel to the surface of the identifier structure. In particular, the transversely extending line and the longitudinally extending line are substantially perpendicular to each other.

[0029] In some optional embodiments, two or more identifier structures are provided in the stack, and for each stack layer structure provided with an identifier structure, the identifier structure of the stack layer structure includes a plurality of blind recesses having a different distribution relative to the other identifier structures. The two or more identifier structures in the stack are different from each other, making it possible to trace manufacturing information at the layer level. More specifically, in this way, a layer-specific identifier structure can be created, so that the manufacturing process of each layer structure of the component carrier structure can be reflected in the layer-specific identifier structure. Thus, the characteristics of each individual layer structure of the stack during the manufacturing process can be traced.

[0030] In some optional embodiments, two or more identifier structures are provided in the stack, and each identifier structure includes multiple blind recesses with the same distribution. Having the same distribution of blind recesses can help the identifier structure maintain consistent optical properties under different environments and conditions. This uniform distribution design can simplify process parameter settings and processing steps during the manufacturing process, helping to reduce error rates and production costs. Furthermore, if some identifier structures with the same optically readable pattern become unreadable due to damage or other reasons, sufficient information can be obtained by reading other identifier structures, thereby avoiding the situation of being unable to trace.

[0031] In some optional embodiments, two or more identifier structures are provided in a stack, and at least two of the two or more identifier structures have the same optically readable pattern consisting of a plurality of blind recesses arranged in the same pattern. This identical optically readable pattern of blind recesses arranged in the same pattern can serve as unique identification information for the stack, allowing the stack to be tracked during the manufacturing process of complex component carrier structures. This enables traceability of each stack during the manufacturing process.

[0032] In other embodiments, three or more identifier structures are provided in the stack, two or more of the three or more identifier structures are different from each other, and two or more of the three or more identifier structures are the same as each other. This arrangement enables traceability of the characteristics of each individual layer structure of the stack during the manufacturing process, as well as traceability of each stack itself.

[0033] In some optional embodiments, at least one of the at least one identifier structures is located in a test area on the surface of the layer structure. This test area is located in an area of ​​the component carrier structure other than the functional area. The surface coverage of the test area is typically greater than the surface coverage of the identifier structure. The functional area of ​​the component carrier structure can specifically refer to an area of ​​the component carrier structure that is relevant for implementing the functions of mounting electronic components, electrical connection, and electrical isolation. Positioning the identifier structure in a non-functional area of ​​the component carrier structure avoids any adverse effects of the identifier structure on the electrical characteristics of the component carrier structure.

[0034] In some optional embodiments, the inspection area is defined by a frame structure that surrounds at least a portion of the identifier structure and is made of the same material as the laminated structure in which the frame structure is located. The frame structure partially or completely surrounds the identifier structure and is made of the laminated material. The frame structure may not participate in the encoding of the information elements of the identifier structure, but the frame structure can advantageously serve as a predefined outer boundary or spatial limit for the identifier structure. Such a frame structure can significantly facilitate an optical reader device's ability to locate and determine the spatial limits of the identifier structure within an image based on its recognition of the frame structure having its predefined shape and / or dimensions. In short, an optical reader device (e.g., an optical camera) can optically identify the frame structure to accurately identify the position of a designated identifier structure within an image. When the frame structure has predefined properties that are known in advance by the optical reader device, it is easier for pattern recognition algorithms, etc., to accurately and quickly determine the position of the identifier structure for detailed interpretation of the identifier structure. When the peripheral or surrounding frame structure of the identifier structure has been identified, decoding of the information within the identifier structure can be performed with excellent accuracy. Thus, by adding a frame structure around the identifier structure, the accuracy and efficiency of optically determining information from the at least one identifier structure of the component carrier structure can be significantly improved.

[0035] In some optional embodiments, two or more identifier structures within a stack are located at different depths within the stack and are offset relative to each other but do not exceed the limits defined by the inspection area. Although the identifier structures at different depths within the stack may be offset from each other (due to minor errors that inevitably occur during the manufacturing process), the presence of the identifier structure located deeper within the stack does not affect the reading of the identifier structure located on the surface of the stack. Furthermore, because all identifier structures do not exceed the limits defined by the inspection area, any potential adverse effects of the identifier structures on the electrical characteristics of the component carrier structure are avoided.

[0036] In some optional embodiments, the identifier structures located in the internal layer structure of the stack are not visible from the outside of the component-carrying structure, so that the presence of the identifier structures located inside (deeper) the stack does not affect the reading of the identifier structures located outside (surface) the stack.

[0037] In some optional embodiments, at least some of the plurality of blind recesses include inclined sidewalls. The inclined sidewall design can increase the mechanical strength and stability of the material surrounding the blind recess. The inclined sidewalls also facilitate more uniform filling of the material during manufacturing, particularly during electroplating. This helps improve adhesion between the filling material and the layer structure, thereby enhancing structural reliability.

[0038] According to an exemplary embodiment of the present application, a semi-finished product is provided. The semi-finished product includes the component carrier structure described above, and the semi-finished product is configured to be divisible into a plurality of separate component carrier structures.

[0039] In an embodiment, the component carrier structure includes a stack of at least one electrically insulating layer structure and at least one electrically conductive layer structure. For example, the component carrier can be a laminate of the aforementioned electrically insulating layer structure and the electrically conductive layer structure, in particular a laminate formed by applying mechanical pressure and / or thermal energy. The aforementioned stack can provide a plate-like component carrier that can provide a large mounting surface for additional components while still being very thin and compact.

[0040] In one embodiment, the component carrier structure is shaped as a plate. This facilitates a compact design, wherein the component carrier still provides a large base for mounting components thereon. Furthermore, bare wafers, particularly as an example of embedded electronic components, can be easily embedded in thin plate elements such as printed circuit boards due to their small thickness.

[0041] In an embodiment, the component carrier structure or a preform thereof is configured as one of a printed circuit board, a substrate (particularly an IC substrate) and an interposer.

[0042] In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a plate-like component carrier formed by laminating a plurality of electrically conductive layer structures with a plurality of electrically insulating layer structures, for example by applying pressure and / or providing heat. As a preferred material for PCB technology, the electrically conductive layer structures are made of copper, while the electrically insulating layer structures may comprise resin and / or glass fibres, so-called prepregs or FR4 materials. The various electrically conductive layer structures may be connected to one another in the desired manner by forming holes through the laminate, for example by laser drilling or mechanical drilling, and by partially or completely filling the holes with electrically conductive material, in particular copper, thereby forming vias such as through-hole connections. In addition to being able to embed one or more components in the printed circuit board, the printed circuit board is typically configured to accommodate one or more components on one or two opposite surfaces of the plate-like printed circuit board. They may be connected to the respective main surfaces by soldering. The dielectric part of the PCB may consist of a resin with reinforcing fibres, such as glass fibres.

[0043] In the context of this application, the term "substrate" can particularly refer to a small component carrier. A substrate can be a relatively small component carrier associated with a PCB, on which one or more components can be mounted, and can serve as a connecting medium between one or more chips and another PCB. For example, a substrate can have substantially the same size as the components (particularly electronic components) to be mounted thereon (for example in the case of a chip-scale package (CSP)). More particularly, a substrate can be understood as a carrier for electrical connections or electrical networks and a component carrier comparable to a printed circuit board (PCB), but with a relatively high density of horizontal and / or vertically arranged connectors. Horizontal connectors are, for example, electrically conductive paths, while vertical connectors can be, for example, drilled holes. These horizontal connectors and / or vertical connectors are arranged within the substrate and can be used to provide electrical, thermal and / or mechanical connections between a housing component or a housingless component (such as a bare wafer), in particular, of an IC chip and a printed circuit board or an intermediate printed circuit board. Therefore, the term "substrate" also includes "IC substrates". The dielectric portion of the substrate may consist of a resin with reinforcing particles such as reinforcing spheres, particularly glass spheres.

[0044] The substrate or interposer may include or consist of at least a layer of the following substances: glass; silicon and / or a photosensitive or dry-etchable organic material, such as an epoxy-based laminate material (e.g., an epoxy-based laminate film); or a polymer compound (the polymer compound may or may not include photosensitive and / or heat-sensitive molecules).

[0045] In an embodiment, at least one electrically insulating layer structure comprises at least one of the following: a resin (e.g., a reinforced or non-reinforced resin, such as an epoxy resin or a bismaleimide-triazine resin), a cyanate resin, a polyphenylene derivative, a glass (in particular, glass fiber, multilayer glass, a glass-like material), a prepreg material (e.g., FR-4 or FR-5), a polyimide, a polyamide, a liquid crystal polymer (LCP), an epoxy-based laminate film, polytetrafluoroethylene (PTFE, Teflon), a ceramic, and a metal oxide. Reinforcement structures such as meshes, fibers, or spheres made of, for example, glass (multilayer glass) may also be used. Although prepregs, in particular FR4, are generally preferred for rigid PCBs, other materials, in particular epoxy-based laminate films or photoimageable dielectric materials may also be used. For high-frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymers, and / or cyanate resins, low-temperature co-fired ceramics (LTCC), or other low, very low, or ultra-low DK materials may be applied in the component carrier as the electrically insulating layer structure.

[0046] In an embodiment, the at least one electrically conductive layer structure comprises at least one of the following substances: copper, aluminum, nickel, silver, gold, palladium and tungsten. Although copper is generally preferred, other materials or coated versions thereof are also possible, in particular coated with superconducting materials such as graphene.

[0047] The aspects defined above and further aspects of the invention are apparent from the examples of embodiment to be described hereinafter and are explained with reference to these examples of embodiment. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] The features and advantages of the embodiments of the present application will become more readily understood through the following description with reference to the accompanying drawings, which are not drawn to scale and in which some features are exaggerated or minimized to show details of particular components.

[0049] Figure 1A and Figure 1B A schematic cross-sectional view of a component carrier structure 100 according to an embodiment of the present application is shown.

[0050] Figure 2 A schematic cross-sectional view of a component carrier structure 100 according to a further embodiment of the present application is shown.

[0051] Figure 3 A schematic plan view of a stacked layer structure provided with an identifier structure according to an embodiment of the present application is shown.

[0052] Figure 4 A component carrier structure according to an exemplary embodiment of the present application is shown in a plan view from above, wherein the individual identifier structures of the component carrier structure are arranged in predetermined inspection areas.

[0053] 5A to 5I A schematic cross-sectional view of a component carrier structure 100 according to an embodiment of the present application during the manufacturing process is shown. DETAILED DESCRIPTION

[0054] The present application will be described in detail below with reference to the accompanying drawings by way of exemplary embodiments of the present application. It should be noted that the following detailed description of the present application is for illustrative purposes only and is not intended to limit the present application. In addition, the same reference numerals are used throughout the various drawings to represent the same components.

[0055] It should also be pointed out that, for the sake of clarity, not all features of an actual specific embodiment are described and shown in the specification and drawings. In addition, in order to avoid unnecessary details that obscure the technical solutions focused on by this application, only the arrangement structures closely related to the technical content of this application are described and shown in the specification and drawings, while other details that are not closely related to the technical content of this application and are known to those skilled in the art are omitted.

[0056] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, each embodiment of the present application will be described in detail below with reference to the accompanying drawings. However, it will be understood by those skilled in the art that in each embodiment of the present application, many technical details are proposed to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present application can be implemented. The division of the following embodiments is for convenience of description and should not constitute any limitation on the specific implementation of the present application. The various embodiments can be combined with each other and referenced to each other under the premise of no contradiction.

[0057] It should be noted that the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or are inherent to these processes, methods, products or apparatus.

[0058] In this application document, terms such as "upper," "lower," "outer," and "inner" used to describe directions are for descriptive purposes only and should not be construed as limiting. Furthermore, although this application has been described with reference to exemplary embodiments, it should be understood that this application is not limited to the specific embodiments described and illustrated in detail herein. Those skilled in the art may make various modifications to the exemplary embodiments without departing from the scope of the claims of this application.

[0059] In the manufacturing process of component-carrying structures such as printed circuit boards, there are many processes (such as mechanical drilling, laser drilling, electroplating, etc.) where production information can only be recorded manually or manually entered into a computer. Due to manual recording or manual input, the accuracy and precision of the data are low, prone to human errors or omissions, and inefficient. Existing production information recording methods can only track and record batch-level information, but cannot provide detailed panel-level production information. This means that only the production information of a specific batch can be tracked, and the production status of each panel cannot be accurately determined. When certain panels in the same batch are affected, such as due to quality issues or production anomalies, it is impossible to accurately identify the specific affected panels. This results in the entire batch requiring additional inspection or processing, significantly increasing the cost and time. In addition, existing recording methods cannot provide detailed production information for each panel, making it impossible to trace every process and status of a specific panel during the production process, thereby preventing accurate quality control and problem tracing.

[0060] The component carrier structure and the semi-finished product including the same provided by the exemplary embodiments of the present application can solve at least some of the above-mentioned problems.

[0061] Figure 1A 、 Figure 1B and Figure 2 Schematic cross-sectional views of component carrier structures 100 according to embodiments of the present application are respectively shown. Figure 3 1 is a schematic plan view of an electrically conductive layer structure 104 or an electrically insulating layer structure 106 provided with an identifier structure 108 according to an embodiment of the present application.

[0062] Reference Figure 1A 、 Figure 1B and Figure 2 The component carrier structure 100 comprises a stack 102 having at least one electrically conductive layer structure 104 and at least one electrically insulating layer structure 106. One or more identifier structures 108 are arranged in the stack 102. The identifier structure 108 comprises a plurality of blind recesses 110 distributed on a surface 112 of at least one layer structure (the electrically conductive layer structure 104 and / or the electrically insulating layer structure 106) of the stack 102. The distribution of the plurality of blind recesses 110 on the surface 112 of the layer structure constitutes an optically readable pattern of the corresponding identifier structure 108 (see, for example, Figure 3 ).

[0063] In an embodiment, the identifier structure 108 encodes information such that the component carrier structure 100 or even individual layer structures thereof (the electrically insulating layer structure 104 and / or the electrically conductive layer structure 106) can be identified and / or tracked by optically reading the information from the identifier structure 108. Identifying the component carrier structure 100 or a portion thereof based on optically reading the identifier structure 108 can include determining identity information about the component carrier structure 100 to distinguish it from other or even all other component carrier structures. Tracking the component carrier structure 100 based on the information optically read from the identifier structure 108 can allow tracing back each individual component carrier structure 100 or even individual layer structures within the component carrier structure 100 within a specific time interval, for example, during the entire manufacturing process of each individual component carrier structure 100 or during its lifetime.

[0064] The optically readable pattern (such as a matrix pattern, in particular a data matrix code) formed by the plurality of blind recesses 110 in the identifier structure 108 can be linked to a specific data set in an associated database. This data set can contain manufacturing information related to the component carrier structure 100 or even at the layer structure level, such as production batch, panel number, layer structure number, process parameters, and processing time. By scanning the optically readable pattern of the identifier structure 108, an optical reader can link to the specific data set in the database and retrieve the information of interest from the data set. The optical reader can, for example, include an optical camera that can capture images in a specified wavelength range (e.g., a wavelength range including visible light, a wavelength range including ultraviolet light, and / or a wavelength range including infrared light).

[0065] The identity information of the component carrier structure 100 or even its layer structure can be stored in association with its manufacturing information during the manufacturing process in a data set of a remote database associated with the identifier structure 108. As the manufacturing process of the component carrier structure 100 progresses, the data set in the database can be continuously updated until the end of the manufacturing process. In this way, the manufacturing history of each individual component carrier structure 100 can be obtained from a specific data set stored in the database.

[0066] The component carrier structure 100 provided in the exemplary embodiments of the present application enables tracking of manufacturing information for the component carrier structure 100 at the panel level, or even the layer level, thereby precisely controlling product quality and more accurately and efficiently locating anomalies within a batch. Furthermore, analyzing panel-level or layer-level production data can identify processes or parameters that require optimization, thereby improving production efficiency and yield.

[0067] The distribution (e.g., arrangement) of the plurality of blind recesses 110 included in each identifier structure 108 on the surface 112 of the electrically conductive layer structure 104 or the electrically insulating layer structure 106 defines an optically readable pattern of the identifier structure 108. In some embodiments, the plurality of blind recesses 110 of the identifier structure 108 may be arranged in an array on the surface 112 of the layer structure of the stack 102. For example, in some embodiments, the identifier structure 108 may include a plurality of blind recesses distributed in a matrix on the surface 112 of the layer structure, and accordingly, the optically readable pattern may include a matrix-like pattern. The optically readable pattern (e.g., a data matrix code) formed by the array of blind recesses 110 can be quickly and accurately recognized by an optical reader.

[0068] At least one identifier structure 108 can be formed during the production of the component carrier structure 100 based on the stack 102. If the identifier structure 108 is to be provided on the currently laminated layer structure, the steps for forming the identifier structure 108, such as the drilling process and the possible filling process, can be performed after the lamination process is completed.

[0069] In some embodiments, as Figure 1A As shown, the blind recess 110 can be defined by a blind hole formed in a single layer structure and / or a blind hole formed in a layer structure comprising two or more layer structures. In these embodiments, the bottom wall of the blind recess 110 is defined by a surface of the corresponding layer structure exposed by the formation of the blind recess 110. This exposed surface may be a portion of the main surface of the corresponding layer structure or an interior portion of the corresponding layer structure exposed by the formation of the blind recess 110. In some embodiments, the blind recess 110 in the form of a blind hole can be formed by a laser drilling process. In some embodiments, the blind recess 110 can have inclined sidewalls. In some embodiments, the longitudinal depths (also referred to as vertical depths or recess depths) of at least some of the multiple blind recesses 110 can be different. The different longitudinal depths of the blind recess 110 can carry information by presenting chromatic aberrations during scanning by an optical device. In other words, the different longitudinal depths of the blind recess 110 can selectively contribute to the information encoding of the identifier structure 108.

[0070] In other embodiments, Figure 1B As shown, the blind recess 110 may also be defined by a via 116 formed in the electrically conductive layer structure 104 and / or the electrically insulating layer structure 106 and a filling block 118 filled in the via 116. The bottom wall of the blind recess 110 defined by the via 116 and the filling block 118 may be defined by the top surface of the filling block 118.

[0071] The via 116 may be a blind hole or a through hole. The filling block 118 filled in the via 116 may be formed by plating (e.g., electroplating) a filling material in the via 116. For example, a copper block may be formed by electroplating a copper material in the via 116 formed in the electrically conductive layer structure 104. The filling material may be different from the material of the stacked layer structure. In particular, the filling material filled in the via 116 may be different from the material of the stacked layer structure in which the blind recess 110 defined by the via 116 is located. For example, the blind recess 110 distributed at the surface 112 of the electrically conductive layer structure 104 may be defined by both the corresponding via 116 and the electrically conductive block filled in the via 116, wherein the electrically conductive layer structure 104 may be formed of copper foil, and the electrically conductive block may be a copper block formed by an electroplating process using copper. When the identifier structure 108 is read by an optical device, a color difference may appear between the electrically conductive layer structure 104 formed of copper foil and the copper bulk formed by the copper electroplating process in the via 116 , thereby carrying information.

[0072] In the blind recess 110 defined by the via 116 and the filler block 118, the longitudinal depth of the blind recess 110 is determined by the vertical distance between the top surface of the filler block 118 and the uppermost surface of the layer structure or combination of layer structures in which the blind recess 110 is located. The longitudinal depth of the blind recess 110 can be adjusted by adjusting the depth of the via 116 and / or the size of the filler block 118.

[0073] The vertical extension of at least some of the plurality of filler blocks 118 may be different from the vertical extension of the layer structure or combination of layer structures through which the corresponding via 116 passes. In some embodiments, the filler blocks 118 extend at least partially over the vertical extension of the layer structure from the surface of the layer structure exposed by the formation of the via toward the opposite main surface, but do not extend beyond the main surface of the layer structure. In some embodiments, the filler blocks 118 extend at least partially over the vertical extension of the layer structure combination from the surface of the layer structure combination exposed by the formation of the via toward the uppermost main surface of the layer structure combination, but do not extend beyond the uppermost main surface of the layer structure combination.

[0074] In some embodiments, the filler blocks 118 in at least some of the plurality of vias 116 corresponding to the identifier structure 108 may further protrude beyond the vias 116 (i.e., the top surface of the filler blocks 118 may be vertically higher than the uppermost surface of the layer structure or combination of layer structures in which the corresponding blind recess 110 is located). The height to which different filler blocks 118 protrude above the uppermost surface may be substantially the same or different. In some embodiments, the different longitudinal depths of the blind recess 110 and / or the different protrusion heights of the filler blocks 118 may be used to carry information, for example, to encode additional information about the identifier structure 108 that can be decoded by an optical reader. In some embodiments, when the identifier structure 108 is scanned by an optical reader, the color of the filler blocks 118 is different from the color of the stack material. In some embodiments, when the identifier structure 108 is scanned by an optical reader, different filler blocks 118 appear to be different colors (e.g., due to the use of different filler materials). Different colors of different filler blocks 118 and / or different colors of different stack materials (different colors of different electrically insulating materials and / or different colors of the different electrically conductive materials) may encode additional information of the identifier structure 108 and may be decoded by an optical reader.

[0075] Depending on the needs of the application, information of the identifier structure 108 can be encoded based on the distribution of the blind recesses 110 on the surface 112, and additionally based on the longitudinal depth of the blind recesses 110 and / or the different colors of the filler blocks 118 and / or the different protrusion heights of the filler blocks 118 and / or the different colors of the laminate material. For example, in some embodiments, the optically readable pattern can form a three-dimensional code, which can be a code that includes different color and / or depth information.

[0076] Generally speaking, the identifier structure 108 arranged on the surface 112 of the electrically conductive layer structure 104 and / or the electrically insulating layer structure 106 of the stack 102 occupies only a small portion of the total surface area of ​​the corresponding layer structure so as not to affect the functional performance of the component-carrier structure 100. In particular, the total surface coverage of the plurality of blind recesses 110 distributed on the surface 112 of the electrically conductive layer structure 104 and / or the electrically insulating layer structure 106 is smaller than the surface coverage of the corresponding electrically conductive layer structure 104 or the electrically insulating layer structure 106, in particular much smaller than the surface coverage of the corresponding electrically conductive layer structure 104 or the electrically insulating layer structure 106, for example, less than 10%, preferably 1% to 5%, of the surface coverage of the corresponding electrically conductive layer structure 104 or the electrically insulating layer structure 106. In addition, the total surface coverage of the plurality of blind recesses 110 distributed at the surface of each electrically conductive layer structure 104 or electrically insulating layer structure 106 is also typically smaller than the surface coverage of the corresponding identifier structure 108 including the plurality of blind recesses 110. For example, the total surface coverage of the plurality of blind recesses 110 may account for 40% to 90%, in particular 50% to 80%, of the surface coverage of the corresponding identifier structure 108.

[0077] Reference Figure 2 In some embodiments, two or more identifier structures 108 may be provided in the stack 102. The blind recesses 110 included in each identifier structure 108 may have the same distribution. To identify or characterize the component carrier structure 100, it may be sufficient to read one of the multiple identifier structures 108, in particular, the identifier structure 108 on the outermost surface thereof.

[0078] In other embodiments, at least two of the two or more identifier structures 108 of the stack 102 have the same optically readable pattern consisting of the same distribution of the plurality of blind recesses 110. In still other embodiments, each of the two or more identifier structures 108 of the stack 102 includes a plurality of blind recesses 110 having a different distribution relative to the other identifier structures 108. In such cases, it may be necessary to read more than one (e.g., two or more) identifier structures 108 of the component-carrier structure 100, for example, to obtain sufficient information for tracing back the manufacturing process of the component-carrier structure 100.

[0079] Reference Figure 3 In a top view of the identifier structure 108 observed from the outside, a blind recess 110 may be provided at most partially in the structural region through which a transverse extension line or a longitudinal extension line passing through the identifier structure 108 passes. The distribution of a plurality of blind recesses 110 of the identifier structure 108 at most in the structural region defines the optically coded information of the optically readable pattern. Figure 3 In the embodiment, the first structure region R1 (eg, Figure 3 The number of the blind recesses 110 provided in the surrounding area (circled by the dotted line and adjacent to the first transverse extension line x1) is less than that in the second structural area R2 (eg, Figure 3 The number of blind recesses 110 provided in the surrounding area (circled by the dotted line and adjacent to the second transverse extension line x2) shown in FIG. The third structural area R3 (for example, Figure 3 The number of blind recesses 110 provided in the surrounding area adjacent to the first longitudinal extension line y1 and circled by the dotted line shown in FIG is greater than that in the fourth structural area R4 (eg, Figure 3 The number of blind recesses 110 provided in the second structural region R2 (circled by the dashed line and adjacent to the second longitudinal extension line y2) is shown in FIG. In other embodiments, the second structural region R2 through which the second transverse extension line x2 passes may not have any blind recesses 110 provided. In other embodiments, the fourth structural region R4 through which the second longitudinal extension line y2 passes may not have any blind recesses 110 provided. However, it will be understood that in other embodiments, blind recesses 110 may be provided entirely in the structural region through which one or more extension lines pass, while blind recesses 110 may be provided only partially in the structural regions through which other extension lines pass.

[0080] Figure 4 A plan view of a component carrier structure 100 according to an exemplary embodiment of the present application is shown, wherein the identifier structures 108 of the component carrier structure 100 are each arranged in a predetermined inspection region 120 of the component carrier structure 100 .

[0081] A specific area is consistently demarcated within the stacked layer structure of component-carrier structure 100 as a test area 120. The test area 120 is positioned consistently across the different layer structures, including being vertically aligned and not offset laterally relative to one another. Advantageously, the test area 120 is positioned in an area of ​​component-carrier structure 100 in addition to the functional area. The surface coverage of the test area 120 is greater than the surface coverage of the identifier structure 108.

[0082] Two or more identifier structures 108 in the stack 102 may be located at different depths in the stack 102. Identifier structures located in the inner layer structure of the stack 102 are not visible from the exterior of the component-carrier structure 100. The identifier structures 108 located at different depths in the stack 102 may be offset laterally relative to each other without exceeding the limits defined by the inspection area 120.

[0083] In some embodiments, only a portion of the two or more identifier structures 108 of the stack 102 are disposed in the predetermined inspection region 120 .

[0084] In some embodiments, the inspection area 120 can be defined by a frame structure 122. The frame structure 122 can surround at least a portion of the identifier structure 108. The frame structure 122 can be made of the same material as the ply structure in which the frame structure 122 is located. In embodiments, the frame structure 122 can extend around two or three of the four edges of the identifier structure 108, or around the entire perimeter of the identifier structure 108. More generally, the frame structure 122 can extend around at least two of the four edges of a rectangular structure. For example, the frame structure 122 can be located at an edge of the component-carrier structure 100 and then extend around two edges of the identifier structure 108. However, when the frame structure 122 extends around three or four edges of the identifier structure 108, the accuracy of the position of the identifier structure 108 can be further improved.

[0085] Generally, the frame structure 122 may not participate in encoding information elements of the identifier structure 108, but the frame structure 122 may serve as a predefined outer boundary limit for the identifier structure 108, thereby facilitating optical recognition operations.

[0086] However, it is understood that in other embodiments, the frame structure 122 may also participate in the encoding of information elements of the identifier structure. In other words, in some embodiments, the frame structure 122 itself may also carry information.

[0087] 5A to 5I Provided are schematic cross-sectional views of the component carrier structure 100 during the manufacturing process according to an embodiment of the present application. 5A to 5I A brief description will be given of a manufacturing process of the component carrier structure 100 according to an embodiment of the present application.

[0088] Figure 5A A core board is provided, which includes an electrically insulating layer structure 106 and two electrically conductive layer structures 104 stacked on the upper and lower sides of the electrically insulating layer structure 106.

[0089] Figure 5B A via 116 is formed in the core board, the via 116 extending through the entire top electrically conductive layer structure 104 but only extending through a portion of the middle electrically insulating layer structure 106. A localized interior portion of the middle electrically insulating layer structure is exposed due to the formation of the via. In this embodiment, the exposed localized interior portion can be referred to as an exposed surface of the layer structure.

[0090] Figure 5CA filling block 118 is formed in the via hole 116 by electroplating copper material. The via hole 116 and the filling block 118 therein together define the blind recess 110.

[0091] Figure 5D : A further electrically insulating layer structure 106 and a further electrically conductive layer structure 104 are laminated on the electrically conductive layer structure 104 formed with the identifier structure 108 .

[0092] Figure 5E A further via 116 is formed in the further electrically insulating layer structure 106 and the further electrically conductive layer structure 104. The further via 116 penetrates the further electrically conductive layer structure 104 but only extends through a portion of the further electrically insulating layer structure 106. A localized inner portion of the further electrically insulating layer structure 106 is exposed as a result of the formation of the via.

[0093] Figure 5F Another filling block 118 is formed by electroplating copper material in the other via hole 116. The other via hole 116 and the other filling block 118 therein jointly define another blind recess 110.

[0094] Figures 5G to 5I :exist Figure 5F The structure shown is repeated Figures 5D to 5F Steps to obtain Figures 5G to 5I The structure shown in .

[0095] I understand. 5A to 5I The manufacturing process shown in is merely illustrative. As mentioned above, in other embodiments, the blind recess 110 may be defined solely by a blind hole formed in the ply stack layer structure. In other embodiments, the vias 116 may have different longitudinal depths, and / or the filler blocks 118 may have different dimensions, particularly vertical extensions, and / or the filler blocks 118 may protrude relative to the main surface of the layer structure and the protrusion height of different filler blocks 118 may vary.

[0096] The exemplary embodiment of the present application further provides a semi-finished product, which may include a plurality of component carrier structures 100 as described in any of the above embodiments. The semi-finished product may be configured to be divided into a plurality of individual component carrier structures 100 .

[0097] Although the present application has been described with reference to exemplary embodiments, it should be understood that the present application is not limited to the specific embodiments described and illustrated in detail herein. Those skilled in the art may make various changes to the exemplary embodiments without departing from the scope defined by the claims of the present application.

[0098] The features mentioned and / or illustrated in the above description of the exemplary embodiments of the present application may be incorporated into one or more other embodiments in the same or similar manner, combined with features in other embodiments, or substituted for corresponding features in other embodiments. The technical solutions obtained by such combination or substitution shall also be deemed to be included in the scope of protection of the present application.

Claims

1. A component carrier structure (100), characterized in that The component carrier structure (100) comprises: a stack (102) comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106); and at least one identifier structure (108), at least one of the identifier structures (108) being disposed in the stack (102); The identifier structure (108) comprises a plurality of blind recesses (110) distributed on a surface (112) of at least one layer structure of the stack (102), and the distribution of the plurality of blind recesses (110) on the surface (112) constitutes an optically readable pattern of the identifier structure (108).

2. The component carrier structure (100) according to claim 1, characterized in that A plurality of blind recesses (110) are distributed in an array on the surface (112) to form the optically readable pattern of the identifier structure (108).

3. The component carrier structure (100) according to claim 1 or 2, characterized in that The bottom walls of at least some of the blind recesses (110) in the plurality of blind recesses (110) are defined by the exposed surface of the electrically conductive layer structure (104) or the electrically insulating layer structure (106).

4. The component carrier structure (100) according to claim 1 or 2, characterized in that At least some of the blind recesses (110) in the plurality of blind recesses (110) are defined by: a via hole (116) formed in the electrically conductive layer structure (104) and / or the electrically insulating layer structure (106); and a filling block (118) formed by a filling material filled in the via hole (116); The bottom wall of the blind recess (110) defined by the via hole (116) and the filling block (118) is defined by the top surface of the filling block (118).

5. The component carrier structure (100) according to claim 4, characterized in that The filling material filled in the via hole (116) is different from the material of the stack layer structure.

6. The component carrier structure (100) according to claim 4, characterized in that The blind recesses (110) distributed at the surface (112) of the electrically conductive layer structure (104) are defined by both corresponding vias (116) and electrically conductive blocks filled in the vias (116).

7. The component carrier structure (100) according to claim 6, characterized in that The electrically conductive block is a copper block formed by electroplating copper.

8. The component carrier structure (100) according to claim 1, characterized in that The total surface coverage of the plurality of blind recesses (110) distributed on the surface (112) of each electrically conductive layer structure (104) or each electrically insulating layer structure (106) is smaller than the surface coverage of the corresponding electrically conductive layer structure (104) or electrically insulating layer structure (106).

9. The component carrier structure (100) according to claim 4, characterized in that The vertical extension range of at least some of the filling blocks (118) corresponding to the plurality of blind recesses (110) distributed on the surface (112) of the electrically conductive layer structure (104) or the electrically insulating layer structure (106) is different from the vertical extension range of the electrically conductive layer structure (104) or the electrically insulating layer structure (106).

10. The component carrier structure (100) according to claim 1 or 2, characterized in that The identifier structure (108) comprises a plurality of the blind recesses (110) distributed in a matrix form at the surface (112), wherein the optically readable pattern comprises a matrix-like pattern.

11. The component carrier structure (100) according to claim 1, characterized in that The blind recesses (110) are provided at most partially in a structure area through which a transversely extending line or a longitudinally extending line passing through the identifier structure (108) passes, and a plurality of the blind recesses (110) are distributed at most partially in the structure area to define the optically encoded information of the optically readable pattern.

12. The component carrier structure (100) according to claim 1, characterized in that Two or more identifier structures (108) are provided in the stack (102), and for each stack layer structure provided with the identifier structure (108), the identifier structure (108) of the stack layer structure includes a plurality of blind recesses (110) having a different distribution relative to other identifier structures (108).

13. The component carrier structure (100) according to claim 1, characterized in that Two or more identifier structures (108) are provided in the stack (102), and the plurality of blind recesses (110) included in each identifier structure (108) have the same distribution.

14. The component carrier structure (100) according to claim 1, characterized in that Two or more identifier structures (108) are provided in the stack (102), at least two of the two or more identifier structures (108) having the same optically readable pattern consisting of the same distribution of the plurality of blind recesses (110).

15. The component carrier structure (100) according to claim 1, characterized in that At least one of the at least one identifier structure (108) is located in a verification area (120) at the surface (112), the verification area (120) being positioned in a further area of ​​the component-carrier structure (100) than a functional area.

16. The component carrier structure (100) according to claim 15, characterized in that The surface coverage of the inspection area (120) is greater than the surface coverage of the identifier structure (108).

17. The component carrier structure (100) according to claim 15, characterized in that The inspection area (120) is defined by a frame structure (122) that surrounds at least a portion of the identifier structure (108) and is made of the same material as the laminate layer structure in which it is located.

18. The component carrier structure (100) according to claim 15, characterized in that Two or more identifier structures (108) are provided in the stack (102), and the two or more identifier structures (108) are each located in the inspection region (120) at the surface (112) of the corresponding layer structure.

19. The component carrier structure (100) according to claim 18, characterized in that The two or more identifier structures (108) are located at different depths in the stack (102) and are offset relative to each other but within the boundaries of the inspection area (120).

20. The component carrier structure (100) according to claim 1, characterized in that The identifier structure located in the inner layer structure of the ply stack (102) is not visible from the outside of the component carrier structure (100).

21. The component carrier structure (100) according to claim 1, characterized in that At least some of the blind recesses (110) include inclined sidewalls (124).

22. The component carrier structure (100) according to claim 1, characterized in that The total surface coverage of the plurality of blind recesses (110) distributed at the surface of each of the electrically conductive layer structures (104) or each of the electrically insulating layer structures (106) is smaller than the surface coverage of the corresponding identifier structure (108) including the plurality of blind recesses (110).

23. A semi-finished product, characterized in that: The semi-finished product comprises a plurality of component carrier structures (100) according to any one of claims 1 to 22, and is configured to be divisible into a plurality of individual component carrier structures (100).

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