Schottky diode
By designing a condensed front metal layer and multi-layer material structure in the SiC Schottky diode, the Schottky contact layer acts as a water vapor barrier layer, solving the problem of water vapor penetration caused by the vulnerability of the passivation layer and improving the reliability of the device in high temperature and high humidity environment.
Patent Information
- Application Number
- CN202422217523.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-10
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2034-09-10
AI Technical Summary
In high temperature and high humidity environment, the passivation layer of SiC Schottky diode is easily damaged, and water vapor penetrates into the surface of the semiconductor substrate, causing device failure, affecting the reliability of H3TRB.
The end face of the front metal layer is designed to shrink relative to the end face of the Schottky contact layer, and a passivation layer of inorganic material and a protective layer of organic material are used. The Schottky contact layer serves as a water vapor barrier layer to prevent water vapor penetration.
It improves the H3TRB reliability of Schottky diodes in high temperature and high humidity environments, prevents water vapor from penetrating into the semiconductor substrate, protects the terminal electric field, and improves the moisture resistance of the device.
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Figure CN223286133U_ABST
Abstract
Description
Technical Field
[0001] The embodiment of the utility model relates to the technical field of semiconductor devices, and in particular to a Schottky diode. Background Art
[0002] Schottky diodes, such as silicon carbide (SiC) Schottky diodes, are increasingly used in high-temperature and high-humidity environments. Therefore, tests such as the High Humidity High Temperature Reverse Bias (H3TRB) test are often used to characterize their reliability in these extreme conditions. Compared to silicon (Si), SiC materials have superior properties and are more resistant to extreme operating conditions. Therefore, the focus of SiC Schottky diode reliability has gradually shifted from the semiconductor material itself to the device's passivation, metal contacts, and packaging materials. Currently, SiC Schottky diodes use a stacked passivation layer structure of silicon oxide and silicon nitride to prevent moisture corrosion. However, this passivation layer can sometimes be damaged. For example, under extreme operating conditions, thermal expansion or water vapor intrusion can cause cracks and corrosion in the passivation layer. Water vapor, under the action of high electric fields, can accelerate its entry through these cracks and penetrate the device's semiconductor substrate, such as the surface of the SiC substrate. This disrupts the terminal electric field and ultimately causes device failure.
[0003] Therefore, how to effectively prevent water vapor from penetrating into the surface of the semiconductor substrate to improve the H3TRB reliability of the device is a technical problem that needs to be solved urgently. Utility Model Content
[0004] In view of this, an embodiment of the present invention provides a Schottky diode to improve the H3TRB reliability capability of the device.
[0005] Specifically, an embodiment of the present invention provides a Schottky diode, for example, including:
[0006] a semiconductor substrate having an active region and a peripheral region surrounding the active region;
[0007] a Schottky contact layer, disposed on the active region to form a Schottky contact with the semiconductor substrate and extending from the active region toward the peripheral region;
[0008] a front metal layer, disposed on a side of the Schottky contact layer facing away from the semiconductor substrate and extending from the active area toward the peripheral area, wherein an end surface of the front metal layer is retracted relative to an end surface of the Schottky contact layer;
[0009] a passivation layer disposed on the semiconductor substrate, wherein the passivation layer covers the Schottky contact layer and the front metal layer and exposes at least a portion of the surface of the front metal layer, and the passivation layer is made of an inorganic material; and
[0010] A protective layer is disposed on the semiconductor substrate, wherein the protective layer covers the passivation layer and exposes at least a portion of the surface of the front metal layer.
[0011] The above-mentioned embodiments of the present invention can have the following beneficial effects: through structural design, the end face of the front metal layer is retracted relative to the end face of the Schottky contact layer. The Schottky contact layer here plays the function of a water vapor barrier layer, which can prevent water vapor from penetrating into the surface of the semiconductor substrate even if the corner of the passivation layer is broken due to excessive stress, thereby improving the moisture resistance and reliability capabilities of the Schottky diode such as H3TRB. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The specific implementation of the present invention will be described in detail below with reference to the accompanying drawings.
[0013] Figure 1 The present invention provides a schematic structural diagram of a Schottky diode.
[0014] Figure 2 A schematic structural diagram of another Schottky diode provided in an embodiment of the present utility model.
[0015] Figure 3 for Figure 1 An enlarged schematic diagram of part C of the Schottky diode is shown.
[0016] Figure 4 This is a structural diagram of another Schottky diode provided in an embodiment of the present utility model.
[0017] Figure 5 A schematic structural diagram of a semiconductor substrate obtaining step in a method for manufacturing a Schottky diode provided in an embodiment of the present invention.
[0018] Figure 6 A structural schematic diagram of steps for forming a first injection region, a second injection region, and a third injection region in a method for manufacturing a Schottky diode provided by an embodiment of the present invention.
[0019] Figure 7 A schematic structural diagram of a field oxide layer forming step in a method for manufacturing a Schottky diode provided by an embodiment of the present invention.
[0020] Figures 8A to 8CA schematic structural diagram of a Schottky contact layer forming step in a method for manufacturing a Schottky diode provided by an embodiment of the present invention.
[0021] Figures 9A to 9C A schematic structural diagram of a front metal layer forming step in a method for manufacturing a Schottky diode provided by an embodiment of the present invention.
[0022] Figure 10 A schematic structural diagram of a passivation layer forming step in a method for manufacturing a Schottky diode provided in an embodiment of the present invention.
[0023] [Description of Reference Numerals]
[0024] 10. Schottky diode; 11. Semiconductor substrate; 110. Silicon carbide substrate; 112. Silicon carbide epitaxial layer; 11a. First implantation region; 11b. Second implantation region; 11c. Third implantation region; 11e. Outer surface of the first implantation region; 11f. Inner surface of the first implantation region; 13. Field oxide layer; 13T. Top surface of the field oxide layer; 15. Schottky contact layer; 15e. End face of the Schottky contact layer; 150. Metal material layer; 152. Bottom metal layer; 154. Top metal layer Layer; 15T, surface of Schottky contact layer; 17, front metal layer; 17e, end face of front metal layer; 17T, surface of front metal layer; 170, metal material layer; 18, passivation layer; 181, first stacked transverse segment; 182, first stacked longitudinal segment; 183, second stacked transverse segment; 184, second stacked longitudinal segment; 185, third stacked transverse segment; 19, protective layer; D1, D2, distance; CH, contact hole; PR1, photoresist layer; PR2, photoresist layer. DETAILED DESCRIPTION
[0025] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.
[0026] In order to enable those skilled in the art to better understand the technical solutions of the present invention, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts should fall within the scope of protection of the present invention.
[0027] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way are interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or are inherent to these processes, methods, products or devices.
[0028] It should also be noted that the division of multiple embodiments in the present invention is only for the convenience of description and should not constitute a special limitation. The features in various embodiments can be combined and referenced to each other without contradiction.
[0029] During the H3TRB reliability test, water vapor diffuses uniformly through the plastic encapsulation material and protective layer (e.g., polyimide adhesive) of Schottky diodes, such as SiC Schottky diode devices. The plastic encapsulation material and polyimide (PI) adhesive absorb the water vapor and reach saturation.
[0030] On the one hand, water vapor will be affected by the electric field between the terminal cutting path (where there is a positive voltage) and the front metal layer (where there is a negative voltage) and hydrolyze. Water molecules undergo oxidation reaction at the positive voltage to form a large number of hydrogen ions H + , the chemical equation occurring at positive voltage is (1):
[0031] 2H2O→O 2(g) +4H + +4e - … (1)
[0032] Water molecules are electrolyzed at negative voltage to generate a large amount of hydroxide ions OH - , the chemical equation occurring at negative voltage is (2), thus forming an alkaline environment in the negative voltage region.
[0033]
[0034] On the other hand, the passivation layer of the device is prone to rupture due to high stress at the corners. When the passivation layer ruptures, alkaline water vapor continues to penetrate downward. In the presence of a field oxygen layer, the field oxygen layer is generally composed of silicon dioxide, and the reaction of silicon dioxide and alkali will generate silicate ions. As a result, the passivation layer ruptures and the field oxygen layer also reacts. Eventually, alkaline water vapor can invade the surface of the semiconductor substrate, such as the SiC substrate. The terminal structure here will be destroyed, the electric field will be distorted, and the device will experience increased reverse leakage or short circuit, and the H3TRB reliability of the device will fail. It is understandable that in the absence of a field oxygen layer, when the passivation layer ruptures, alkaline water vapor will directly penetrate downward to the surface of the semiconductor substrate, such as the SiC substrate, causing the terminal structure here to be destroyed and the electric field to be distorted.
[0035] In view of this, the following embodiments of the present invention optimize the metal stacking method in the front electrode, and extend the lower metal layer that forms a Schottky contact with the semiconductor substrate, such as a SiC substrate, outward by a certain distance compared to the upper metal layer. Even if the passivation layer is cracked and moisture penetrates, the lower metal layer also serves as a water vapor barrier layer to prevent water vapor from penetrating to the surface of the semiconductor substrate, such as a SiC substrate, that is, it can prevent water vapor from reacting with the silicon carbide in the injection area, and the terminal electric field is protected, which can greatly improve the H3TRB reliability capability of the device.
[0036] An embodiment of the present invention provides a Schottky diode 10, see Figure 1 and Figure 3 , which includes, for example: a semiconductor substrate 11 , a field oxide layer 13 , a Schottky contact layer 15 , a front metal layer 17 , a passivation layer 18 , and a protective layer 19 .
[0037] The semiconductor substrate 11 includes an active area and a peripheral region surrounding the active area. For example, the peripheral region includes a termination region and a transition region between the termination region and the active area. The transition region includes a first implantation region 11a, and the active area includes a second implantation region 11b. In other words, the semiconductor substrate 11 includes, from the inside out, the active area, the transition region, and the termination region.
[0038] The field oxide layer 13 is disposed on the semiconductor substrate 11 and forms a contact hole CH (refer to Figure 7 to expose the active area.
[0039] The Schottky contact layer 15 is disposed on the active region to form a Schottky contact with the semiconductor substrate 11 and extends from the active region toward the peripheral region. More specifically, the Schottky contact layer 15 is, for example, located within the contact hole CH and extends toward the peripheral region to a side of the field oxide layer 13 facing away from the semiconductor substrate 11, thereby partially overlapping with the field oxide layer 13 to form a field plate structure. For example, the overlapping length of the Schottky contact layer 15 and the field oxide layer 13 is greater than 0 μm and less than or equal to 50 μm.
[0040] The front metal layer 17 is disposed on a side of the Schottky contact layer 15 facing away from the semiconductor substrate 11 and extends from the active area toward the peripheral area. The front metal layer 17 has an end surface 17e (or sidewall) facing the terminal area of the peripheral area, and the Schottky contact layer 15 has an end surface 15e (or sidewall) facing the terminal area. The end surface 17e is indented relative to the end surface 15e, i.e., it has a non-zero distance D1 (D1>0μm).
[0041] The passivation layer 18 is disposed on the semiconductor substrate 11, covering the Schottky contact layer 15 and the front metal layer 17 and exposing at least a portion of the surface 17T of the front metal layer 17 (for example, the upper surface away from the semiconductor substrate 11). Specifically, the entire surface 17T may be exposed, or the central portion of the surface 17T may be exposed. The material of the passivation layer 18 is typically an inorganic material. More specifically, the passivation layer 18 may extend from the surface 13T of the field oxide layer 13 (for example, the upper surface away from the semiconductor substrate 11) toward the active area to the surface 17T of the front metal layer 17. As an example, the thickness of the passivation layer 18 is in the range of 0.8 μm to 1.5 μm, and the lateral width of the passivation layer 18 covering the surface 17T of the front metal layer 17 is in the range of 2 μm to 100 μm.
[0042] The protective layer 19 is disposed on the semiconductor substrate 11, wherein the protective layer 19 covers the passivation layer 18 and exposes at least a portion of the surface 17T of the front metal layer 17. For example, the material of the protective layer 19 is an organic material, such as polyimide, but the present invention is not limited thereto. For example, the thickness of the protective layer 19 ranges from 3.5 μm to 12 μm.
[0043] The present embodiment of the utility model adopts a structural design so that the Schottky contact layer 15, which does not react with water vapor, extends outward by a certain distance relative to the end face 17e of the front metal layer 17. That is, the end face 17e of the front metal layer 17 is retracted relative to the end face 15e of the Schottky contact layer 15. Here, the Schottky contact layer 15 functions as a water vapor barrier layer. Even if the corners of the passivation layer 18 (for example, the passivation layer corresponding to the connection between the end face 17e and the end face 15e) are broken due to excessive stress, it can prevent water vapor from penetrating into the surface of the semiconductor substrate 11, thereby improving the H3TRB and other moisture resistance reliability capabilities of the Schottky diode 10. It is worth mentioning that the Schottky contact layer 15 of this embodiment can also serve as a water vapor barrier layer, thus having multiple functions.
[0044] In some embodiments, see Figure 1 , the Schottky contact layer 15 extends from the active area toward the peripheral area to cover the first injection area 11a. For example, the first injection area 11a has an outer side surface 11e facing the terminal area of the peripheral area and an inner side surface 11f facing the active area. In the lateral direction from the active area to the terminal area, the end surface 15e of the Schottky contact layer 15 is located between the end surface 17e of the front metal layer 17 and the outer side surface 11e of the first injection area 11a. Typically, the end surface 15e of the Schottky contact layer 15 is located directly above the first injection area 11a and is retracted relative to the outer side surface 11e of the first injection area 11a, that is, it has a non-zero distance D2 (D2>0μm).
[0045] In some embodiments, see Figure 1 In the lateral direction from the active area to the terminal area, the distance D1 between the end face 17e of the front metal layer 17 and the end face 15e of the Schottky contact layer 15 is, for example, greater than 1 μm (micrometer) to ensure that the Schottky contact layer 15 extends outward by a sufficiently large distance relative to the end face 17e of the front metal layer 17, thereby more effectively ensuring the water vapor barrier effect of the Schottky contact layer 15 as a water vapor barrier layer.
[0046] In some embodiments, see Figure 1 In the lateral direction from the active area to the terminal area, the distance between the end face 15e of the Schottky contact layer 15 and the outer side face 11e of the first injection area 11a is, for example, greater than 1 μm, so as to more effectively ensure that the end face 15e of the Schottky contact layer 15 is located directly above the first injection area 11a and has a sufficiently large distance from the outer side face 11e of the first injection area 11a, thereby more effectively ensuring that the position design of the end face 15e of the Schottky contact layer 15 does not significantly affect the electric field of the terminal structure.
[0047] In some embodiments, see Figure 1 In the direction from the semiconductor substrate 11 to the Schottky contact layer 15, the thickness of the Schottky contact layer 15 is, for example, greater than 0.1 μm and less than 3 μm, so as to more effectively prevent the Schottky contact layer 15 from breaking, thereby forming a more stable barrier layer that does not react with water vapor in the path of water vapor intrusion.
[0048] In some embodiments, see Figure 1 The thickness of the front metal layer 17 is, for example, greater than 2 μm, and the thickness of the front metal layer 17 is greater than the thickness of the Schottky contact layer 15, so as to serve as a thickened metal layer of the front electrode (including the Schottky contact layer 15 and the front metal layer 17) of the Schottky diode 10. The front metal layer 17 herein may also be referred to as an anode metal layer. By way of example, the front metal layer 17 includes, but is not limited to, any one or a combination of multiple metals such as aluminum (Al), silver (Ag), and copper (Cu), as well as a metal solid solution formed by any one or more metals such as Al, Ag, and Cu and elements such as nitrogen (N) and silicon (Si).
[0049] In some embodiments, see Figure 1 The Schottky contact layer 15 is, for example, a single metal layer that forms a Schottky contact with the semiconductor substrate 11 and also serves as a water vapor barrier. For example, the material of the single metal layer can be one or more of titanium (Ti), titanium nitride (TiN), titanium tungsten alloy (TiW), W, tantalum (Ta), nickel (Ni), etc., which can serve as both a Schottky contact layer and a water vapor barrier. In this embodiment, by designing the Schottky contact layer 15 as a single metal layer, it can simplify the process and reduce costs.
[0050] In some embodiments, see Figure 2The Schottky contact layer 15 is a multi-layer metal layer, for example, including a bottom metal layer 152 adjacent to the semiconductor substrate 11 and a top metal layer 154 away from the semiconductor substrate 11. The bottom metal layer 152 forms a Schottky contact with the semiconductor substrate 11, and the top metal layer 154 serves as a water vapor barrier. As an example, the material of the bottom metal layer is a Schottky metal such as molybdenum (Mo) or Al, which can be one or more of Mo and Al; the top metal layer includes but is not limited to iridium (Ir), Ta, ruthenium (Ru), rhodium (Rh), niobium (Nb), osmium (Os), platinum (Pt), gold (Au), Ti, W, etc., which can be one or more of Ir, Ta, Ru, Rh, Nb, Os, Pt, Au, Ti, and W. In this embodiment, by designing the Schottky contact layer 15 into a multi-layer metal structure, different layers can fully play their respective functions, such as the bottom metal layer serving as a Schottky contact layer and the top metal layer serving as a water vapor barrier layer, and the material selection range of the Schottky contact layer 15 is wider.
[0051] In some embodiments, see Figure 1 The semiconductor substrate 11 is, for example, a SiC substrate, which includes a silicon carbide substrate 110 and a silicon carbide epitaxial layer 112 disposed on the silicon carbide substrate 110. The doping concentration of the silicon carbide epitaxial layer 112 is lower than the doping concentration of the silicon carbide substrate 110. For example, the doping concentration of the silicon carbide substrate 110 is 1E19 to 5E20 / cm 3 , the corresponding silicon carbide substrate 110 is n + SiC substrate; the doping concentration of the silicon carbide epitaxial layer 112 is 5E15-5E16 / cm 3 , the corresponding silicon carbide epitaxial layer 112 is n - The first implantation region 11a and the second implantation region 11b extend from the surface of the silicon carbide epitaxial layer 112 to the silicon carbide substrate 110. The conductivity type of the silicon carbide epitaxial layer 112 (e.g., n - ), which is different from the conductivity type of the silicon carbide substrate 110 (for example, n + ) and has the same conductivity type as the first injection region 11a and the second injection region 11b (for example, p + ) are different.
[0052] In some embodiments, see Figure 1 The silicon carbide substrate has a crystal form of, for example, 4H SiC, and the thickness of the silicon carbide substrate 110 is greater than the thickness of the silicon carbide epitaxial layer 112. For example, the thickness of the silicon carbide substrate 110 is in the range of 250 μm to 350 μm, and the thickness of the silicon carbide epitaxial layer 112 is in the range of 5 μm to 40 μm.
[0053] In some embodiments, see Figure 1 The terminal region of the semiconductor substrate 11 is provided with a third implantation region 11c, the third implantation region 11c extending from the surface of the silicon carbide epitaxial layer 112 toward the silicon carbide substrate 110, the third implantation region 11c, the first implantation region 11a and the second implantation region 11b having the same conductivity type, for example, all of which are p + In this embodiment, the third injection region 11c is added to play the role of a voltage divider and helps to reduce the curvature of the main junction depletion region. Figure 1 As shown in the example, there are multiple third implantation regions 11c, each in a ring shape, there is one first implantation region 11a, each in a ring shape, and there are three second implantation regions 11b, each in a shape including but not limited to a strip, square, hexagonal, or other combination structure. It should be noted that the third implantation region 11c, the first implantation region 11a, and the second implantation region 11b can be formed simultaneously by ion implantation, for example, with an implantation concentration range of 1E17 to 5E18 / cm 3 ; It can also be formed by using different ion implantation concentrations; Therefore, the depth, width, and implantation concentration of the third implantation region 11c, the first implantation region 11a, and the second implantation region 11b can be designed using existing mature technologies and are not specifically limited here. In addition, it is worth mentioning that the size of the transition region can be determined by Figure 1 The outer side surface 11e and the inner side surface 11f of the continuous first injection region 11a shown in the figure are jointly defined, and accordingly, the size of the active region can be defined by the inner side surface 11f of the first injection region 11a; in other embodiments, when the first injection region 11a in the transition region includes multiple discontinuous sub-regions, the transition region can be jointly defined by the inner side surface of the innermost sub-region and the outer side surface of the outermost sub-region, and accordingly, the size of the active region can be defined by the inner side surface of the innermost sub-region.
[0054] In some embodiments, see Figure 1 and Figure 3The passivation layer 18 extends from the surface 13T of the field oxide layer 13 toward the active area to the surface 17T of the front metal layer 17. For example, it is a multilayer stacked structure composed of multiple different inorganic material layers, and includes a first stacked transverse segment 181, a first stacked longitudinal segment 182, a second stacked transverse segment 183, a second stacked longitudinal segment 184, and a third stacked transverse segment 185 in sequence. The first stacked transverse segment 181 contacts and covers the surface 13T of the field oxide layer 13. The first stacked longitudinal segment 182 connects the first stacked transverse segment 181 and the second stacked transverse segment 183 and contacts and covers the end surface 15e of the Schottky contact layer 15. The second stacked transverse segment 183 contacts and covers the surface 15T of the Schottky contact layer 15. The second stacked longitudinal segment 184 connects the second stacked transverse segment 183 and the third stacked transverse segment 185 and contacts and covers the end surface 17e of the front metal layer 17. The third stacked transverse segment 185 contacts and covers the surface 17T of the front metal layer 17. For example, the passivation layer 18 having a multi-layer stack structure can be a stack structure of silicon oxide and silicon nitride or silicon oxynitride. It is understood that in some practical applications, the passivation layer 18 can also be a single inorganic material layer, such as a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer. However, the passivation layer 18 having a multi-layer stack structure has better structural performance and water vapor resistance.
[0055] See also Figure 4 Another embodiment of the present invention provides a Schottky diode, which Figure 1 The structures of the Schottky diodes 10 shown are basically the same, and the main differences are: Figure 4 The Schottky diode shown is not provided with a field oxide layer. Accordingly, the passivation layer extends from the surface of the terminal region of the semiconductor substrate 11 toward the active region to the surface 17T of the front metal layer 17 and exposes at least a portion of the surface 17T of the front metal layer 17.
[0056] Another embodiment of the present invention provides a method for manufacturing a Schottky diode. Figures 5 to 10 , which for example includes the following steps.
[0057] First, see Figure 5 , obtaining a semiconductor substrate 11, wherein the semiconductor substrate 11 includes, for example, a silicon carbide substrate 110 and a silicon carbide epitaxial layer 112 formed on the silicon carbide substrate 110, wherein the crystal form of the silicon carbide substrate 110 is, for example, 4H SiC, and the thickness of the silicon carbide substrate 110 is, for example, in the range of 250 μm to 350 μm, and the doping concentration is, for example, in the range of 1E19 to 5E20 / cm 3The thickness of the silicon carbide epitaxial layer 112 is, for example, in the range of 5 μm to 40 μm, and the doping concentration is, for example, in the range of 5E15 to 5E16 / cm 3 That is, the thickness of the silicon carbide substrate 110 is greater than the thickness of the silicon carbide epitaxial layer 112 , and the doping concentration of the silicon carbide substrate 110 is greater than the doping concentration of the silicon carbide epitaxial layer 112 .
[0058] Next, see Figure 6 ion implantation is performed from the surface of the silicon carbide epitaxial layer 112 to the silicon carbide substrate 110, so as to configure a first implantation region 11a in the transition region of the SiC epitaxial layer 112 of the semiconductor substrate 11, a second implantation region 11b in the active region, and a third implantation region 11c in the terminal region; wherein the first implantation region 11a, the second implantation region 11b and the third implantation region 11c have the same conductivity type (for example, p-type, which can be p-type). + ), and the conductivity type of the silicon carbide substrate and the silicon carbide epitaxial layer (for example, n type, which can be n + 、n - ) are different; the first injection region 11a, the second injection region 11b and the third injection region 11c have, for example, the same injection depth and injection concentration (eg, 1E17 ~ 5E18 / cm 3 ); As for the process parameters of ion implantation, it can adopt existing mature technology, so it will not be described here. In addition, for example, Figure 6 As an example, there are multiple third implantation regions 11c, each of which is annular in shape; there is one first implantation region 11a, each of which is annular in shape; and there are three second implantation regions 11b, each of which may have shapes including, but not limited to, stripes, squares, hexagons, or other combinations. It should be noted that the third implantation region 11c, the first implantation region 11a, and the second implantation region 11b can be formed simultaneously through ion implantation or separately using different ion implantation concentrations. Therefore, the depth, width, and implantation concentration of the third implantation region 11c, the first implantation region 11a, and the second implantation region 11b can be flexibly designed based on specific circumstances and are not specifically limited herein.
[0059] Then, see Figure 7 A field oxide layer 13 having a contact hole CH is formed on the silicon carbide epitaxial layer 112, wherein the contact hole CH exposes the active area. Specifically, a material layer (such as a silicon dioxide layer) having a thickness in the range of 0.6 μm to 1.2 μm can be first deposited on the upper surface of the silicon carbide epitaxial layer 112 by chemical vapor deposition (CVD), and then the field oxide layer 13 can be formed by a wet etching process. However, the embodiments of the present invention are not limited to this. For example, the field oxide layer 13 can also be a multi-layer stacked structure of a thermal oxide layer and a CVD-deposited oxide layer.
[0060] Next, see Figures 8A to 8C A Schottky contact layer 15 is formed on the active region to form a Schottky contact with the semiconductor substrate 11, and the Schottky contact layer 15 extends from the active region toward the transition region. Typically, the Schottky contact layer 15 is located within the contact hole CH and extends toward the transition region to a side of the field oxide layer 13 facing away from the silicon carbide epitaxial layer 112, thereby partially overlapping the field oxide layer 13 to form a field plate structure.
[0061] Specifically, a metal material layer 150 (eg, a silicon carbide epitaxial layer 112) is formed on the surface of the silicon carbide epitaxial layer 112 by a sputtering process or an evaporation process. Figure 8A As shown, the metal material layer 150 can be composed of one or two layers. A single layer can be composed of one or more of Ti, TiN, TiW, W, Ta, and Ni, which can serve as both a Schottky contact layer and a water vapor barrier. Two metal layers can be composed of a bottom layer of a Schottky metal such as Mo or Al and a water vapor barrier layer. Metals include, but are not limited to, Ir, Ta, Ru, Rh, Nb, Os, Pt, Au, Ti, and W.
[0062] Then, a photoresist material is coated on the metal material layer 150. The thickness of the formed photoresist material layer is, for example, in the range of 2 μm to 6 μm. By adjusting the exposure range, a photoresist layer PR1 (eg, Figure 8B shown).
[0063] Then, for example, by dry etching, the metal material layer 150 is etched and the photoresist layer PR1 is removed; Figure 8C As shown, the end face 15e of the Schottky contact layer 15 formed after etching is placed on the plane of the field oxide layer 13. For example, the overlapping length of the Schottky contact layer 15 and the field oxide layer 13 is greater than 0 μm and less than or equal to 50 μm. Figure 8C It can be seen that the end surface 15e of the Schottky contact layer 15 is located directly above the first injection region 11a and is retracted relative to the outer side surface 11e of the first injection region 11a, forming a non-zero distance D2 therebetween.
[0064] Afterwards, see Figures 9A to 9C A front metal layer 17 is formed on the side of the Schottky contact layer 15 away from the silicon carbide epitaxial layer 112, and the front metal layer 17 extends from the active area toward the transition area; wherein the end surface 17e of the front metal layer 17 is retracted relative to the end surface 15e of the Schottky contact layer 15.
[0065] Specifically, a metal material layer 170 (eg, a metal layer 170) is formed on the surface of the Schottky contact layer 15 and the surface of the field oxide layer 13 by a sputtering process or an evaporation process. Figure 9AAs shown), the metal material layer 170 includes but is not limited to any one or a combination of multiple metals such as Al, Ag, Cu, and a metal solid solution formed by any one or multiple metals such as Al, Ag, Cu and elements such as N and Si.
[0066] Then, a photoresist material is coated on the metal material layer 170. The thickness of the formed photoresist material layer is, for example, in the range of 2 μm to 6 μm. By adjusting the exposure range, a photoresist layer PR2 (eg, Figure 9B shown).
[0067] Then, for example, by dry etching, the metal material layer 170 is etched and the photoresist layer PR2 is removed; Figure 9C As shown, the end surface 17e of the front metal layer 17 formed after etching is retracted relative to the end surface 15e of the Schottky contact layer 15, forming a non-zero distance D1 therebetween.
[0068] Next, see Figure 10 A passivation layer 18 is formed on the silicon carbide epitaxial layer 112, wherein the passivation layer 18 extends from the surface of the field oxide layer 13 toward the active area to the surface 17T of the front metal layer 17 to cover the end face 15e of the Schottky contact layer 15 and the end face 17e of the front metal layer 17 and expose at least a portion of the surface 17T of the front metal layer 17. Specifically, the passivation layer 18 can be formed by CVD deposition combined with a photolithography process, and can be deposited using any one or more dielectric stacks such as silicon oxide, silicon nitride, and silicon oxynitride. The thickness range is, for example, 0.8 μm to 1.5 μm, and the lateral width of the passivation layer 18 covering the surface 17T of the front metal layer 17 ranges from, for example, 2 μm to 100 μm.
[0069] Then, a protective layer 19 is formed on the silicon carbide epitaxial layer 112, wherein the protective layer 19 covers the passivation layer 18 and exposes at least a portion of the surface 17T of the front metal layer 17. Figure 1 The Schottky diode 10 is shown. Specifically, polyimide can be spin-coated on the passivation layer 18, and then exposed and baked to form the protection layer 19, wherein the thickness of the protection layer 19 is, for example, in the range of 3.5 μm to 12 μm.
[0070] In addition, for Figure 4 The manufacturing method of the Schottky diode shown without a field oxide layer can refer to the aforementioned manufacturing method, except that the step of forming the field oxide layer is omitted, so it will not be repeated here.
[0071] In addition, it is worth mentioning that for the Schottky diode 10, those skilled in the art will understand that a back electrode is usually formed on the back side of the semiconductor substrate 11 (for example, the side of the silicon carbide substrate 110 away from the silicon carbide epitaxial layer 112). The back electrode here, for example, includes a cathode metal layer and an ohmic contact layer located between the semiconductor substrate 11 and the cathode metal layer. The ohmic contact layer is formed, for example, by electron beam evaporation or sputtering deposition of nickel metal and then annealing. The cathode metal layer is, for example, a TiNiAg metal layer formed by deposition, but the embodiments of the present invention are not limited to this.
[0072] The above description is merely a preferred embodiment of the present invention and does not constitute any form of limitation to the present invention. Although the present invention has been disclosed as a preferred embodiment, it is not intended to limit the present invention. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments of the technical content disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.
Claims
1. A Schottky diode, characterized in that: include: a semiconductor substrate having an active region and a peripheral region surrounding the active region; a Schottky contact layer, disposed on the active region to form a Schottky contact with the semiconductor substrate and extending from the active region toward the peripheral region; a front metal layer, disposed on a side of the Schottky contact layer facing away from the semiconductor substrate and extending from the active area toward the peripheral area, wherein an end surface of the front metal layer is retracted relative to an end surface of the Schottky contact layer; a passivation layer, disposed on the semiconductor substrate, wherein the passivation layer covers the Schottky contact layer and the front metal layer and exposes at least a portion of the surface of the front metal layer, and the material of the passivation layer is an inorganic material; as well as A protective layer is disposed on the semiconductor substrate, wherein the protective layer covers the passivation layer and exposes at least a portion of the surface of the front metal layer.
2. The Schottky diode according to claim 1, wherein: The peripheral region includes a terminal region and a transition region between the terminal region and the active region, the transition region is configured with a first implant region, and the Schottky contact layer extends from the active region toward the peripheral region to cover the first implant region.
3. The Schottky diode according to claim 2, wherein: The first injection region has an outer side surface facing the terminal region, the end surface of the Schottky contact layer faces the terminal region, and the end surface of the front metal layer faces the terminal region. In the lateral direction from the active region to the terminal region, the end surface of the Schottky contact layer is located between the end surface of the front metal layer and the outer side surface of the first injection region.
4. The Schottky diode according to claim 3, characterized in that: In the lateral direction, a distance between an end surface of the Schottky contact layer and an end surface of the front metal layer is greater than 1 micron.
5. The Schottky diode according to claim 3, characterized in that: In the lateral direction, a distance between an end surface of the Schottky contact layer and an outer side surface of the first injection region is greater than 1 micron.
6. The Schottky diode according to claim 1, wherein: In a direction from the semiconductor substrate to the Schottky contact layer, the thickness of the Schottky contact layer is greater than 0.1 micrometers and less than 3 micrometers.
7. The Schottky diode according to claim 6, characterized in that: The thickness of the front metal layer is greater than 2 micrometers, and the thickness of the front metal layer is greater than the thickness of the Schottky contact layer.
8. The Schottky diode according to claim 1, wherein: The Schottky contact layer is a single metal layer, which forms a Schottky contact with the semiconductor substrate and also serves as a water vapor barrier layer.
9. The Schottky diode according to claim 1, wherein: The Schottky contact layer is a multi-layer metal layer, wherein the bottom metal layer adjacent to the semiconductor substrate forms a Schottky contact with the semiconductor substrate, and the top metal layer away from the semiconductor substrate serves as a water vapor barrier layer.
10. The Schottky diode according to claim 2, characterized in that: The semiconductor substrate includes a silicon carbide substrate and a silicon carbide epitaxial layer arranged on the silicon carbide substrate, the doping concentration of the silicon carbide epitaxial layer is lower than the doping concentration of the silicon carbide substrate, the active area is configured with a second injection region, the second injection region extends from the surface of the silicon carbide epitaxial layer toward the silicon carbide substrate, the terminal area is configured with a third injection region, the third injection region extends from the surface of the silicon carbide epitaxial layer toward the silicon carbide substrate, the conductivity type of the silicon carbide epitaxial layer is the same as the conductivity type of the silicon carbide substrate, and is different from the conductivity type of the first injection region, the second injection region, and the third injection region.
11. The Schottky diode according to any one of claims 1 to 10, characterized in that: The present invention also includes a field oxide layer, which is arranged on the semiconductor substrate and forms a contact hole to expose the active area. The Schottky contact layer is located in the contact hole and extends toward the peripheral area to the side of the field oxide layer away from the semiconductor substrate to partially overlap with the field oxide layer. The passivation layer extends from the surface of the field oxide layer toward the active area to the surface of the front metal layer.
12. The Schottky diode according to claim 11, characterized in that: The passivation layer is a multilayer stacked structure composed of multiple different inorganic material layers, and includes a first stacked transverse segment, a first stacked longitudinal segment, a second stacked transverse segment, a second stacked longitudinal segment, and a third stacked transverse segment in sequence. The first stacked transverse segment contacts and covers the surface of the field oxide layer, the first stacked longitudinal segment connects the first stacked transverse segment and the second stacked transverse segment and contacts and covers the end face of the Schottky contact layer, the second stacked transverse segment contacts and covers the surface of the Schottky contact layer facing away from the semiconductor substrate, the second stacked longitudinal segment connects the second stacked transverse segment and the third stacked transverse segment and contacts and covers the end face of the front metal layer, and the third stacked transverse segment contacts and covers the surface of the front metal layer facing away from the semiconductor substrate.