Forward-mounted LED chip

Abstract

The utility model relates to the field of semiconductor photoelectric devices, and particularly discloses a normal LED chip, which comprises a substrate, and a bonding layer, a metal layer, an insulating layer, a P-type semiconductor layer, an active layer, an N-type semiconductor layer and an N electrode which are sequentially laminated on the substrate, the P-type semiconductor layer comprises a first preset area and a second preset area, the first preset area is provided with a first through hole etched to the metal layer, a P electrode is arranged in the first through hole, and the P electrode is electrically connected with the metal layer; a plurality of protrusions protruding towards the direction of the substrate are distributed in the second preset area in an array mode, second through holes penetrating through the insulating layer are formed in the tops of the protrusions, and the metal layer is electrically connected with the P-type semiconductor layer through the second through holes. According to the utility model, the current distribution uniformity can be improved, and the luminous efficiency can be improved.

Description

Technical Field

[0001] The utility model relates to the field of semiconductor photoelectric devices, in particular to a positive-mounted LED chip. Background Art

[0002] Uneven current density distribution in the active area not only leads to uneven luminous intensity distribution but also causes localized overheating on the chip, reducing LED chip reliability. Therefore, suppressing current concentration in LED chips is a key research topic in this field. For upright LED chips, since the P and N electrodes are located on the same side of the substrate, the current has a certain lateral spread as it flows from the P electrode to the N electrode, which exacerbates the uneven current distribution within the chip.

[0003] One commonly used method is to increase the thickness of the P-type contact layer, typically to 8-12μm. However, an excessively thick P-type contact layer absorbs light, reducing light extraction efficiency. Another common method is to introduce a transparent conductive layer between the P-electrode and the P-type contact layer. However, the high refractive index of the transparent conductive layer hinders light extraction efficiency. Another approach involves placing current spreading strips around the P-electrode. However, these strips occupy the light-emitting area, reducing luminous efficiency and increasing costs. Utility Model Content

[0004] The technical problem to be solved by the present invention is to provide a front-mounted LED chip, which can improve the current expansion uniformity and enhance the luminous efficiency.

[0005] In order to solve the above technical problems, the utility model provides a front-mounted LED chip, which includes a substrate, a bonding layer, a metal layer, an insulating layer, a P-type semiconductor layer, an active layer, an N-type semiconductor layer and an N-electrode stacked in sequence on the substrate.

[0006] The P-type semiconductor layer includes a first preset area and a second preset area, the first preset area is provided with a first through hole etched to the metal layer, a P electrode is provided in the first through hole, and the P electrode is electrically connected to the metal layer;

[0007] A plurality of protrusions protruding toward the substrate are arranged in an array in the second preset area. A second through hole penetrating the insulating layer is provided on the top of the protrusion. The metal layer is electrically connected to the P-type semiconductor layer through the second through hole.

[0008] As an improvement of the above technical solution, the refractive index of the insulating layer is smaller than the refractive index of the P-type semiconductor layer.

[0009] As an improvement of the above technical solution, the insulating layer is one or more of a SiO2 layer, a MgF2 layer, a TiO2 layer, and a Ti2O5 layer, and its thickness is 0.2 μm to 4 μm; and / or

[0010] The metal layer is one or more of an Au layer, an Ag layer, and an Al layer, and has a thickness of 0.5 μm to 10 μm; and / or

[0011] The protrusions are in the shape of a truncated cone, an ellipsoidal crown or a prism, the height of the protrusions is 0.5 μm to 5 μm, and the distance between adjacent protrusions is 0.5 μm to 10 μm.

[0012] As an improvement to the above technical solution, the insulating layer is a SiO2 layer with a thickness of 0.3 μm to 1 μm; and / or

[0013] The metal layer is an Au layer, and its thickness is 0.8 μm to 2 μm; and / or

[0014] The protrusions are truncated cone-shaped, the height of the protrusions is 0.5 μm to 1.8 μm, and the distance between adjacent protrusions is 0.5 μm to 3 μm.

[0015] As an improvement of the above technical solution, the P-type semiconductor layer includes a P-type contact layer and a P-type confinement layer sequentially stacked on the insulating layer;

[0016] The thickness of the P-type contact layer is ≤5 μm, and the doping concentration is ≥1×10 18 cm -3 .

[0017] As an improvement of the above technical solution, the thickness of the P-type contact layer is 2 μm to 4 μm, and its doping concentration is 2×10 18 cm -3 ~5×10 20 cm -3 .

[0018] As an improvement of the above technical solution, the doping concentration of the P-type contact layer increases from the side close to the active layer to the side close to the insulating layer.

[0019] As an improvement of the above technical solution, the height of the protrusion is less than or equal to 50% of the thickness of the P-type contact layer.

[0020] As an improvement of the above technical solution, the height of the protrusion is 20% to 35% of the thickness of the P-type contact layer.

[0021] As an improvement of the above technical solution, the N-type semiconductor layer includes an N-type confinement layer, an N-type roughening layer and an N-type contact layer sequentially stacked on the active layer;

[0022] The N-electrode includes an electrode body and a current spreading bar, and the N-type contact layer is provided below the current spreading bar and wrapped by the current spreading bar;

[0023] The surface of the N-type roughened layer presents a roughened structure.

[0024] The implementation of this utility model has the following beneficial effects:

[0025] 1. In an upright LED chip in one embodiment of the present invention, the P-type semiconductor layer includes a first preset area and a second preset area. The first preset area is provided with a first through hole etched into the metal layer, and a P electrode is provided in the first through hole, and the P electrode is electrically connected to the metal layer. The second preset area is provided with a plurality of protrusions protruding toward the substrate in an array, and a second through hole is provided on the top of the protrusion that penetrates the insulating layer, and the metal layer is electrically connected to the P-type semiconductor layer through the second through hole. Based on the above technical solution, the current from the P electrode is first injected into the metal layer, transmitted through the metal layer, and then distributed to various parts of the P-type semiconductor layer through the second through holes distributed in the array, which greatly improves the uniformity of the current distribution. At the same time, based on the above structure, the thickness of the P-type semiconductor layer can be greatly reduced, the light absorption of the P-type semiconductor layer can be reduced, the luminous efficiency of the upright LED chip can be improved, and the production cost can be reduced.

[0026] 2. The insulating layer in one embodiment of the present invention is constructed from a material with a lower refractive index than the P-type semiconductor layer. This material, combined with the metal layer, forms a reflector structure, improving light reflection efficiency. Furthermore, because the insulating layer is disposed on the raised surface, the reflective area of ​​the micromirrors is significantly increased, the reflection angle is altered, and light reflectivity is increased, thereby improving light extraction efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a schematic structural diagram of a front-mounted LED chip in one embodiment of the present invention;

[0028] Figure 2 yes Figure 1 A partial enlarged view of area A in the middle;

[0029] Figure 3 This is a schematic top view of the structure of a mounted LED chip in one embodiment of the present invention;

[0030] In the figure, 1 is a substrate, 2 is a bonding layer, 3 is a metal layer, 4 is an insulating layer, 41 is a second through hole, 5 is a P-type semiconductor layer, 51 is a first preset area, 52 is a second preset area, 53 is a first through hole, 54 is a protrusion, 55 is a P-type contact layer, 56 is a P-type confinement layer, 6 is an active layer, 7 is an N-type semiconductor layer, 71 is an N-type confinement layer, 72 is an N-type roughening layer, 73 is an N-type contact layer, 8 is an N-electrode, 81 is an electrode body, 82 is a current spreading bar, 9 is a P-electrode, and 10 is a passivation layer DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below.

[0032] This embodiment provides a face-up LED chip, comprising a substrate 1, a bonding layer 2, a metal layer 3, an insulating layer 4, a P-type semiconductor layer 5, an active layer 6, an N-type semiconductor layer 7, and an N-electrode 8, stacked sequentially on the substrate 1. The P-type semiconductor layer 5 includes a first predetermined region 51 and a second predetermined region 52. The first predetermined region 51 is provided with a first through-hole 53 etched into the metal layer 3. A P-electrode 9 is disposed within the first through-hole 53 and electrically connected to the metal layer 3. The second predetermined region 52 is provided with an array of protrusions 54 extending toward the substrate 1. The tops of the protrusions 54 are provided with second through-holes 41 penetrating the insulating layer 4. The metal layer 3 is electrically connected to the P-type semiconductor layer 5 via the second through-holes 41. Based on the above technical solution, current from the P-electrode 9 is first injected into the metal layer 3, transmitted through the metal layer 3, and then distributed throughout the P-type semiconductor layer 5 via the array of second through-holes 41, significantly improving the uniformity of current distribution. At the same time, based on the above structure, the thickness of the P-type semiconductor layer 5 can be greatly reduced, the light absorption of the P-type semiconductor layer 5 can be reduced, the luminous efficiency of the upright LED chip can be improved, and the production cost can be reduced.

[0033] The substrate 1 may be a sapphire substrate, a silicon substrate or a silicon carbide substrate, but is not limited thereto, and is preferably a sapphire substrate.

[0034] Depending on the bonding process, different types of bonding layers 2 can be selected. For example, when using a eutectic bonding process, Au, Cu, In, Pb, or Sn layers can be used, but are not limited to these. For another example, when using a thermocompression bonding process, Au, Cu, Ag, or Al layers can be used as bonding layer 4, but are not limited to these. The thickness of bonding layer 2 is 300 nm to 800 nm.

[0035] Among them, the upright LED chip can be a red, green, yellow or purple LED chip. Based on the control of the emission wavelength, different types of semiconductor layers and active layers can be selected. For example, in one embodiment, when the LED chip is a blue LED chip or a green LED chip, the N-type semiconductor layer 7 can be an N-type GaN layer, the active layer 6 can be an InGaN-GaN type multi-quantum well layer, and the P-type semiconductor layer 5 can be a P-type GaN layer and a P-type InGaN layer, but is not limited to this. In another embodiment, when the LED chip is a purple LED chip, the N-type semiconductor layer 7 can be an N-type AlGaN layer, the active layer 6 can be an AlGaN-AlGaN type multi-quantum well layer, and the P-type semiconductor layer 5 can be a P-type AlGaN layer and a P-type GaN layer, but is not limited to this. In another embodiment, the LED chip is a red light LED chip, the N-type semiconductor layer 7 can be an N-type GaInP layer, an N-type GaAs layer and / or an N-type AlGaInP layer, the active layer 6 is an AlGaInP-AlGaInP type multi-quantum well layer, and the P-type semiconductor layer 5 is a P-type AlGaInP layer and / or a P-type GaP layer, but is not limited thereto.

[0036] In this embodiment, the insulating layer 4 is mainly a dielectric layer that does not conduct current, so as to achieve current injection into different parts of the P-type semiconductor layer 5 through its blocking, thereby optimizing the current distribution. For example, the insulating layer 4 can be a SiO2 layer, a MgF2 layer, a TiO2 layer, a Ti2O5 layer, a SiN x The metal layer 3 is mainly used for conducting electricity and can be one or more of an Au layer, an Ag layer, an Al layer, and a Cr layer, but is not limited thereto.

[0037] Preferably, in one embodiment, the refractive index of the insulating layer 4 is controlled to be less than that of the P-type semiconductor layer 5. Based on this structure, the light emitted through the substrate 1 can be reduced, thereby improving the light extraction efficiency. To implement this technical solution, the insulating layer 4 in this embodiment is one or more of a SiO2 layer, a MgF2 layer, a TiO2 layer, and a Ti2O5 layer, with a thickness of 0.2μm to 4μm. More preferably, the insulating layer 4 is a SiO2 layer with a thickness of 0.3μm to 1μm, which not only improves the light extraction efficiency but also forms a good passivation on the surface of the protrusion 54 of the P-type semiconductor layer 5, reducing leakage.

[0038] Preferably, in one embodiment, the metal layer 3 is one or more of an Au layer, an Ag layer, and an Al layer, but is not limited thereto. These metal layers 3 can be compounded with the insulating layer 4 to form an ODR reflective structure, further improving the light extraction efficiency. More preferably, the metal layer 3 is an Au layer, which has better adhesion and a reflectivity close to that of Ag, thereby improving the luminous efficiency; and the Au layer can form a good ohmic contact with the protrusion 54, further improving the uniformity of the current distribution. Specifically, the thickness of the metal layer 3 is 0.5μm to 10μm. The thickness of the metal layer in this embodiment is greater than the height of the protrusion 54 to fill the grooves between the protrusions 54 and improve the reliability of the LED chip. More preferably, the thickness of the metal layer 3 is 0.8μm to 2μm

[0039] Among them, the protrusion 54 has a morphology of a small top and a large bottom, and its side has an inclined surface, a curved surface or a spherical surface, which can effectively increase the reflection area, change the reflection angle, and improve the light extraction efficiency. Preferably, the protrusion 54 is in the shape of a truncated cone, an ellipsoidal crown or a prism, but is not limited thereto. More preferably, it is in the shape of a truncated cone. The height of the protrusion 54 should be less than the thickness of the P-type semiconductor layer 5 to prevent damage to the active layer 6. Specifically, the distance between adjacent protrusions 54 is 0.5μm to 10μm. Based on this distance, the uniformity of the current distribution and the light extraction efficiency can be better improved. Preferably, it is 0.5μm to 3μm.

[0040] The height of the protrusion 54 should be less than 40% of the thickness of the P-type semiconductor layer 5. Specifically, the height of the protrusion 54 is 0.5 μm to 5 μm, more preferably 0.5 μm to 1.8 μm.

[0041] Preferably, in one embodiment, the P-type semiconductor layer 5 includes a P-type contact layer 55 and a P-type confinement layer 56 sequentially stacked on the insulating layer 4; wherein the P-type contact layer 55 can be a highly doped P-type GaN layer, a P-type InGaN layer, or a P-type GaP layer, but is not limited thereto. The P-type confinement layer 56 can be an AlGaN layer, an InAlGaN layer, or an AlGaInP layer, but is not limited thereto. The doping concentration of the P-type contact layer 55 is ≥1×10 18 cm -3 , and its thickness is ≤5μm. It should be noted that in conventional upright LED chips, the larger the size of the LED chip, the more uneven the current expansion. Common solutions are to prepare P-electrode 9 extension strips or to increase the thickness of the P-type contact layer 55, which can usually reach 8μm to 12μm. However, the present invention distributes the current through the metal layer 3, so there is no need to prepare P-electrode 9 extension strips, and the thickness of the P-type contact layer 55 can also be reduced, reducing its light absorption, improving light extraction efficiency, and reducing production costs. More preferably, the thickness of the P-type contact layer 55 is 2μm to 4μm, and its doping concentration is 2×10 18 cm -3 ~5×1020 cm -3 .

[0042] Preferably, in one embodiment, the doping concentration of the P-type contact layer 55 increases gradually from the side closest to the active layer 6 to the side closest to the insulating layer 4, i.e., the doping concentration of the surface layer is greater than the doping concentration of the bottom layer. Based on this doping concentration control, firstly, the highly doped P-type contact layer 55 is retained in the subsequent second predetermined region 52, improving the ohmic contact with the metal layer 3; secondly, the lower doping concentration of the bottom layer reduces defects, reduces light absorption, and improves light extraction efficiency.

[0043] Preferably, in one embodiment, the height of protrusion 54 is less than or equal to 50% of the thickness of P-type contact layer 55. Since protrusion 54 is formed by etching, controlling its height can prevent excessive etching from damaging active layer 6, thereby preventing loss of effective light-emitting area and reducing the adverse effects of etching on the current spreading function of P-type contact layer 55. More preferably, the height of protrusion 54 is 20% to 35% of the thickness of P-type contact layer 55.

[0044] The N-electrode 8 and the P-electrode 9 each have a single-layer structure or a stacked-layer structure commonly used by those skilled in the art. For example, they may be one or more of, but not limited to, a Cr layer, an Al layer, a Pt layer, an Au layer, an AuBe composite layer, or an AuZn composite layer. The N-electrode 8 and the P-electrode 9 may have, but are not limited to, a prismatic or cylindrical shape. Preferably, in one embodiment, the N-electrode 8 includes an electrode body 81 and a current spreading bar 82. This structure of the N-electrode 8 further optimizes current distribution.

[0045] Preferably, in one embodiment, the N-type semiconductor layer 7 includes an N-type confinement layer 71, an N-type roughening layer 72, and an N-type contact layer 73 sequentially stacked on the active layer 6; the N-type contact layer 73 is disposed below and surrounded by the current spreading bar 82; the combination of the N-type contact layer 73 and the current spreading bar 82 can further improve the uniformity of the current distribution. Specifically, the N-type confinement layer 71 can be an N-type AlGaInP layer, the N-type roughening layer 72 can be an N-type AlGaInP layer, and the N-type contact layer 73 can be an N-type GaAs layer, but are not limited thereto.

[0046] Preferably, in order to further improve the light extraction efficiency, a roughened structure is formed on the surface of the N-type roughened layer 72. Preferably, in one embodiment, the front-mounted LED chip further includes a passivation layer 10.

[0047] In summary, in the upright LED chip of this embodiment, the P-type semiconductor layer includes a first preset area and a second preset area. The first preset area is provided with a first through-hole etched into the metal layer, and a P electrode is provided in the first through-hole, and the P electrode is electrically connected to the metal layer. The second preset area is provided with a plurality of protrusions protruding toward the substrate in an array, and a second through-hole is provided on the top of the protrusion that penetrates the insulating layer, and the metal layer is electrically connected to the P-type semiconductor layer through the second through-hole. Based on the above technical solution, the current from the P electrode is first injected into the metal layer, transmitted through the metal layer, and then distributed to various parts of the P-type semiconductor layer through the second through-holes distributed in the array, which greatly improves the uniformity of the current distribution. At the same time, based on the above structure, the thickness of the P-type semiconductor layer can be greatly reduced, the light absorption of the P-type semiconductor layer can be reduced, the luminous efficiency of the upright LED chip can be improved, and the production cost can be reduced.

[0048] The above is a preferred embodiment of the utility model. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the utility model. These improvements and modifications are also considered to be within the scope of protection of the utility model.

Claims

1. A front-mounted LED chip, characterized in that: It includes a substrate, a bonding layer, a metal layer, an insulating layer, a P-type semiconductor layer, an active layer, an N-type semiconductor layer and an N-electrode stacked in sequence on the substrate; The P-type semiconductor layer includes a first preset area and a second preset area, the first preset area is provided with a first through hole etched to the metal layer, a P electrode is provided in the first through hole, and the P electrode is electrically connected to the metal layer; A plurality of protrusions protruding toward the substrate are arranged in an array in the second preset area. A second through hole penetrating the insulating layer is provided on the top of the protrusion. The metal layer is electrically connected to the P-type semiconductor layer through the second through hole.

2. The upright LED chip according to claim 1, wherein: The refractive index of the insulating layer is smaller than the refractive index of the P-type semiconductor layer.

3. The upright LED chip according to claim 1, wherein: The insulating layer is one of a SiO2 layer, a MgF2 layer, a TiO2 layer, and a Ti2O5 layer, and has a thickness of 0.2 μm to 4 μm; and / or The metal layer is one of an Au layer, an Ag layer, and an Al layer, and has a thickness of 0.5 μm to 10 μm; and / or The protrusions are in the shape of a truncated cone, an ellipsoidal crown or a prism, the height of the protrusions is 0.5 μm to 5 μm, and the distance between adjacent protrusions is 0.5 μm to 10 μm.

4. The upright LED chip according to claim 1 or 3, wherein: The insulating layer is a SiO2 layer with a thickness of 0.3 μm to 1 μm; and / or The metal layer is an Au layer, and its thickness is 0.8 μm to 2 μm; and / or The protrusions are truncated cone-shaped, the height of the protrusions is 0.5 μm to 1.8 μm, and the distance between adjacent protrusions is 0.5 μm to 3 μm.

5. The upright LED chip according to claim 1, wherein: The P-type semiconductor layer includes a P-type contact layer and a P-type confinement layer sequentially stacked on the insulating layer; The thickness of the P-type contact layer is ≤5 μm.

6. The upright LED chip according to claim 5, wherein: The thickness of the P-type contact layer is 2 μm to 4 μm.

7. The upright LED chip according to claim 5, wherein: The height of the protrusion is less than or equal to 50% of the thickness of the P-type contact layer.

8. The upright LED chip according to claim 5, wherein: The height of the protrusion is 20% to 35% of the thickness of the P-type contact layer.

9. The upright LED chip according to claim 1, wherein: The N-type semiconductor layer includes an N-type confinement layer, an N-type roughening layer and an N-type contact layer sequentially stacked on the active layer; The N-electrode includes an electrode body and a current spreading bar, and the N-type contact layer is provided below the current spreading bar and wrapped by the current spreading bar; The surface of the N-type roughened layer presents a roughened structure.

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