Multi-channel ADC (Analog to Digital Converter) simultaneous testing device and system

Through the multi-channel ADC test device, the combination of microcontroller and DAC modules is used to solve the problem of ATE testing one device in a single time, and the efficient and low-cost testing of multiple devices is achieved.

CN223297586UActive Publication Date: 2025-09-02HUICHUN TECH (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202422596261.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-10-25
Publication Date
2025-09-02
Estimated Expiration
2034-10-25

AI Technical Summary

Technical Problem

Existing automated testing equipment (ATE) can only test one device under test containing an ADC in a single time, and the large-scale test takes a long time and is costly, making it impossible to achieve large-scale rapid testing.

Method used

A multi-channel ADC simultaneous testing device is designed, including a microcontroller module and multiple DAC modules. The microcontroller module receives test instructions and sends them to the DAC module. The DAC module converts the test parameters into voltage signals and inputs them into the device under test, realizing static and dynamic testing of multiple devices under test.

Benefits of technology

The simultaneous testing of multiple devices under test is realized, which reduces costs and increases test speed. It is suitable for mass production and has a lower cost than using multiple ATEs.

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Abstract

The utility model relates to the technical field of ADC testing, and discloses a multi-channel ADC simultaneous testing device and system, and the device comprises a microcontroller module and a plurality of DAC modules. The DAC modules are respectively used for correspondingly connecting different tested devices; the microcontroller module is used for receiving multiple groups of test instructions; each group of test instructions comprises chip selection signals and test parameters; the microcontroller module is also used for sending the test parameters to the corresponding DAC module according to the chip selection signal of each group of test instructions; each DAC module is used for obtaining a voltage signal according to a test parameter when the test parameter is received; the voltage signal is used for being input to a tested device connected with the DAC module so as to perform static test and / or dynamic test on an ADC in the tested device. According to the invention, the ADC performance of a plurality of tested devices can be tested at the same time.
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Description

Technical Field

[0001] The present application relates to the field of ADC testing technology, and in particular to a multi-channel ADC simultaneous testing device and system. Background Art

[0002] The continuous advancement of digital signal processing and communication technologies has placed increasingly stringent demands on the performance of analog-to-digital converters (ADCs). Simultaneously, various manufacturers' microcontroller units (MCUs) are integrating ADCs. Testing ADC performance provides valuable data for R&D and design optimization.

[0003] Most existing solutions use automated test equipment (ATE) to test ADCs. Each piece of ATE can only test a single device under test (DUT), which includes an ADC. Testing a single DUT with an ADC takes a long time, especially when testing large quantities of devices. Furthermore, the high cost of the ATE makes it difficult to purchase large quantities to speed up testing. Utility Model Content

[0004] In view of this, the embodiments of the present application provide a multi-channel ADC simultaneous testing device and system, which can effectively solve the problem that ATE can only test one device under test at a time and the testing time for multiple devices under test is long.

[0005] In a first aspect, an embodiment of the present application provides a multi-channel ADC simultaneous testing device, comprising a microcontroller module and a plurality of DAC modules; each of the DAC modules is respectively configured to be connected to a corresponding device under test;

[0006] The microcontroller module is used to receive multiple groups of test instructions; each group of test instructions includes a chip select signal and test parameters;

[0007] The microcontroller module is further configured to send the test parameters to the corresponding DAC module according to the chip select signal of each group of the test instructions;

[0008] Each of the DAC modules is used to obtain a voltage signal according to the test parameters when receiving the test parameters; the voltage signal is used to input into the device under test connected to the DAC module to perform static testing and / or dynamic testing on the ADC in the device under test.

[0009] In some embodiments, the microcontroller module includes a microcontroller, the microcontroller supports a USB interface, and the USB interface is used to connect to a host computer to receive the test instruction.

[0010] In some embodiments, the number of the DAC modules is at most 5.

[0011] In some embodiments, the microcontroller module includes an SPI interface, and the microcontroller module is connected to the plurality of DAC modules via the SPI interface.

[0012] In some embodiments, the test parameters include the number of bits of resolution, input voltage range, and operating voltage of the ADC of the device under test.

[0013] In some embodiments, each of the DAC modules includes a digital input interface, and the DAC module is used to receive corresponding test parameters through the digital input interface based on a packet header protocol; the packet header protocol and the chip select signal corresponding to the test parameter have a one-to-one correspondence.

[0014] In a second aspect, an embodiment of the present application provides a multi-channel ADC simultaneous measurement system, comprising a host computer and the multi-channel ADC simultaneous measurement device described above; the host computer is communicatively connected to the multi-channel ADC simultaneous measurement device;

[0015] The host computer is used to set different test parameters for different devices under test, and form a set of test instructions with the test parameters and chip selection signals of the same device under test;

[0016] The host computer sends each set of test instructions to the multi-channel ADC simultaneous testing device, and the multi-channel ADC simultaneous testing device is used to generate different voltage signals according to different test instructions; and input the different voltage signals into the ADC in the device under test connected to the DAC module for static testing and / or dynamic testing.

[0017] In some embodiments, the host computer is connected to the multi-channel ADC simultaneous testing device via a USB interface or a network port; the test instruction is used to be transmitted to the microcontroller module of the multi-channel ADC simultaneous testing device via the USB interface or the network port.

[0018] In some embodiments, the host computer is further configured to obtain digital signals output by the device under test and analyze the digital signals to determine whether static parameters and / or dynamic parameters of the ADC in each device under test are qualified.

[0019] In some embodiments, different devices under test are connected to the host computer via a communication interface; the types of the communication interface include SPI interface, I 2C interface and UART interface.

[0020] The embodiments of the present application have the following beneficial effects:

[0021] The multi-channel ADC simultaneous testing device of the present application includes multiple DAC modules, each of which is connected to a different device under test (DUT). This allows simultaneous ADC performance testing of multiple DUTs using a microcontroller module and multiple DAC modules within the multi-channel ADC simultaneous testing device. Furthermore, the multi-channel ADC simultaneous testing device is inexpensive and can be mass-produced, thereby improving the testing speed of large quantities of ADCs or DUTs containing ADCs. Furthermore, compared to existing methods that use multiple ATEs to simultaneously test multiple ADCs, this significantly reduces costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 A schematic diagram of the structure of a multi-channel ADC simultaneous measurement device according to an embodiment of the present application is shown;

[0024] Figure 2 A schematic diagram of the structure of a multi-channel ADC simultaneous measurement system according to an embodiment of the present application is shown;

[0025] Figure 3 A schematic diagram of a workflow of a multi-channel ADC simultaneous measurement system according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0027] The components of the embodiments of the present application generally described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed application, but rather merely represents selected embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort are within the scope of protection of the present application.

[0028] Hereinafter, the terms "including", "having" and their cognates used in various embodiments of the present application are intended only to indicate specific features, numbers, steps, operations, elements, components or combinations of the aforementioned items, and should not be understood as excluding the existence of one or more other features, numbers, steps, operations, elements, components or combinations of the aforementioned items or adding the possibility of one or more features, numbers, steps, operations, elements, components or combinations of the aforementioned items. In addition, the terms "first", "second", "third" and the like are only used to distinguish descriptions and should not be understood as indicating or implying relative importance.

[0029] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the art to which the various embodiments of the present application belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meaning as in the context of the relevant technical field and will not be interpreted as having an idealized meaning or an overly formal meaning unless clearly defined in the various embodiments of the present application.

[0030] The following describes some embodiments of the present application in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments may be combined with each other.

[0031] Currently, when performing performance testing on the analog-to-digital converter (ADC) of a microcontroller unit (MCU), only one device under test (DUT) can be tested using one automated test equipment (ATE), and testing a large number of DUTs one by one takes a long time. This application proposes a multi-channel ADC simultaneous testing device and system that can test multiple devices under test (DUTs) simultaneously, thereby speeding up the testing of large quantities of ADCs. The DUT can be the ADC of the MCU or a device that includes an ADC, such as the ADC1220, MAX813, TLV5580, etc.

[0032] The multi-channel ADC simultaneous measurement device is described below with reference to some specific embodiments.

[0033] Figure 1A schematic diagram of the structure of a multi-channel ADC simultaneous testing device according to an embodiment of the present application is shown. Exemplarily, the multi-channel ADC simultaneous testing device 10 includes a microcontroller module 11 and multiple DAC (Digital-to-Analog Converter) modules 12. The output of the microcontroller module 11 is connected to each DAC module 12. Each DAC module 12 is connected to a corresponding device under test. The voltage signal output by each DAC module 12 is used to perform static and / or dynamic testing on the ADC in the device under test.

[0034] Among them, the microcontroller module 11 receives multiple groups of test instructions; each group of test instructions includes a chip select signal and test parameters; the microcontroller module 11 sends the test parameters to the corresponding DAC module 12 according to the chip select signal of each group of test instructions; when each DAC module 12 receives the test parameters, it performs digital-to-analog conversion on the test parameters to obtain a voltage signal; the voltage signal of each DAC module 12 is used to input into the device under test connected to the DAC module 12, so as to perform static testing and / or dynamic testing on the ADC in the device under test DUT.

[0035] In this embodiment, a multi-channel ADC simultaneous testing device 10 includes multiple DAC modules 12, and different DAC modules 12 are connected to different devices under test in a one-to-one correspondence; thereby, ADC performance testing of multiple devices under test can be performed simultaneously through a microcontroller module and multiple DAC modules in a multi-channel ADC simultaneous testing device.

[0036] During static testing, the ADC's static parameters include zero-point error, full-scale error, differential nonlinearity, and integral nonlinearity. Alternatively, static parameters may include gain error, minimum significant bit value, and offset.

[0037] During dynamic testing, the ADC's dynamic parameters include effective number of bits, signal-to-noise ratio, and total harmonic distortion. As other implementation methods, dynamic parameters also include signal-to-noise harmonic ratio, intermodulation distortion, dynamic range, etc.

[0038] In the embodiments of this application, whether performing dynamic or static testing on a device under test, the relevant parameters of the device under test must be set in advance. Specifically, the relevant parameters of the device under test are set based on the test parameters received by the microcontroller module. The test parameters include the number of bits of resolution, input voltage range, and operating voltage. Furthermore, the test parameters are saved to facilitate subsequent repeated testing of the same batch of devices under test.

[0039] In this embodiment, each DAC module includes a digital input interface, and the DAC module is used to receive corresponding test parameters through the digital input interface based on the packet header protocol; the packet header protocol of the DAC module and the chip select signal corresponding to the test parameter have a one-to-one correspondence. Therefore, the DAC module to be controlled can be accurately identified through the chip select signal, and the test parameters in the test instruction can be accurately input into the DAC module to be controlled.

[0040] In this embodiment, the microcontroller module 11 further includes an SPI interface, and the microcontroller module 11 is connected to multiple DAC modules 12 via the SPI interface; wherein, there are a maximum of 5 DAC modules, and the number of DAC modules is limited by the area that can be accommodated in the multi-channel ADC simultaneous measurement device.

[0041] In some embodiments, the microcontroller module includes a microcontroller that supports a USB interface. The microcontroller module is connected to a host computer via the microcontroller's USB interface and receives test instructions from the host computer. The microcontroller uses an STM32 chip, exemplarily an STM32F405 chip model that enables high-speed SPI communication. The DAC module uses a 20 high-precision DAC1220 and achieves a ±10V output voltage through peripheral components. This embodiment merely exemplifies the optional models of the microcontroller and DAC module, and the specific choice of model is not limited, as long as it can meet high-speed transmission requirements. It is understood that the microcontroller module communicates serially with each DAC module via its SPI interface to ensure the transmission rate from the microcontroller module to the DAC module.

[0042] In some embodiments, the microcontroller module first implements parameter settings for each DAC module based on test parameters, namely, the different output voltages of the DAC module and the intervals between different output voltages. The voltage signal obtained through the digital-to-analog conversion processing of the DAC module is actually the output voltage of the DAC module. It can also be understood that the output voltage of the DAC module is actually the input voltage of the device under test, and the input voltage of the ADC in the device under test ranges from 0V to the maximum input voltage. Each DAC module is connected to the device under test via coaxial cable transmission, that is, the voltage signals of different DAC modules are transmitted to the corresponding device under test (DUT) via coaxial cable. The DAC module is connected to the device under test (DUT) via SMA coaxial cable, ensuring the stability of the output voltage and enhancing anti-interference capabilities.

[0043] The device under test (DUT) of the multi-channel ADC simultaneous test device receives the voltage signal and performs ADC conversion processing to obtain a digital signal. The digital signal is transmitted through SPI, I 2 C. UART and other communication methods output, based on data analysis of the digital signal, to determine whether the static parameters of the ADC static test and / or the dynamic parameters of the dynamic test of the device under test are qualified.

[0044] Figure 2 FIG2 shows a schematic diagram of a structure of a multi-channel ADC simultaneous measurement system according to an embodiment of the present application.

[0045] The host computer 30 sets different test parameters according to the test items of different devices under test, and forms a set of test instructions for each device under test with the test parameters and chip select signals of the same device under test; the host computer sends each set of test instructions to the multi-channel ADC simultaneous testing device 10, and the multi-channel ADC simultaneous testing device 10 generates different voltage signals according to different test instructions; and inputs the different voltage signals into the ADC in the device under test connected to the DAC module 12 for static testing and / or dynamic testing.

[0046] The test items of this application include static test and dynamic test; specifically, the static parameters of ADC and the dynamic parameters of ADC can be tested. Therefore, the working process of the multi-channel ADC simultaneous test system is as follows: Figure 3 Shown, including:

[0047] S100: The host computer transmits the test instruction to the microcontroller module of the multi-channel ADC simultaneous testing device through the USB interface or the network port.

[0048] S200: The microcontroller module sends the test parameters to the corresponding DAC module according to the chip selection signal of each group of test instructions.

[0049] S300 , each DAC module is used to receive a test parameter and perform digital-to-analog conversion on the test parameter to obtain a voltage signal.

[0050] S400: The device under test receives a voltage signal and performs analog-to-digital conversion on the voltage signal to obtain a digital signal.

[0051] S500, the device under test transmits digital signals through the SPI interface, I 2 C interface or UART interface to transmit to the host computer.

[0052] S600: The host computer uses MATLAB to analyze the digital signal to determine whether the static parameters and / or dynamic parameters of the ADC in each device under test are qualified.

[0053] The present application uses a multi-channel ADC simultaneous testing system to simultaneously test multiple devices under test (DUTs), thereby saving testing time. Compared with automatic test equipment (ATE), the multi-channel ADC simultaneous testing device of the present application includes a microcontroller module and multiple DAC modules, which are relatively low in cost and easy to produce. At the same time, the multi-channel ADC simultaneous testing system of the present application is easily scalable through a USB or network port, enabling a host computer to connect to multiple multi-channel ADC test devices at the same time, thereby enabling more ADCs to be tested simultaneously.

[0054] It can be understood that the options in the above embodiment are also applicable to this embodiment, so they will not be described again here.

[0055] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architectures, functions and operations of the devices, methods and computer program products according to the multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the module, program segment or a part of the code contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or flowchart, and the combination of boxes in the structure diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or can be implemented using a combination of dedicated hardware and computer instructions.

[0056] In addition, the functional modules or units in the various embodiments of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0057] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which can be a smart phone, personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application.

[0058] The above is only a specific implementation method of the present application, but the scope of protection of the present application is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in this application, which should be covered by the scope of protection of the present application.

Claims

1. A multi-channel ADC simultaneous measurement device, characterized in that: It includes a microcontroller module and multiple DAC modules; each of the DAC modules is used to connect to a different device under test; The microcontroller module is used to receive multiple groups of test instructions; each group of test instructions includes a chip select signal and test parameters; The microcontroller module is further configured to send the test parameters to the corresponding DAC module according to the chip select signal of each group of the test instructions; Each of the DAC modules is used to obtain a voltage signal according to the test parameters when receiving the test parameters; the voltage signal is used to input into the device under test connected to the DAC module to perform static testing and / or dynamic testing on the ADC in the device under test.

2. The multi-channel ADC simultaneous measurement device according to claim 1, characterized in that: The microcontroller module includes a microcontroller, and the microcontroller supports a USB interface, and the USB interface is used to connect to a host computer to receive the test instruction.

3. The multi-channel ADC simultaneous measurement device according to claim 1, wherein: The number of the DAC modules is at most 5.

4. The multi-channel ADC simultaneous measurement device according to claim 1, wherein: The microcontroller module includes an SPI interface, and the microcontroller module is connected to multiple DAC modules via multiple SPI interfaces.

5. The multi-channel ADC simultaneous measurement device according to claim 4, characterized in that: The test parameters include the number of bits of resolution of the ADC of the device under test, the input voltage range and the operating voltage.

6. The multi-channel ADC simultaneous measurement device according to claim 1, wherein: Each of the DAC modules includes a digital input interface, and the DAC module is used to receive corresponding test parameters through the digital input interface based on a packet header protocol; the packet header protocol and the chip select signal corresponding to the test parameter have a one-to-one correspondence.

7. A multi-channel ADC simultaneous measurement system, characterized in that: The device comprises a host computer and a multi-channel ADC simultaneous measurement device according to any one of claims 1 to 6; the host computer is communicatively connected to the multi-channel ADC simultaneous measurement device; The host computer is used to set different test parameters for different devices under test, and form a set of test instructions with the test parameters and chip selection signals of the same device under test; The host computer sends each set of test instructions to the multi-channel ADC simultaneous testing device, and the multi-channel ADC simultaneous testing device is used to generate different voltage signals according to different test instructions; and input the different voltage signals into the ADC in the device under test connected to the DAC module for static testing and / or dynamic testing.

8. The multi-channel ADC simultaneous measurement system according to claim 7, characterized in that: The host computer is connected to the multi-channel ADC simultaneous testing device via a USB interface or a network port; the test instruction is used to be transmitted to the microcontroller module of the multi-channel ADC simultaneous testing device via the USB interface or the network port.

9. The multi-channel ADC simultaneous measurement system according to claim 7, characterized in that: The host computer is further configured to obtain digital signals output by the devices under test and analyze the digital signals to determine whether static parameters and / or dynamic parameters of the ADC in each of the devices under test are qualified.

10. The multi-channel ADC simultaneous measurement system according to claim 9, characterized in that: Different devices under test are connected to the host computer via a communication interface; the types of the communication interface include SPI interface, I 2 C interface and UART interface.