Chip packaging structure

Abstract

According to the chip packaging structure provided by the invention, a plurality of frame outer pins of a frame type flip chip are arranged at intervals, so that the total area of the outer pins of the flip chip after improvement is relatively large, and the heat dissipation performance is obviously improved.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular to a chip packaging structure. Background Art

[0002] Flip-chip bonding technology currently holds a significant market share in the industry, offering significant advantages in current handling and miniaturization. However, compared to traditional wire-bonded products, frame-type flip-chips lack a heat sink, resulting in poor heat dissipation. This solution, developed using frame-type flip-chip bonding technology, utilizes a new packaging structure to enhance the heat dissipation capabilities of flip-chips. Summary of the Invention

[0003] In order to solve or alleviate the problem in the prior art that the back of the frame-type flip chip has no heat sink, resulting in poor heat dissipation capacity of the chip, the technical solution of the present application is proposed.

[0004] The present application provides a chip packaging structure, including a chip body;

[0005] A plastic package is provided on the upper surface and side surfaces of the chip; metal columns are provided at intervals on the back surface of the chip body, a conductive layer is provided on one end of the metal columns away from the back surface of the chip body, and inner-frame pins are provided on the side surfaces of the conductive layer away from the metal columns, and the inner-frame pins are connected to a plurality of outer-frame pins provided at intervals.

[0006] As a preferred embodiment of the present application, the metal pillar is a copper pillar.

[0007] As a preferred embodiment of the present application, the conductive layer is a solder ball.

[0008] Compared with the prior art, the present application provides a chip packaging structure. By setting the frame external pins of the frame-type flip chip to multiple and spaced apart, the total area of ​​the external pins of the improved flip chip is larger and the heat dissipation performance is significantly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation of the present application. Some specific embodiments of the present application will be described in detail in an illustrative and non-restrictive manner with reference to the drawings. The same reference numerals in the drawings indicate the same or similar components or parts. It should be understood by those skilled in the art that these drawings are not necessarily drawn to scale. In the drawings:

[0010] Figure 1 is a schematic cross-sectional view of a chip packaging structure provided by an embodiment of the present application; DETAILED DESCRIPTION

[0011] In order to enable those skilled in the art to better understand the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of this application.

[0012] like Figure 1 As shown, the present application provides a chip packaging structure, including a chip body 2;

[0013] A plastic package 1 is provided on the upper surface and side surfaces of the chip body 2; metal pillars 5 are provided at intervals on the back surface of the chip body 2, a conductive layer 4 is provided on one end of the metal pillars 5 away from the back surface of the chip body 2, and inner-frame pins 3 are provided on the side surfaces of the conductive layer 4 away from the metal pillars 5, and the inner-frame pins 3 are connected to a plurality of outer-frame pins 5 provided at intervals.

[0014] As a preferred embodiment of the present application, the metal pillar 5 is a copper pillar.

[0015] As a preferred embodiment of the present application, the conductive layer 4 is a solder ball.

[0016] The present application provides a chip packaging structure, which provides a plurality of external pins of a frame-type flip chip and arranges them at intervals. After improvement, the total area of ​​the external pins of the flip chip is larger, and the heat dissipation performance is significantly improved.

[0017] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A chip packaging structure, characterized in that: It includes a chip body, and a plastic package is provided on the upper surface and side surfaces of the chip; The back of the chip body is provided with spaced metal columns, the metal columns are provided with a conductive layer at one end away from the back of the chip body, the side of the conductive layer away from the metal columns is provided with frame inner pins, and the frame inner pins are connected to multiple spaced outer frame pins.

2. The chip packaging structure according to claim 1, wherein: The metal pillar is a copper pillar.

3. The chip packaging structure according to claim 1, wherein: The conductive layer is a solder ball.

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