Circuit board structure for improving welding yield of IC (integrated circuit) device

Abstract

The utility model discloses a circuit board structure for improving IC device welding yield, comprising an empty network pad and a signal connection pad which are arranged on a circuit board, the empty network pad and the signal connection pad are both connected with pins of an IC device, a first wire is led out from the empty network pad, and a second wire is led out from the signal connection pad. The signal connection bonding pad leads out a signal connection line, the first wire is parallel to the lead-out section of the adjacent signal connection line, and the length of the first wire is consistent with that of the lead-out section of the adjacent signal connection line. According to the utility model, through improving the connection mode of the empty network bonding pad of the IC device, the empty network bonding pad leads out the wire, so that the heat dissipation of the empty network bonding pad and the signal connection pad is uniform as much as possible, and the problem of poor welding caused by non-uniform heat dissipation of the empty network bonding pad when the IC device is soldered can be solved; and therefore, the welding yield of the IC device can be improved.

Description

Technical Field

[0001] The utility model relates to the field of circuit boards, and more particularly to a circuit board structure for improving the soldering yield of IC devices. Background Art

[0002] Printed circuit boards (PCBs), also known as printed circuit boards, are a crucial component of electronic products, both physically supporting them and transmitting signals. With the continuous advancement of electronic technology, product iterations are rapidly evolving, and automated and intelligent products are becoming increasingly popular. People are demanding more and more functional features from electronic products, and IC devices are a crucial component of these products.

[0003] In PCB design, IC components are typically designed with pads that have both empty nets and pads with net signals (empty net pads are pads on the component board that have no net signals assigned to them and will not generate any signal connections). Pads with net signals will have traces drawn out for processing and soldering, while pads with empty nets will not have traces drawn out.

[0004] During soldering, pads with network signals have better heat dissipation due to their routing. Pads without network signals solder more slowly than those with network signals, resulting in inconsistent heat dissipation. This differential heat dissipation across IC device pads can lead to uneven heating of the pads and their surroundings, generating thermal stress. Prolonged or significant thermal stress differentials can cause the device pads to warp or deform. This warping can cause IC components to become unsoldered, leading to poor soldering. This, in turn, reduces yield and increases production costs. Utility Model Content

[0005] In order to overcome the problem that when existing IC devices are soldered, the pads with network signals and the pads without network signals have inconsistent heat dissipation, and the heat dissipation difference will cause the pads and their surroundings to be heated unevenly, thereby causing the IC device pads to warp, the utility model provides a circuit board structure that improves the soldering yield of IC devices.

[0006] The technical solution of this utility model is as follows:

[0007] A circuit board structure for improving the soldering yield of IC devices includes an empty network pad and a signal connection pad arranged on the circuit board, wherein the empty network pad and the signal connection pad are both connected to the pins of the IC device, the empty network pad leads to a first routing line, and the signal connection pad leads to a signal connection line, the first routing line is parallel to the lead-out section of the adjacent signal connection line, and the first routing line and the lead-out section of the adjacent signal connection line are consistent in length.

[0008] According to the above solution of the present invention, the empty network pad and the signal connection pad are both square pads.

[0009] According to the above solution of the present invention, the routing direction of the signal connection line is away from the direction where the IC device is located.

[0010] According to the above solution of the present invention, the routing direction of the first wiring is the same as and / or opposite to the routing direction of the signal connection line.

[0011] According to the above solution of the present invention, the width of the first trace is not greater than the width of the empty network pad.

[0012] According to the above solution of the present invention, the first trace is led out from the center of the empty network pad.

[0013] According to the above solution of the present invention, the width of the first trace is 0.15 mm.

[0014] According to the above solution of the present invention, the width of the first trace is 0.3 mm.

[0015] According to the above solution of the present invention, the length of the first trace exceeding the edge of the empty network pad is not less than 0.3 mm.

[0016] According to the above solution of the present invention, the length of the first trace exceeding the edge of the empty network pad is 0.1 mm.

[0017] The beneficial effect of the present invention according to the above scheme is that the present invention improves the connection method of the empty network pads of the IC device, so that the empty network pads are led out to the wiring, so that the heat dissipation of the empty network pads and the signal connection pads is as uniform as possible, which can solve the problem of poor welding of IC devices due to uneven heat dissipation of the empty network pads during soldering, and thus can improve the yield rate of IC device welding.

[0018] The first trace is parallel to the signal connection line and has the same length, and can share a similar thermal path. It can not only disperse the thermal stress generated during the welding process and avoid the formation of stress concentration points in specific areas, thereby reducing the risk of pad warping and poor welding due to local overheating, but the parallel layout of the first trace and the signal connection line can also reduce signal reflection, crosstalk and other problems caused by improper trace layout, helping to maintain the continuity and consistency of the signal path on the entire circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a schematic structural diagram of an embodiment of the present utility model;

[0020] Figure 2This is a structural diagram of another embodiment of the present invention.

[0021] In the drawings, the reference numerals are as follows:

[0022] 1. Circuit board; 10. Empty network pad; 11. First trace; 20. Signal connection pad; 21. Signal connection line; 211. Lead-out section; 22. Signal via; 30. IC device. DETAILED DESCRIPTION

[0023] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments.

[0024] It should be noted that the terms "including" and "having," as well as any variations thereof, in the specification and claims of the present invention are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to the process, method, product, or device. Terms such as "disposed" should be interpreted broadly, for example, and may refer to fixed connections, detachable connections, or integration; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, internal connections between two elements, or interactions between two elements, unless otherwise expressly defined. Terms such as "upper," "lower," "left," "right," "front," "back," and "bottom" indicate directions or positions based on those shown in the accompanying drawings. These are for ease of description only and should not be construed as limitations on the present invention.

[0025] It's important to note that during soldering, pads with network signals have better heat dissipation due to their routing. Pads without network signals solder more slowly than those with network signals, resulting in inconsistent heat dissipation. This differential heat dissipation across IC device pads can lead to uneven heating of the pads and their surroundings, generating thermal stress. Prolonged or significant thermal stress differentials can cause the device pads to warp or deform. This warping can cause IC components to become unsoldered, leading to poor soldering, which in turn reduces yield and increases production costs.

[0026] like Figure 1-Figure 2 As shown, a circuit board structure for improving the soldering yield rate of IC devices is shown. By improving the connection method of the empty network pads 10 of the IC device 30, the empty network pads 10 are led out to the wiring, so that the heat dissipation of the empty network pads 10 and the signal connection pads is as uniform as possible. This can solve the problem of poor soldering caused by uneven heat dissipation of the empty network pads 10 during soldering of the IC device 30, thereby improving the soldering yield rate of the IC device 30.

[0027] Specifically, it includes an empty network pad 10 and a signal connection pad 20 provided on the circuit board 1. Both the empty network pad 10 and the signal connection pad 20 are connected to the pins of the IC device 30. The empty network pad 10 leads to a first trace 11, and the signal connection pad 20 leads to a signal connection line 21. The first trace 11 is parallel to the lead-out section 211 of the adjacent signal connection line 21, and the first trace 11 and the lead-out section 211 of the adjacent signal connection line 21 are the same length. The parallel trace layout helps to reduce the temperature gradient on the surface of the circuit board 1, and heat can be spread more evenly along the traces. The first trace 11 is parallel to the signal connection line 21 and has the same length, and can share a similar thermal path, dispersing the thermal stress generated during the welding process, avoiding the formation of stress concentration points in specific areas, thereby reducing the risk of pad warping and poor welding due to local overheating.

[0028] The parallel layout of the first trace 11 and the signal connection line 21 can reduce signal reflection, crosstalk and other problems caused by improper trace layout, and help maintain the continuity and consistency of the signal path on the entire circuit board 1.

[0029] Furthermore, during the initial design phase of the test board, some signals from the IC device 30 were initially disconnected. Once the test board is manufactured, testing requirements may necessitate additional connection testing for some of the IC device 30 signals (the initial version contained only empty network signals). This typically necessitates further board revisions, incurring additional workload. This time-consuming process requires re-manufacturing the board after redesigning the design.

[0030] A trace is led out from the empty network pad 10 of the IC device 30. A trace already exists on the surface of the test board. A jumper wire can be used directly on the test board to connect the board for signal testing without the need for additional board redesign and reproduction.

[0031] The other end of the signal connection line 21 is connected to the signal via 22 to transmit the signal.

[0032] The empty network pads 10 and signal connection pads 20 on the IC device 30 are all arranged around the IC device 30. The empty network pads 10 are parallel to the adjacent empty network pads 10 and signal connection pads 20, and the signal connection pads 20 are parallel to the adjacent empty network pads 10 and signal connection pads 20.

[0033] In one embodiment, both the empty network pad 10 and the signal connection pad 20 are square pads. Square pads are simple in design and easy to layout. Preferably, the empty network pad 10 and the signal connection pad 20 are rectangular pads. Rectangular pads help to better disperse and conduct heat during the welding process, reducing thermal stress concentration.

[0034] In one embodiment, the routing direction of the signal connection line 21 is away from the direction where the IC device 30 is located, which can effectively reduce the interference between various signals and improve the clarity and stability of signal transmission.

[0035] In one embodiment, the number of traces of the empty network pad 10 can be two, wherein the routing direction of one first trace 11 is the same as the routing direction of the signal connection line 21, and the routing direction of the other first trace 11 is opposite to the routing direction of the signal connection line 21. The number of traces of the empty network pad 10 is one. The routing direction of the first trace 11 is the same as or opposite to the routing direction of the signal connection line 21. The routing layout in the same direction helps to keep the traces on the circuit board 1 neat and uniform, reducing crossing and interference; while the routing layout in the opposite direction can balance the arrangement of the signal connection line 21 to a certain extent, thereby improving the yield rate of the soldering of the IC device 30.

[0036] In one embodiment, the first trace 11 is led out from the center of the empty network pad 10 to ensure that the first trace 11 can evenly disperse the heat on the empty network pad 10 when it is led out, and avoid excessive thermal stress concentration at the edge of the pad. The width of the first trace 11 is not greater than the width of the empty network pad 10 to ensure that the first trace 11 does not take up too much space when it is led out, thereby affecting the layout of other components or the routing of signal lines. Preferably, the width of the first trace 11 is 0.15mm. A trace with a width of 0.15mm can minimize the space occupied by the circuit board 1 while ensuring electrical performance, thereby improving layout efficiency. Preferably, the width of the first trace 11 is 0.3mm. A trace width of 0.3mm provides better mechanical strength and thermal stability, can resist thermal stress and mechanical stress during welding to a certain extent, and reduce poor welding problems caused by trace breakage or pad detachment.

[0037] In one embodiment, the length of the first trace 11 extending beyond the edge of the empty network pad 10 is no less than 0.3 mm. During the soldering process, solder may deviate from its ideal position due to thermal expansion or flow. The longer extension provides a buffer zone, reducing solder misalignment caused by solder misalignment, such as open circuits or short circuits.

[0038] In one embodiment, the first trace 11 extends beyond the edge of the empty network pad 10 by 0.1 mm. Given limited space on the circuit board 1, limiting the extension to 0.1 mm maximizes space utilization while ensuring heat dissipation and minimizing interference with other components or traces. This is particularly important for high-density circuit board 1 designs.

[0039] It should be understood that those skilled in the art can make improvements or changes based on the above description, and all such improvements and changes should fall within the scope of protection of the claims attached to this utility model.

[0040] The above is an exemplary description of the present utility model patent in conjunction with the accompanying drawings. It is obvious that the implementation of the present utility model patent is not limited to the above-mentioned method. As long as various improvements are made using the method concept and technical solution of the present utility model patent, or the concept and technical solution of the present utility model patent are directly applied to other occasions without improvement, they are all within the scope of protection of the present utility model.

Claims

1. A circuit board structure for improving the soldering yield of IC devices, characterized in that: It includes an empty network pad and a signal connection pad arranged on a circuit board, wherein the empty network pad and the signal connection pad are both connected to the pins of the IC device, the empty network pad leads to a first routing line, and the signal connection pad leads to a signal connection line, the first routing line is parallel to the lead-out section of the adjacent signal connection line, and the first routing line and the lead-out section of the adjacent signal connection line are consistent in length.

2. A circuit board structure for improving the soldering yield of IC devices according to claim 1, characterized in that: The empty network pads and the signal connection pads are both square pads.

3. A circuit board structure for improving the soldering yield of IC devices according to claim 1 or 2, characterized in that: The routing direction of the signal connection line is away from the direction where the IC device is located.

4. A circuit board structure for improving the soldering yield of IC devices according to claim 3, characterized in that: The routing direction of the first routing line is the same as and / or opposite to the routing direction of the signal connection line.

5. A circuit board structure for improving the soldering yield of IC devices according to claim 1, 2 or 4, characterized in that: The first trace is led out from the center of the empty network pad.

6. The circuit board structure for improving the soldering yield of IC devices according to claim 5, characterized in that: The width of the first trace is no greater than the width of the empty network pad.

7. A circuit board structure for improving the soldering yield of IC devices according to claim 6, characterized in that: The width of the first trace is 0.15 mm.

8. The circuit board structure for improving the soldering yield of IC devices according to claim 6, characterized in that: The width of the first trace is 0.3 mm.

9. A circuit board structure for improving the soldering yield of IC devices according to claim 1, 2, 4, 6, 7 or 8, characterized in that: The length of the first trace extending beyond the edge of the empty network pad is not less than 0.3 mm.

10. A circuit board structure for improving the soldering yield of IC devices according to claim 1, 2, 4, 6, 7 or 8, characterized in that: The length of the first trace extending beyond the edge of the empty network pad is 0.1 mm.

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