Multiplexing integrated chip, display module and device

Abstract

The embodiment of the utility model discloses a multiplexing integrated chip, a display module and a device. The multiplexing integrated chip comprises a plurality of multiplexing circuits and a plurality of scanning signal input ends, each multiplexing circuit comprises a data signal input end, at least two control modules and at least two data signal output ends; wherein the number of the control modules is equal to that of the data signal output ends; the first end of each control module is connected with a data signal output end, the second end of each control module is connected with a data signal input end, and the control end of each control module is connected with a scanning signal input end. According to the scheme, multiplexing of the data transmission channels of the driving chips connected with the data signal input end can be achieved, so that the output number of the data signals is increased, the use number of the driving chips is reduced, and the high-resolution display panel is designed with few driving chips by adopting the amorphous silicon technology or the IGZO technology.

Description

Technical Field

[0001] The embodiments of the present utility model relate to the technical field of display panels, and in particular to a multiplexed integrated chip, a display module and a device. Background Art

[0002] Designing high-resolution screens using amorphous silicon or IGZO technology is limited by load, integrated circuit, and voltage limitations, making it impossible to achieve high resolution and high refresh rates. Consequently, laptop screens with resolutions above 2K or automotive screens with resolutions above 1920RGB*1440 are difficult to achieve using amorphous silicon or IGZO technology. Furthermore, screens with large aspect ratios designed using low-temperature polycrystalline silicon technology can be implemented using very few driver chips, but this is difficult to achieve using amorphous silicon or IGZO technology. Utility Model Content

[0003] The embodiments of the present invention provide a multiplexed integrated chip, a display module, and a device, so as to realize the design of a high-resolution display panel using amorphous silicon technology or IGZO technology with a very small number of driver chips.

[0004] In a first aspect, an embodiment of the present utility model provides a multiplexing integrated chip, the multiplexing integrated chip comprising a plurality of multiplexing circuits and a plurality of scan signal input terminals;

[0005] Each of the multiplexing circuits includes a data signal input terminal, at least two control modules, and at least two data signal output terminals; wherein the number of the control modules is equal to the number of the data signal output terminals;

[0006] The first end of each control module is connected to the data signal output end, the second end of each control module is connected to the data signal input end, and the control end of each control module is connected to the scan signal input end.

[0007] Optionally, the control module includes a transistor;

[0008] The gate of the transistor serves as the control terminal of the control module, the first electrode of the transistor serves as the first terminal of the control module, and the second electrode of the transistor serves as the second terminal of the control module.

[0009] Optionally, the number of the control modules of each multiplexing circuit is equal to the number of the scan signal input terminals.

[0010] Optionally, the ratio of the number of the data signal output terminals to the number of the data signal input terminals of each multiplexing circuit is equal to the number of the control modules.

[0011] Optionally, the transistor includes an NMOS transistor.

[0012] Optionally, the transistor includes a PMOS transistor.

[0013] In a second aspect, an embodiment of the present invention further provides a display module, which includes a display panel, at least one driver chip, and at least one multiplexing integrated chip according to any embodiment of the present invention;

[0014] The output end of the driving chip is connected to the data signal input end, and the display panel is connected to the data signal output end.

[0015] Optionally, the number of the output terminals of all the driving chips is less than or equal to the number of the data signal input terminals of all the multiplexing circuits.

[0016] Optionally, the number of data signal output terminals of all the multiplexing circuits is greater than or equal to three times the number of horizontal pixels of the display panel.

[0017] In a third aspect, an embodiment of the present invention further provides a display device, which includes the display module described in any embodiment of the present invention.

[0018] The present invention utilizes a multiplexing integrated chip comprising multiple multiplexing circuits and multiple scan signal input terminals to multiplex the scan signals generated by the scan circuits and the data signals generated by the driver chips, thereby enabling the display panel to obtain sufficient data signals and meet the requirements of a high-resolution display panel. The multiple data signal output terminals of each multiplexing circuit are connected to the same data signal input terminal through a control module, and the control terminal of each control module is connected to a scan signal input terminal. This allows each data signal output terminal to sequentially output the data signal inputted by the data signal input terminal under the control of the scan signal inputted by the control terminal of the control module to which it is connected. This multiplexing of the data transmission channels of the driver chips connected to the data signal input terminals increases the number of data signal outputs and reduces the number of driver chips used, enabling the design of high-resolution display panels using amorphous silicon or IGZO technology with minimal driver chips. Furthermore, each control module of the different multiplexing circuits of the multiplexing integrated chip is connected to a scan signal input terminal, thereby enabling the control modules of different multiplexing circuits to multiplex the scan signals inputted by the same scan signal input terminal, thereby reducing the number of scan circuits used. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 A schematic structural diagram of a multiplexed integrated chip provided by an embodiment of the present utility model;

[0021] Figure 2 A schematic structural diagram of another multiplexing integrated chip provided by an embodiment of the present utility model;

[0022] Figure 3 A schematic structural diagram of a display module provided by an embodiment of the present utility model. DETAILED DESCRIPTION

[0023] In order to help those skilled in the art better understand the present invention, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0024] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are capable of distinguishing similar objects, and are not necessarily capable of describing a specific order or sequence. It should be understood that the numbers used in this way are interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0025] Figure 1 A schematic diagram of the structure of a multiplexed integrated chip provided by an embodiment of the present utility model is shown in FIG. Figure 1 As shown, the multiplexing integrated chip includes a plurality of multiplexing circuits 110 and a plurality of scan signal input terminals 120;

[0026] Each multiplexing circuit 110 includes a data signal input terminal 111, at least two control modules 112, and at least two data signal output terminals 113; wherein the number of the control modules 112 is equal to the number of the data signal output terminals 113;

[0027] A first terminal of each control module 112 is connected to a data signal output terminal 113 , a second terminal of each control module 112 is connected to the data signal input terminal 111 , and a control terminal of each control module 112 is connected to a scan signal input terminal 120 .

[0028] The scan signal input terminal 120 is connected to the output terminal of the scan circuit. Each multiplexing circuit 110 of the multiplexing integrated chip can multiplex the data signal generated by the driver chip, and different multiplexing circuits 110 can multiplex the scan signals generated by the scan circuit.

[0029] Specifically, the data signal output terminals 113 are connected to the data lines of the display panel, and each data signal output terminal 113 is connected to an output terminal of the driver chip (the output terminal of each data transmission channel). The multiple data signal output terminals 113 of each multiplexing circuit 110 are all connected to the same data signal input terminal 111 through a control module 112. The control terminal of each control module 112 is connected to a scan signal input terminal 120. Thus, each data signal output terminal 113 can sequentially output the data signal inputted by the data signal input terminal 111 under the control of the scan signal inputted by the control terminal of the control module 112 to which it is connected, thereby multiplexing a data transmission channel of the driver chip connected to the data signal input terminal 111, thereby increasing the number of data signal outputs and reducing the number of driver chips used.

[0030] The multiplexing ratio of the multiplexing integrated chip to each data transmission channel of the driver chip is the number of control modules 112 of the multiplexing circuit 110 connected to each data transmission channel of the driver chip. For example, if the number of control modules 112 of the multiplexing circuit 110 connected to a data transmission channel of the driver chip is 2, then the multiplexing ratio of the multiplexing integrated chip to the data transmission channel of the driver chip is 2.

[0031] In addition, each control module 112 of the different multiplexing circuits 110 of the multiplexing integrated chip is connected to a scan signal input terminal 120, thereby enabling the control modules 112 of different multiplexing circuits 110 to multiplex the scan signals input from the same pair of scan signal input terminals 120, thereby reducing the use of scan circuits.

[0032] The present invention, through the design of a multiplexing integrated chip including multiplexing circuits 110 and multiple scanning signal input terminals 120, can multiplex the scanning signals generated by the scanning circuits and the data signals generated by the driver chip, thereby enabling the display panel to obtain sufficient data signals, thereby meeting the requirements of a high-resolution display panel. Specifically, the multiple data signal output terminals 113 of each multiplexing circuit 110 are connected to the same data signal input terminal 111 through a control module 112, and the control terminal of each control module 112 is connected to a scanning signal input terminal 120, so that each data signal output terminal 113 can sequentially output the data signal input by the data signal input terminal 111 under the control of the scanning signal input by the control terminal of the control module 112 to which it is connected, thereby multiplexing the data transmission channels of the driver chip connected to the data signal input terminal 111, thereby increasing the number of data signal outputs and reducing the number of driver chips used, thereby achieving the design of a high-resolution display panel using amorphous silicon technology or IGZO technology with a very small number of driver chips. In addition, each control module 112 of different multiplexing circuits 110 of the multiplexing integrated chip is connected to a scan signal input terminal 120, thereby enabling the control modules 112 of different multiplexing circuits 110 to multiplex the scan signals input from the same scan signal input terminal 120, thereby reducing the use of scan circuits.

[0033] Based on the above embodiment, optionally, Figure 2 This is a schematic diagram of the structure of another multiplexing integrated chip provided by the embodiment of the present utility model. Figure 2 As shown, the control module 112 includes a transistor; the gate of the transistor serves as the control terminal of the control module 112 , the first electrode of the transistor serves as the first terminal of the control module 112 , and the second electrode of the transistor serves as the second terminal of the control module 112 .

[0034] The gate of the transistor is connected to a scan signal input terminal 120, the first electrode of the transistor is connected to a data signal output terminal 113, and the second electrode of each transistor is connected to the data signal input terminal 111. Each data signal output terminal 113 can sequentially output the data signal input from the data signal input terminal 111 under the control of the scan signal input to the gate of the transistor connected to it.

[0035] Based on the above embodiment, optionally, according to the specific connection relationship of each multiplexing circuit 110, the ratio of the number of data signal output terminals 113 to the number of data signal input terminals 111 of each multiplexing circuit 110 is equal to the number of control modules 112. Therefore, the multiplexing multiple of a data transmission channel of a driver chip connected to the data signal input terminal 111 is determined by the number of control modules 112. Obviously, by increasing the number of control modules 112, the number of data signal outputs can be increased and the number of driver chips used can be reduced.

[0036] Specifically, the transistor includes an NMOS transistor or a PMOS transistor.

[0037] If the transistor is an NMOS transistor, when a high-level scanning signal is input to the gate of the NMOS transistor, the NMOS transistor can output the data signal inputted by the data signal input terminal 111 connected to the second electrode thereof to the data signal output terminal 113 connected to the first electrode thereof; when a low-level scanning signal is input to the gate of the NMOS transistor, the NMOS transistor cannot output the data signal inputted by the data signal input terminal 111 connected to the second electrode thereof to the data signal output terminal 113 connected to the first electrode thereof.

[0038] If the transistor is a PMOS transistor, when a low-level scanning signal is input to the gate of the PMOS transistor, the PMOS transistor can output the data signal inputted by the data signal input terminal 111 connected to the second electrode thereof to the data signal output terminal 113 connected to the first electrode thereof; when a high-level scanning signal is input to the gate of the PMOS transistor, the PMOS transistor cannot output the data signal inputted by the data signal input terminal 111 connected to the second electrode thereof to the data signal output terminal 113 connected to the first electrode thereof.

[0039] Based on the above embodiment, optionally, the number of the control modules 112 in each multiplexing circuit 110 is equal to the number of the scan signal input terminals 120 .

[0040] Thus, the control module 112 of each multiplexing circuit 110 is connected to a corresponding scan signal input terminal 120. Each scan signal input terminal 120 is connected to a control module 112 of a different multiplexing circuit 110, thereby improving the multiplexing rate of the scan signal input to each scan signal input terminal 120 and reducing the use of scan circuits.

[0041] Figure 3 A schematic diagram of the structure of a display module provided by an embodiment of the present utility model is shown as follows: Figure 3 As shown, the display module includes a display panel 10, at least one driver chip 30 and at least one multiplexing integrated chip 20 provided by any embodiment of the present invention; the output end of the driver chip 30 is connected to the data signal input end, and the display panel 10 is connected to the data signal output end.

[0042] The present embodiment of the utility model designs a multiplexing integrated chip 20 that includes multiple data transmission channels of driver chips 30 connected to data signal input terminals, thereby increasing the number of data signal outputs and reducing the number of driver chips 30 used. This allows the design of a high-resolution display panel 10 using amorphous silicon or IGZO technology with minimal driver chips 30, thereby reducing the cost and power consumption of the display panel 10. In addition, each control module of the different multiplexing circuits of the multiplexing integrated chip 20 is connected to a scan signal input terminal. Thus, the multiplexing integrated chip 20 can multiplex the scan signals inputted from the same scan signal input terminal by the control modules of the different multiplexing circuits, thereby reducing the use of scan circuits and further reducing the cost of the display panel 10.

[0043] Based on the above embodiment, optionally, the number of output terminals of all driver chips is less than or equal to the number of data signal input terminals of all multiplexing circuits, and the number of data signal output terminals of all multiplexing circuits is greater than or equal to three times the horizontal pixels of the display panel.

[0044] For example, when designing an in-vehicle display module with 2560 RGB*1600 pixels using amorphous silicon technology and a driver chip with 1440 data transmission channels, at least six driver chips are required. These driver chips consume a lot of power and are expensive, and they also exceed the cascade limit of the driver chips, making the design of an in-vehicle display module unfeasible.

[0045] However, the two multiplexing integrated chips and two driver chips provided by the embodiment of the present invention can realize the design of an on-board display module with a pixel size of 2560RGB*1600. Each of the multiplexing integrated chips used includes 1440 multiplexing circuits and three scanning signal input terminals 120. The multiplexing ratio of the integrated chip to the data transmission channel of the driver chip is 3 (each multiplexing circuit includes three control modules. The number of output terminals of the two driver chips (1440*2) is equal to the number of data signal input terminals of the two multiplexing circuits (1440*2). The number of data signal output terminals of the two multiplexing circuits (1440*3+1440*3) is greater than 3 times the horizontal pixels (2560*3) of the on-board display panel with a pixel size of 2560RGB*1600.

[0046] It should be noted that when designing a display module using the multiplexed integrated chip provided in the embodiment of the present invention, the number of multiplexed integrated chips used is determined by the resolution of the display panel, the number of data transmission channels of the driver chip, the multiplexing ratio of each integrated chip and the total number of data signal input terminals. It can be configured according to actual circumstances, and this case does not impose specific restrictions on this.

[0047] An embodiment of the present invention further provides a display device, which includes the display module provided by any embodiment of the present invention, and thus has the beneficial effects of the display module provided by any embodiment of the present invention, which will not be described in detail.

[0048] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this utility model can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of this utility model can be achieved. This is not limited herein.

[0049] The above specific embodiments do not limit the scope of protection of this utility model. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model shall be included within the scope of protection of this utility model.

Claims

1. A multiplexed integrated chip, characterized in that: It includes multiple multiplexing circuits and multiple scanning signal input terminals; Each of the multiplexing circuits includes a data signal input terminal, at least two control modules, and at least two data signal output terminals; wherein the number of the control modules is equal to the number of the data signal output terminals; The first end of each control module is connected to the data signal output end, the second end of each control module is connected to the data signal input end, and the control end of each control module is connected to the scan signal input end.

2. The multiplexing integrated chip according to claim 1, characterized in that: The control module includes a transistor; The gate of the transistor serves as the control terminal of the control module, the first electrode of the transistor serves as the first terminal of the control module, and the second electrode of the transistor serves as the second terminal of the control module.

3. The multiplexing integrated chip according to claim 1, characterized in that: The number of the control modules of each multiplexing circuit is equal to the number of the scan signal input terminals.

4. The multiplexing integrated chip according to claim 1, characterized in that: The ratio of the number of the data signal output terminals to the number of the data signal input terminals of each multiplexing circuit is equal to the number of the control modules.

5. The multiplexing integrated chip according to claim 2, characterized in that: The transistor includes an NMOS transistor.

6. The multiplexing integrated chip according to claim 2, characterized in that: The transistor includes a PMOS transistor.

7. A display module, characterized in that: comprising a display panel, at least one driver chip, and at least one multiplexing integrated chip according to any one of claims 1 to 6; The output end of the driving chip is connected to the data signal input end, and the display panel is connected to the data signal output end.

8. The display module according to claim 7, wherein: The number of the output terminals of all the driving chips is less than or equal to the number of the data signal input terminals of all the multiplexing circuits.

9. The display module according to claim 7, wherein: The number of data signal output terminals of all the multiplexing circuits is greater than or equal to three times the number of horizontal pixels of the display panel.

10. A display device, characterized in that: A display module comprising any one of claims 7 to 9.

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