Consumable chip decoding prevention circuit and printer

Abstract

The utility model provides a consumable chip anti-decoding circuit and a printer, and relates to the field of printers. The consumable chip decoding prevention circuit comprises a main control chip, the consumable chip is in communication connection with the main control chip, a power supply pin of the consumable chip is connected with a power supply through the first controlled switch, and the power supply pin of the consumable chip is further connected with a data acquisition pin of the main control chip; the first controlled switch is controlled by the main control chip, and the main control chip is used for controlling the first controlled switch to be changed from the on state to the off state and then acquiring voltage change data of the power supply pin through the data acquisition pin; and the voltage change data is compared with preset voltage change data to judge whether the communication line between the consumable chip and the main control chip is connected with external equipment or not. Therefore, whether the consumable chip is cracked by the external equipment or not can be detected in time, so that corresponding anti-cracking measures are taken, and the safety and reliability of the consumable chip are ensured.

Description

Technical Field

[0001] The utility model relates to the field of printers, in particular to a consumable chip anti-decoding circuit and a printer. Background Art

[0002] With the continuous expansion of the printer market and the development of technology, the cracking of printer consumable chips has become increasingly serious. This is mainly manifested in the fact that criminals use various means to obtain and crack the data of consumable chips to achieve the following purposes:

[0003] (1) Reduce costs. In order to protect their own interests, many printer manufacturers will set various restrictions and prohibit the use of non-original consumables. Therefore, by cracking the consumables chip, it is possible to bypass the manufacturer's restrictions and enable the printer to accept third-party consumables; users can use non-original third-party consumables, thereby significantly reducing printing costs.

[0004] (2) Reverse engineering: Some competitors crack consumable chips to obtain their internal data and working principles, and then develop similar products, intensifying market competition.

[0005] To combat chip cracking in consumables, printer manufacturers primarily encrypt communication protocols at the software level using complex encryption algorithms to increase the difficulty of cracking. While this approach provides high security at the software level, it is limited in effectiveness against cracking methods that capture communication waveforms and analyze them using external devices. Therefore, current anti-cracking measures primarily focus on the software level, while hardware protection measures are relatively scarce. Utility Model Content

[0006] In order to overcome at least one of the deficiencies in the prior art, the present application provides a consumable chip anti-decryption circuit and a printer, specifically comprising:

[0007] In a first aspect, the present application provides a consumable chip anti-decoding circuit, the consumable chip anti-decoding circuit comprising:

[0008] Main control chip;

[0009] a consumable chip, the consumable chip being communicatively connected to the main control chip, and

[0010] a first controlled switch, wherein the power pin of the consumable chip is connected to a power source via the first controlled switch, and the power pin of the consumable chip is also connected to the data acquisition pin of the main control chip;

[0011] The first controlled switch is controlled by the main control chip. The main control chip is used to control the first controlled switch to change from an on state to an off state, collect voltage change data of the power pin through the data acquisition pin, and compare it with the preset voltage change data to determine whether the communication line between the consumable chip and the main control chip is connected to an external device.

[0012] In conjunction with the optional implementation manner of the first aspect, the consumable chip anti-decryption circuit further includes:

[0013] a second controlled switch, wherein the main control chip and the consumable chip establish a communication connection through the second controlled switch;

[0014] The second controlled switch is controlled by the main control chip, and the main control chip is further configured to control the second controlled switch to be in an off state during a period in which the voltage change data of the power pin is collected through the data collection pin.

[0015] With reference to an optional implementation manner of the first aspect, the second controlled switch is integrated inside the main control chip.

[0016] In conjunction with the optional implementation manner of the first aspect, the consumable chip anti-decryption circuit further includes:

[0017] A capacitor, one end of the capacitor is connected to the power pin, and the other end of the capacitor is grounded.

[0018] In combination with the optional implementation manner of the first aspect, the first controlled switch is a MOS transistor.

[0019] In combination with an optional implementation manner of the first aspect, the communication line between the consumable chip and the main control chip is an I2C bus.

[0020] In combination with an optional implementation manner of the first aspect, the data acquisition pin is connected to an analog-to-digital conversion module in the main control chip.

[0021] In conjunction with the optional implementation manner of the first aspect, the consumable chip anti-decryption circuit further includes:

[0022] A first resistor, wherein the control pin of the main control chip is connected to the control end of the first controlled switch through the first resistor.

[0023] In conjunction with the optional implementation manner of the first aspect, the consumable chip anti-decryption circuit further includes:

[0024] A second resistor, wherein the data acquisition pin of the main control chip is connected to the power pin of the consumable chip through the second resistor.

[0025] In a second aspect, the present application also provides a printer, which includes the consumable chip anti-decryption circuit.

[0026] Compared with the prior art, this application has the following beneficial effects:

[0027] The utility model provides a consumable chip anti-decryption circuit and a printer. The consumable chip anti-decryption circuit includes a main control chip; a consumable chip, the consumable chip being communicatively connected to the main control chip; and a first controlled switch, wherein a power pin of the consumable chip is connected to a power source via the first controlled switch, and the power pin of the consumable chip is also connected to a data acquisition pin of the main control chip. The first controlled switch is controlled by the main control chip, and the main control chip is configured to control the first controlled switch to change from an on state to an off state, collect voltage change data of the power pin via the data acquisition pin, and compare the data with preset voltage change data to determine whether an external device is connected to the communication line between the consumable chip and the main control chip. In this way, it is possible to promptly detect whether the consumable chip is being cracked by an external device, thereby taking corresponding anti-cracking measures to ensure the security and reliability of the consumable chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0029] Figure 1 This is one of the structural diagrams of the consumable chip anti-decryption circuit provided in an embodiment of the present application;

[0030] Figure 2 This is the second structural diagram of the anti-decryption circuit of the consumable chip provided in an embodiment of the present application;

[0031] Figure 3 This is the third structural diagram of the anti-decryption circuit of the consumable chip provided in an embodiment of the present application;

[0032] Figure 4 Schematic diagram of the authentication process provided for this embodiment of the application. DETAILED DESCRIPTION

[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Generally, the components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the present application without creative work are within the scope of protection of the present application.

[0035] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0036] In the description of this application, it should be noted that the terms "first", "second", "third", etc. are used only to distinguish descriptions and should not be understood as indicating or implying relative importance. In addition, the terms "comprises", "comprising" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.

[0037] It should also be noted that, in the description of this application, unless otherwise expressly specified or limited, the terms "disposed," "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0038] Based on the above statement, as introduced in the background technology, current anti-cracking measures are mainly concentrated at the software level, while hardware protection measures are relatively scarce.

[0039] Based on the discovery of the above technical problems, the following technical solutions are proposed after creative work to solve or improve the above problems. It should be noted that the defects existing in the solutions in the above prior art are the results obtained after practice and careful research. Therefore, the discovery process of the above problems and the solutions proposed in the embodiments of this application below for the above problems should all be contributions to this application and should not be understood as technical contents known to those skilled in the art.

[0040] In view of the discovery of the above technical problems, this embodiment provides a consumable chip anti-decoding circuit. Figure 1 As shown, the consumable chip anti-decryption circuit includes a main control chip U1;

[0041] Consumable chip U2, which is in communication with the main control chip U1, and

[0042] A first controlled switch Q1, a power pin VCC2 of the consumable chip U2 is connected to the power source VCC1 through the first controlled switch Q1, and the power pin VCC2 of the consumable chip U2 is also connected to the data acquisition pin ADC of the main control chip U1;

[0043] The first controlled switch Q1 is controlled by the main control chip U1. The main control chip U1 is used to control the first controlled switch Q1 to change from the on state to the off state, and then collect the voltage change data of the power pin VCC2 through the data acquisition pin ADC, and compare it with the preset voltage change data to determine whether the communication line between the consumable chip U2 and the main control chip U1 is connected to an external device.

[0044] It should be noted that when an external device is connected to the communication line of the consumable chip U2, the external device will introduce additional loads or change the original circuit characteristics. Specifically, the external device may increase at least one of the capacitance, resistance, and current path of the circuit, causing the discharge path of the power pin VCC2 of the consumable chip U2 to change. This change will be reflected in the voltage drop speed or amplitude of the power pin VCC2, that is, the change in discharge data. The main control chip U1 collects the voltage data of the consumable chip U2 after power failure through the analog-to-digital conversion module connected to the data acquisition pin ADC, thereby obtaining a discharge curve composed of multiple discrete voltage values, and compares it with the discharge curve corresponding to the preset discharge data, so as to determine whether an external device is connected, and then take corresponding anti-cracking measures.

[0045] Continue to see Figure 1 As an optional embodiment, the consumable chip anti-decryption circuit also includes a first resistor R1. The control pin CTR of the main control chip U1 is connected to the control terminal of the first controlled switch Q1 via the first resistor R1. In this embodiment, the first controlled switch Q1 can be a MOS transistor. The MOS transistor includes an input terminal, an output terminal, and a control terminal. The control pin CTR of the main control chip U1 is connected to the control terminal of the MOS transistor. Different voltage signals can be used to switch the MOS transistor on and off. In addition, to collect a stable voltage signal, the consumable chip anti-decryption circuit also includes a second resistor R2. The data acquisition pin ADC of the main control chip U1 is connected to the power pin VCC2 of the consumable chip U2 via the second resistor R2.

[0046] This allows for timely detection of whether the consumable chip U2 is being hacked by an external device, enabling appropriate anti-hacking measures to be implemented, ensuring the security and reliability of the consumable chip U2. For example, upon detecting an external device, the printer's main control chip U1 can immediately interrupt communication with the consumable chip U2, issue an alarm, or even lock the device to prevent unauthorized operation and ensure chip security.

[0047] It should be noted that the main control chip U1 in this embodiment refers to the central control unit in the printer, responsible for managing and controlling various printer operations, including executing print tasks, monitoring the status of consumables, and communicating with the consumable chip U2. The consumable chip U2 is used to control the use of consumables and store and transmit consumable-related data, such as ink levels and usage records, to ensure normal printer operation and reliable consumable management.

[0048] Continue to see Figure 1 In an optional embodiment, the communication line between the consumable chip U2 and the main control chip U1 is an I2C bus. It should be understood that the I2C bus uses a two-wire system, namely the serial data line SDA and the serial clock line SCL, which makes its hardware interface simple and thus has high flexibility and reliability. It can realize complex communication between devices through a simple software protocol, and at the same time has a data packet confirmation and error detection mechanism to ensure the accuracy of data transmission. Of course, the consumable chip U2 and the main control chip U1 can also adopt other communication buses, which are not specifically limited in this embodiment. For example, SPI bus, UART and other buses.

[0049] Research has found that the communication line between the main control chip U1 and the consumable chip U2 will interfere with the voltage drop process of the consumable chip U2. The reason is that the communication line between the main control chip U1 and the consumable chip U2 will generate current fluctuations when transmitting data. These current fluctuations will change the voltage level of the chip, thereby interfering with the natural curve of the voltage drop process. Therefore, in Figure 1 The shown supplies chip anti-deciphering circuit is based on, as Figure 2 As shown, to ensure that the collected discharge curve accurately reflects the actual status of the chip, the consumable chip anti-decoding circuit also includes:

[0050] The second controlled switch Q2 is used to establish a communication connection between the main control chip U1 and the consumable chip U2;

[0051] The second controlled switch Q2 is controlled by the main control chip U1 . The main control chip U1 is further configured to control the second controlled switch Q2 to be in an off state during the period when the voltage change data of the power pin VCC2 is collected through the data collection pin ADC.

[0052] Thus, this embodiment adds a second controlled switch Q2 between the main control chip U1 and the consumable chip U2 to prevent current fluctuations generated by the communication line from interfering with the voltage drop process, thereby ensuring that the collected discharge curve accurately reflects the actual state of the chip. Specifically, while the main control chip U1 is collecting voltage change data from the power pin VCC2 via the data acquisition pin ADC, the second controlled switch Q2 is controlled to be in the off state, thereby isolating interference from the communication line and ensuring the accuracy of the discharge curve. This allows for more reliable detection of external device interference.

[0053] Furthermore, it should be understood that while the second controlled switch Q2 can prevent current fluctuations generated by the communication line from interfering with the voltage drop process, the external device is connected to the input end of the second controlled switch Q2 (i.e., the end close to the main control chip U1). In this case, the discharge curve of the consumable chip U2 is not affected by the external device. As an alternative embodiment, the second controlled switch Q2 can be integrated within the main control chip U1.

[0054] In this way, once the second controlled switch Q2 is integrated into the main control chip U1, it means that the external device cannot be connected to the input end of the second controlled switch Q2, and can only be connected to the output end of the second controlled switch Q2 (that is, the end away from the main control chip U1). At this time, the discharge curve of the consumable chip U2 will inevitably be affected.

[0055] During the research process, it was found that if the voltage of the consumable chip U2 drops too quickly, effective discharge data cannot be collected. Figure 2 The shown supplies chip anti-deciphering circuit is based on, as Figure 3 As shown, the consumable chip anti-decryption circuit also includes:

[0056] Capacitor C, one end of the capacitor C is connected to the power pin VCC2, and the other end of the capacitor is grounded.

[0057] In this way, the capacitor C can continue to power the chip for a period of time after the main control chip U1 cuts off the power supply to the consumable chip U2, ensuring that the chip voltage drops steadily within a certain period of time. In this way, the main control chip U1 can collect voltage values ​​multiple times during this period, thereby improving the reliability and accuracy of the detection results.

[0058] Based on the consumable chip anti-decoding circuit provided in the above embodiment, this embodiment further provides a printer, which includes the consumable chip anti-decoding circuit described above.

[0059] It should also be noted that the consumable chip U2 needs to pass the printer on-machine authentication before it can participate in the printing work, and the on-machine authentication requires multiple instructions for authentication. Figure 4As shown, assuming that three instructions are required for on-device authentication, the main control chip U1 can perform a discharge test before sending each instruction to prevent an external device from accessing the communication line between the main control chip U1 and the consumable chip U2 during the authentication process and monitoring the verification instructions. In this embodiment, if the main control chip U1 detects that an external device is monitoring any authentication instruction, it is considered that the on-device authentication has failed.

[0060] In addition, in addition to connecting a capacitor to the power pin VCC2 of the consumable chip U2 at the hardware level to slow down the voltage drop of the consumable chip U2, the consumable chip U2 in this embodiment also supports a low-power mode. Therefore, in order to further slow down the voltage drop of the consumable chip U2, before collecting the discharge data of the consumable chip U2, the main control chip U1 can also send a detection instruction to the consumable chip U2. The detection instruction is used to instruct the consumable chip U2 to enter the low-power mode from the normal mode, and return to the normal mode after the authentication is completed.

[0061] Finally, in order to ensure the effectiveness of the detection and the normal operation of the consumable chip U2, the voltage value collected by the main control chip U1 should be kept in a range higher than the minimum operating voltage of the consumable chip U2. The reason is that if the collected voltage is lower than the minimum operating voltage of the consumable chip U2, the consumable chip U2 may be reset and restarted due to insufficient voltage; and once the consumable chip U2 is reset and restarted, it may cause certain instructions to fail to execute correctly or errors to occur, thereby affecting the overall authentication process. Therefore, when performing discharge curve detection, it is necessary to select a suitable voltage collection range to avoid negative impact on the normal operation of the consumable chip U2. In this regard, once the main control chip U1 detects that the collected voltage value is lower than the set threshold, it controls the first controlled switch Q1 from the off state to the on state, so that the power supply continues to supply power to the consumable chip, thereby avoiding the voltage after discharge being too low, which causes the consumable chip to reset, and thus the subsequent authentication cannot be completed.

[0062] The above descriptions are merely examples of various embodiments of the present application, but the scope of protection of the present application is not limited thereto. Any modifications or substitutions that can be readily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included within the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A consumable chip anti-decoding circuit, characterized in that: The consumable chip anti-decryption circuit includes: Main control chip; a consumable chip, the consumable chip being communicatively connected to the main control chip, and a first controlled switch, wherein the power pin of the consumable chip is connected to a power source via the first controlled switch, and the power pin of the consumable chip is also connected to the data acquisition pin of the main control chip; The first controlled switch is controlled by the main control chip. The main control chip is used to control the first controlled switch to change from an on state to an off state, collect voltage change data of the power pin through the data acquisition pin, and compare it with the preset voltage change data to determine whether the communication line between the consumable chip and the main control chip is connected to an external device.

2. The consumable chip anti-decoding circuit according to claim 1, characterized in that: The consumable chip anti-decryption circuit also includes: a second controlled switch, wherein the main control chip and the consumable chip establish a communication connection through the second controlled switch; The second controlled switch is controlled by the main control chip, and the main control chip is further configured to control the second controlled switch to be in an off state during a period in which the voltage change data of the power pin is collected through the data collection pin.

3. The consumable chip anti-decoding circuit according to claim 2, characterized in that: The second controlled switch is integrated inside the main control chip.

4. The consumable chip anti-decoding circuit according to claim 1, characterized in that: The consumable chip anti-decryption circuit also includes: A capacitor, one end of the capacitor is connected to the power pin, and the other end of the capacitor is grounded.

5. The consumable chip anti-decoding circuit according to claim 1, characterized in that: The first controlled switch is a MOS transistor.

6. The consumable chip anti-decoding circuit according to claim 1, characterized in that: The communication line between the consumable chip and the main control chip is an I2C bus.

7. The consumable chip anti-decoding circuit according to claim 1, characterized in that: The data acquisition pin is connected to the analog-to-digital conversion module in the main control chip.

8. The consumable chip anti-decoding circuit according to claim 1, characterized in that: The consumable chip anti-decryption circuit also includes: A first resistor, wherein the control pin of the main control chip is connected to the control end of the first controlled switch through the first resistor.

9. The consumable chip anti-decoding circuit according to claim 1, characterized in that: The consumable chip anti-decryption circuit also includes: A second resistor, wherein the data acquisition pin of the main control chip is connected to the power pin of the consumable chip through the second resistor.

10. A printer, characterized in that: The printer includes the consumable chip anti-decryption circuit according to any one of claims 1 to 9.

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