Abnormity processing circuit of vehicle-mounted display screen, vehicle-mounted display system and vehicle

Abstract

The utility model provides an exception handling circuit of a vehicle-mounted display screen, a vehicle-mounted display system and a vehicle. The abnormity processing circuit comprises a detection circuit, a fault generation circuit and an output circuit, and the detection circuit is configured to be connected with a driving tube of a vehicle-mounted display screen and detect a voltage signal of the driving tube; the fault generation circuit is connected with the detection circuit and is configured to generate a short-time fault signal or a long-time fault signal based on the detection result of the voltage signal; the output circuit is connected with the fault generation circuit and is configured to output a shielding signal based on the short-time fault signal so as to block data filling of the driving tube; and the fault generation circuit is configured to output an abnormal signal to a control circuit of the vehicle-mounted display screen based on the long-time fault signal. According to the abnormity display circuit provided by the invention, the abnormity display probability of the vehicle-mounted display screen can be reduced.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an abnormality processing circuit for a vehicle-mounted display screen, a vehicle-mounted display system, and a vehicle. Background Art

[0002] The in-vehicle display is one of the primary screens for human-machine interaction in the car, providing display and touch functions. Thanks to the advancement of integrated automotive display chip technology, the widely used touch and display driver integration (TDDI) chip integrates the functions of the touch driver chip (Touch IC) and the display chip (Display IC) into a single chip, the TDDI chip.

[0003] While TDDI chips offer numerous advantages, such as simple manufacturing, low cost, and excellent optical properties, they pose a greater risk to screen interference. On the one hand, the complex functionality of TDDI chips inevitably leads to higher chip sensitivity, necessitating a more rational chip-level EMC design. For example, the implementation of TDDI chips requires a high-resistance film to prevent touch signal interference. This high-resistance film can result in poor static discharge during static events, making it more likely to cause display anomalies. On the other hand, because a single chip is used for both driving and controlling, a malfunction in chip A could potentially cause a malfunction in chip B, such as a display malfunction caused by a touch anomaly. Consequently, automotive displays equipped with TDDI chips are more susceptible to display anomalies. Utility Model Content

[0004] The present application provides an abnormality processing circuit for a vehicle display screen, a vehicle display system, and a vehicle, so as to reduce the probability of abnormal display images on the vehicle display screen.

[0005] The present application provides an abnormality handling circuit for a vehicle-mounted display screen, which includes a detection circuit, a fault generation circuit, and an output circuit. The detection circuit is configured to be connected to a driving tube of the vehicle-mounted display screen and detect the voltage signal of the driving tube; the fault generation circuit is connected to the detection circuit and configured to generate a short-time fault signal or a long-time fault signal based on the detection result of the voltage signal; the output circuit is connected to the fault generation circuit and configured to output a shielding signal based on the short-time fault signal to block data filling of the driving tube; and the fault generation circuit is configured to output an abnormality signal to the control circuit of the vehicle-mounted display screen based on the long-time fault signal.

[0006] In one embodiment, the fault generation circuit includes an enabling circuit and a delay circuit, wherein the enabling circuit is configured to output a fault signal based on a detection result; the delay circuit is configured to receive the fault signal and output a long-time fault signal or a short-time fault signal when the duration of the fault signal is greater than a preset duration.

[0007] In one embodiment, the output circuit is connected to the enable circuit and the delay circuit, and is configured to output an abnormal signal based on the fault signal and the long-duration fault signal, and the output circuit is configured to output a shielding signal based on the fault signal and the short-duration fault signal.

[0008] In one embodiment, the delay circuit includes a capacitor, a resistor and a switch tube, wherein the first end of the capacitor is connected to the detection circuit, and the second end of the capacitor is grounded; the two ends of the resistor are respectively connected to the first end and the second end of the capacitor; the first end of the switch tube is connected to the first end of the capacitor, the control end of the switch tube is connected to the second end of the capacitor, and the second end of the switch tube is connected to the output circuit.

[0009] In one embodiment, the output circuit includes a first NOT gate circuit, a first AND gate circuit, a second NOT gate circuit, and a second AND gate circuit. The input end of the first NOT gate circuit is connected to the delay circuit; the input end of the first AND gate circuit is respectively connected to the enable circuit and the output end of the first NOT gate circuit; the input end of the second NOT gate circuit is connected to the output end of the first AND gate circuit; the input end of the second AND gate circuit is connected to the output end of the second NOT gate circuit and is connected to the enable signal, and the output end of the second AND gate circuit is configured to be connected to the vehicle display screen.

[0010] In one embodiment, the voltage signal includes a source voltage and a gate voltage, and the detection circuit includes a first comparison circuit, a second comparison circuit, a third comparison circuit, a fourth comparison circuit, an OR gate circuit, a third AND gate circuit, a fourth AND gate circuit, and a third NOT gate circuit. The first comparison circuit is configured to receive the gate voltage and a first threshold; the second comparison circuit is configured to receive the gate voltage and a second threshold; the third comparison circuit is configured to receive the source voltage and a third threshold; the fourth comparison circuit is configured to receive the source voltage and a fourth threshold; the input end of the OR gate circuit is connected to the output end of the first comparison circuit and the second comparison circuit; the input end of the third AND gate circuit is connected to the output end of the third comparison circuit and the fourth comparison circuit respectively; the input end of the fourth AND gate circuit is connected to the output end of the OR gate circuit and the output end of the third AND gate circuit; the input end of the third NOT gate circuit is connected to the output end of the fourth AND gate circuit, and the output end of the third NOT gate circuit is connected to the fault generation circuit; wherein the first threshold>the third threshold>the fourth threshold>the second threshold.

[0011] In one embodiment, the first threshold includes a first sub-threshold and a second sub-threshold, the first comparison circuit includes a first comparator, a second comparator and a fourth AND gate circuit, the non-inverting input terminal of the first comparator is configured to access the gate voltage, and the inverting input terminal of the first comparator is configured to access the first sub-threshold; the inverting input terminal of the second comparator is configured to access the gate voltage, and the non-inverting input terminal of the second comparator is configured to access the second sub-threshold; the output terminal of the fifth AND gate circuit is connected to the output terminals of the first comparator and the second comparator, and the output terminal of the fifth AND gate circuit is connected to the input terminal of the OR gate circuit, wherein the second sub-threshold is greater than or equal to the first sub-threshold. value; or, the second threshold includes a third sub-threshold and a fourth sub-threshold, the second comparison circuit includes a third comparator, a fourth comparator and a sixth AND gate circuit, the non-inverting input terminal of the third comparator is configured to access the gate voltage, and the inverting input terminal of the third comparator is configured to access the third sub-threshold; the inverting input terminal of the fourth comparator is configured to access the gate voltage, and the non-inverting input terminal of the fourth comparator is configured to access the fourth sub-threshold; the output terminal of the sixth AND gate circuit is connected to the output terminals of the third comparator and the fourth comparator, and the output terminal of the sixth AND gate circuit is connected to the input terminal of the OR gate circuit, wherein the fourth sub-threshold is greater than or equal to the third sub-threshold.

[0012] In one embodiment, the enabling circuit includes a seventh AND gate circuit, an input end of the seventh AND gate circuit is connected to the detection circuit and receives the enabling signal, and an output end of the seventh AND gate circuit is connected to the delay circuit.

[0013] The present application provides a vehicle-mounted display system, which includes a vehicle-mounted display screen and the above-mentioned abnormality processing circuit, and the abnormality processing circuit is connected to the vehicle-mounted display screen.

[0014] The present application provides a vehicle, which includes the above-mentioned display system.

[0015] The beneficial effects of the present application are as follows: the exception handling circuit of the present application includes a detection circuit, a fault generation circuit and an output circuit. The detection circuit is configured to detect the voltage signal of the driving tube of the vehicle display screen to determine whether the vehicle display screen has a fault. The fault generation circuit outputs a short-term fault or a long-term fault based on the detection result. The output circuit outputs a shielding signal based on the short-term fault, that is, when the Source Line and the Gate Line are "pseudo-short-circuited", the exception handling circuit outputs a shielding signal, so that the shielding signal can block the data filling of the driving tube, and the picture is maintained by the storage capacitor, thereby reducing the probability of picture abnormality of the vehicle display screen. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:

[0017] Figure 1 This is a structural diagram of an embodiment of a vehicle-mounted display screen provided by the present application;

[0018] Figure 2 This is a structural diagram of an embodiment of an abnormality processing circuit for a vehicle display screen provided by the present application;

[0019] Figure 3 This is a circuit diagram of an embodiment of an abnormality processing circuit for an in-vehicle display screen provided by the present application;

[0020] Figure 4 This is a structural diagram of an embodiment of the vehicle-mounted display system provided by the present application;

[0021] Figure 5 It is a structural schematic diagram of an embodiment of a vehicle provided by this application. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0023] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0024] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present application, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0025] See Figure 1 , Figure 1 This is a structural diagram of an embodiment of a vehicle-mounted display screen provided by the present application. The function of a thin film transistor (TFT) is equivalent to a driver tube. The Source Line and Gate Line of the vehicle-mounted display screen simultaneously control the conduction and shutdown of each driver tube on it. The conduction and shutdown of the driver tube can charge the display capacitor Clc and the storage capacitor Cs.

[0026] When metallic foreign matter enters the display, it can cause a partial short circuit between the Source and Gate lines. This can cause display anomalies, such as a bright spot and malfunctioning touch functionality near that spot. The vehicle display then reports a touch anomaly (TP short). Reporting a TP short is a normal strategy for vehicle displays to report faults caused by foreign matter causing a TFT short circuit. However, in anti-interference testing environments such as static electricity, the parasitic capacitance between the Source and Gate lines can repeatedly charge and discharge, causing a "false short" between the Source and Gate lines. Although this "false short" lasts only a few nanoseconds, the vehicle display will still detect it and report a TP short. Furthermore, this "false short" can cause display anomalies such as screen flickering and flickering. The vehicle display may even reboot and reconfigure the screen due to the TP short, resulting in a black screen reboot. This is unacceptable in automotive applications.

[0027] In order to solve the problem of abnormal display of the vehicle display screen caused by the above-mentioned "false short circuit", the present application provides an abnormal processing circuit of the vehicle display screen, refer to Figure 2 and Figure 3 , Figure 2 This is a structural diagram of an embodiment of an abnormality processing circuit for a vehicle display screen provided by the present application. Figure 31 is a circuit diagram of an embodiment of an abnormality processing circuit for an in-vehicle display screen provided in the present application. The abnormality processing circuit 10 includes a detection circuit 110, a fault generation circuit 120 and an output circuit 130.

[0028] The detection circuit 110 is configured to connect to the driver tube of the vehicle display and detect the voltage signal (not labeled) of the driver tube (not labeled in the figure). The detection circuit 110 detects the voltage signal of the driver tube to determine whether the voltage signal is abnormal, thereby confirming that there is an abnormality in the vehicle display through the abnormal voltage signal. The detection circuit 110 is connected to the driver tube, and can be connected to the source line and gate line where the driver tube is located.

[0029] Fault generation circuit 120 is connected to detection circuit 110 and is configured to generate a short-term fault signal or a long-term fault signal based on the voltage signal detection results. A short-term fault signal corresponds to a "pseudo-short circuit" between the source and gate lines, while a long-term fault signal corresponds to a short circuit between the source and gate lines. Fault generation circuit 120 determines the type of display anomaly based on the voltage signal detection results and outputs a short-term fault signal or a long-term fault signal corresponding to the anomaly.

[0030] The output circuit 130 is connected to the fault generation circuit 120. The output circuit 130 is configured to output a shielding signal based on a short-term fault signal to block the data filling of the driving tube; and the fault generation circuit 120 is also configured to output an abnormal signal to the control circuit of the vehicle display based on a long-term fault signal.

[0031] The exception handling circuit 10 of the present application includes a detection circuit 110, a fault generation circuit 120, and an output circuit 130. The detection circuit 110 is configured to detect the voltage signal of the driver tube of the vehicle display screen to determine whether the vehicle display screen has a fault. The fault generation circuit 120 outputs a short-term fault or a long-term fault based on the detection result. The output circuit 130 outputs a shielding signal based on the short-term fault. That is, when the Source Line and Gate Line are "pseudo-short-circuited", the exception handling circuit 10 outputs the shielding signal so that the shielding signal can block the data filling of the driver tube, and the image is maintained by the storage capacitor, thereby reducing the probability of image abnormality on the vehicle display screen; in addition, based on the long-term fault signal, an exception signal is output to the control circuit of the vehicle display screen. That is, when the Source Line and Gate Line of the vehicle display screen are short-circuited, the exception handling circuit 10 does not interfere with the display and informs the control circuit to intervene in the processing, without affecting the reporting of the actual touch abnormality.

[0032] In one embodiment, the fault generation circuit 120 includes an enable circuit 121 and a delay circuit 122. The enable circuit 121 is configured to output a fault signal based on the detection result of the detection circuit 110 and a valid enable signal VDEN. It is understood that the enable circuit 121 receives the detection result of the detection circuit 110 and the enable signal VDEN. When the enable signal VDEN is valid, the enable circuit 121 outputs a fault signal or a valid fault signal. If the enable signal VDEN is invalid, the enable circuit 121 does not output a fault signal or outputs an invalid fault signal. The enable signal VDEN is an enable signal for filling data on the vehicle display screen. A valid enable signal VDEN is a high-level signal, while an invalid enable signal VDEN is a low-level signal. For example, the fill data is only valid when the enable signal VDEN is high, and the data is filled into a row with an open Gate Line to refresh the display. The fault generating circuit 120 of this embodiment is provided with an enabling circuit 121, which outputs a fault signal when the enabling signal VDEN is valid, that is, the fault signal is output only when the vehicle display screen is filling data. Otherwise, no processing is required when it is in the blanking area, which can reduce the operation process.

[0033] The delay circuit 122 is configured to receive a fault signal and output a long-duration fault signal or a short-duration fault signal when the duration of the fault signal is greater than a preset duration. It can be understood that the preset duration is the duration of the delay circuit 122 delay. Among them, since the short-duration fault signal corresponds to the abnormal "pseudo-short circuit" phenomenon of repeated charging and discharging of the parasitic capacitance between the Source Line and the Gate Line, the duration of the fault signal is short; the long-duration fault signal corresponds to the short circuit abnormality between the Source Line and the Gate Line, so the duration of the fault signal is longer. Therefore, the delay circuit 122 outputs a signal or no signal after the preset duration. For example, the delay circuit 122 outputs a high-level signal corresponding to the long-duration fault signal, or outputs a low-level signal corresponding to the short-duration fault signal.

[0034] The fault generation circuit 120 of this embodiment is provided with an enabling circuit 121 and a delay circuit 122, so that the delay circuit 122 determines the fault type of the vehicle display screen by the maintenance duration of the fault signal, and the delay circuit 122 has a simple structure and is easy to implement; in addition, the enabling circuit 121 outputs a fault signal only when the vehicle display screen is filling data, otherwise no processing is required when it is in the blanking area, which can reduce the operation process.

[0035] In one embodiment, output circuit 130 is connected to enable circuit 121 and delay circuit 122. Output circuit 130 is configured to output an exception signal based on a fault signal and a long-duration fault signal. Output circuit 130 is also configured to output a shielding signal based on the fault signal and a short-duration fault signal. Output circuit 130 of this embodiment outputs a specific exception handling signal based on the fault signal and the fault signal corresponding to a specific fault type. This allows outputting an exception handling signal corresponding to a specific fault type, enabling multi-fault type handling and enhancing the practicality of exception handling circuit 10.

[0036] In one embodiment, the delay circuit 122 includes a capacitor C21, a resistor R21, and a switch M1. A first end of the capacitor C21 is connected to the detection circuit 110, and a second end of the capacitor C21 is grounded (GND). The two ends of the resistor R21 are connected to the first and second ends of the capacitor C21, respectively. A first end of the switch M1 is connected to the first end of the capacitor C21, a control end of the switch M1 is connected to the second end of the capacitor C21, and a second end of the switch M1 is connected to the output circuit 130.

[0037] At this point, the effective fault signal is a high-level signal, which charges capacitor C21. The charge and discharge formula for capacitor C21 shows that the impedance of resistor R21 and capacitor C21 increases over time from 0 to the resistance of resistor R21. Therefore, the voltage difference Ugs between the control terminal and the first terminal of switch M1 gradually increases from 0 to the conduction threshold of switch M1. Switch M1 then gradually switches from off to on, achieving delayed output. It can be understood that during the output of the fault signal, the fault signal charges the capacitor C21 through the resistor R21. Since the voltage across the capacitor C21 cannot change suddenly, both ends of the resistor R21 are high-level and cannot turn on the switch tube M1. The second end of the switch tube M1 outputs a low-level signal. If, after a preset time, the voltage across the resistor R21 continues to decrease until it meets the turn-on voltage requirement of the switch tube M1, the switch tube M1 is turned on and the second end of the switch tube M1 outputs a high-level signal. At this time, it can be determined that the fault type is a short circuit fault between the Source Line and the Gate Line corresponding to the driver tube. If, after the preset time, the voltage across the resistor R21 still cannot meet the turn-on voltage requirement of the switch tube M1, the second end of the switch tube M1 continues to output a low-level signal. At this time, it can be determined that the fault type is a "pseudo-short circuit" fault between the Source Line and the Gate Line corresponding to the driver tube.

[0038] The delay circuit 122 of this embodiment only includes a capacitor C21 and a resistor R21 connected in parallel between the control terminal and the first terminal of the switch tube M1 , which can achieve delayed output while having a simple circuit structure, fewer electronic components, and low cost.

[0039] In other embodiments, the delay circuit 122 further includes a resistor R22 and a resistor R23. One end of the resistor R22 is connected to the control terminal of the switch M1, and the other end of the resistor R22 is grounded to GND. One end of the resistor R23 is connected to the second terminal of the switch M1, and the other end of the resistor R23 is grounded to GND.

[0040] In one embodiment, the enabling circuit 121 includes a seventh AND gate 1221. The input of the seventh AND gate 1221 is connected to the detection circuit 110 and receives the enable signal VDEN. The output of the seventh AND gate 1221 is connected to the first end of the capacitor C21. The enabling circuit 121 of this embodiment is a logic circuit with a simple structure and low cost.

[0041] In one embodiment, the voltage signal of the driver transistor includes a source voltage Vs and a gate voltage Vg. The detection circuit 110 includes a first comparison circuit 111, a second comparison circuit 112, a third comparison circuit 113, a fourth comparison circuit 114, an OR gate circuit 116, a third AND gate circuit 115, a fourth AND gate circuit 117, and a third NOT gate circuit 118. The first comparison circuit 111 is configured to receive the gate voltage Vg and a first threshold value V1. The second comparison circuit 112 is configured to receive the gate voltage Vg and a second threshold value V2. The third comparison circuit 113 is configured to receive the source voltage Vs and a third threshold value V3. The fourth comparison circuit 114 is configured to receive the source voltage Vs and a fourth threshold value V4. The input of the OR gate circuit 116 is connected to the outputs of the first comparison circuit 111 and the second comparison circuit 112. The input of the third AND gate circuit 115 is connected to the output of the OR gate circuit 116 and the output of the third comparison circuit 113. The input terminal of the third NOT circuit 118 is connected to the output terminal of the third AND circuit 115, and the output terminal of the third NOT circuit 118 is connected to the fault generating circuit 120. The first threshold V1>the third threshold V3>the fourth threshold V4>the second threshold V2.

[0042] Under normal operating conditions of the vehicle display, the source voltage Vs of the driver tube is between the fourth threshold V4 and the third threshold V3, with the fourth threshold V4 being a negative voltage and the third threshold V3 being a positive voltage. The driver tube is turned on when its gate voltage Vg is greater than or equal to the first threshold V1, which is a positive voltage. The driver tube is turned off when its gate voltage Vg is less than or equal to the second threshold V2, which is a negative voltage. When a row is filled with data, the gate line voltage of that row reaches the first threshold V1, keeping the driver tube turned on. The voltages of the remaining rows all reach the second threshold V2, keeping the driver tube turned off. To ensure the driver tube is stably turned on or off, the first threshold V1 must be greater than the third threshold V3, and the second threshold V2 must be greater than the fourth threshold V4.

[0043] It can be known that since the first threshold value V1 is larger than the third threshold value V3, and the second threshold value V2 is smaller than the fourth threshold value V4. When the in-vehicle display screen is working normally, the gate voltage Vg of the driving transistor cannot be between the third threshold value V3 and the fourth threshold value V4. The specific detection process is as follows: When filling data for a certain row, the gate voltage Vg of the driving transistor in this row is the first threshold value V1, and the gate voltage Vg of the driving transistors in the remaining rows is the second threshold value V2. If Vg > V1 or V2 < Vg, it is determined that the gate voltage Vg of the driving transistor is normal. When filling data for a certain row, the source voltage Vs of this column is between V4 and V3. If V4 < Vs < V3, it is determined that the source voltage Vs of the driving transistor is normal. By judging whether the gate voltage Vg and the source voltage Vs of the driving transistor are normal, it can be confirmed that there is an abnormality between the SourceLine and the Gate Line of the in-vehicle display screen.

[0044] Among them, the first comparison circuit 111 can be a comparison function implemented by an operational amplifier, or a comparison function implemented by a logic circuit, which is not limited here. Similarly, there are a second comparison circuit 112, a third comparison circuit 113, and a fourth comparison circuit 114.

[0045] In one embodiment, to improve the accuracy of the detection circuit 110, the first threshold V1 of this embodiment includes a first sub-threshold V1-a and a second sub-threshold V1+a, where the second sub-threshold V1+a is greater than or equal to the first sub-threshold V1-a. That is, the first threshold V1 of this embodiment is defined as a voltage range. By setting this voltage range, the impact of supply voltage fluctuations, such as normal ripple, on the gate voltage can be eliminated, thereby improving the accuracy of the detection circuit 110. Similarly, the second threshold V2 includes a third sub-threshold V2-a and a fourth sub-threshold V2+a, where the fourth sub-threshold V2+a is greater than or equal to the third sub-threshold V2-a. The first comparison circuit 111 includes a comparator U11, a comparator U12, and an AND gate circuit U13. The non-inverting input of comparator U11 is configured to receive the gate voltage Vg, and the inverting input of comparator U11 is configured to receive the first sub-threshold V1-a. The inverting input of comparator U12 is configured to receive the gate voltage Vg, and the non-inverting input of comparator U12 is configured to receive the second sub-threshold V1+a. The input of AND gate circuit U13 is connected to the outputs of comparator U11 and comparator U12, and the output of AND gate circuit U13 is connected to the input of OR gate circuit 116. The second comparison circuit 112 includes a comparator U21, a comparator U22, and an AND gate circuit U23. The positive input terminal of the comparator U21 is configured to access the gate voltage Vg, and the negative input terminal of the comparator U21 is configured to access the third sub-threshold V2-a; the negative input terminal of the comparator U22 is configured to access the gate voltage Vg, and the positive input terminal of the comparator U22 is configured to access the second sub-threshold V2+a; the input terminal of the AND gate circuit U23 is connected to the output terminals of the comparator U21 and the comparator U22, and the output terminal of the AND gate circuit U23 is connected to the input terminal of the OR gate circuit 116.

[0046] Similarly, the third threshold V3 includes a fifth sub-threshold V3+a. The fourth threshold V4 includes a sixth sub-threshold V4-a. Specifically, the inverting input of the third comparison circuit 113 is configured to receive the source voltage Vs, and the non-inverting input of the third comparison circuit 113 is configured to receive the fifth sub-threshold V3+a. The non-inverting input of the fourth comparison circuit 114 is configured to receive the source voltage Vs, and the inverting input of the fourth comparison circuit 114 is configured to receive the sixth sub-threshold V4-a. The input of the AND gate circuit 115 is connected to the outputs of the third comparison circuit 113 and the fourth comparison circuit 114.

[0047] In one embodiment, the first comparison circuit 111 , the second comparison circuit 112 , the third comparison circuit 113 and the fourth comparison circuit 114 have the same circuit structure, which can reduce the development time of the hardware circuit.

[0048] In one embodiment, the output circuit 130 includes a first NOT circuit 131, a first AND circuit 132, a second NOT circuit 133, and a second AND circuit 134. The input of the first NOT circuit 131 is connected to the output of the delay circuit 122. The input of the first AND circuit 132 is respectively connected to the output of the enable circuit 121 and the output of the first NOT circuit 131. The input of the second NOT circuit 133 is connected to the output of the first AND circuit 132. The input of the second AND circuit 134 is connected to the output of the second NOT circuit 133 and receives the enable signal VDEN. The output of the second AND circuit 134 is configured to receive the vehicle display screen and output the shielding signal VDEN0. The first NOT circuit 131 is also configured to output an abnormality signal.

[0049] The output circuit 130 of this embodiment is composed of a logic circuit, which has a simple structure and a small number of components, thereby reducing costs.

[0050] This application provides a vehicle-mounted display system, see Figure 4 , Figure 4 FIG2 is a schematic structural diagram of an embodiment of an in-vehicle display system provided herein. The in-vehicle display system 20 includes an in-vehicle display screen 21 and an exception handling circuit 10, which is electrically connected to the in-vehicle display screen 21. The exception handling circuit 10 can be any of the above-described embodiments of the exception handling circuit, and is not limited thereto. The specific operation of the exception handling circuit 10 is described in the above-described embodiments of the exception handling circuit and is not further described here.

[0051] This application provides a vehicle, see Figure 5 , Figure 5 It is a structural diagram of an embodiment of a vehicle provided in the present application. The vehicle 30 includes an on-board display system (not marked in the figure), wherein the on-board display system is any one of the on-board display systems in the above-mentioned on-board display system embodiments, which is not limited here.

[0052] The above is only an implementation method of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. An abnormality processing circuit for a vehicle-mounted display screen, characterized in that: include: a detection circuit, configured to be connected to a driving tube of the vehicle-mounted display screen and detect a voltage signal of the driving tube; a fault generating circuit, connected to the detection circuit, and configured to generate a short-term fault signal or a long-term fault signal based on a detection result of the voltage signal; an output circuit connected to the fault generating circuit and configured to output a shielding signal based on the short-time fault signal to block data filling of the driving tube; The fault generating circuit is configured to output an abnormal signal to the control circuit of the vehicle display screen based on the long-term fault signal.

2. The abnormality processing circuit according to claim 1, characterized in that: The fault generating circuit comprises: an enabling circuit configured to output a fault signal based on the detection result; The delay circuit is configured to receive the fault signal and output the long-duration fault signal or the short-duration fault signal when the duration of the fault signal is greater than a preset duration.

3. The abnormality processing circuit according to claim 2, characterized in that: The output circuit is connected to the enable circuit and the delay circuit, and is configured to output the abnormal signal based on the fault signal and the long-term fault signal, and the output circuit is configured to output the shielding signal based on the fault signal and the short-term fault signal.

4. The abnormality processing circuit according to claim 2, characterized in that: The delay circuit comprises: a capacitor, wherein a first end of the capacitor is connected to the detection circuit, and a second end of the capacitor is grounded; a resistor, two ends of which are connected to the first end and the second end of the capacitor respectively; A switch tube, wherein a first end of the switch tube is connected to the first end of the capacitor, a control end of the switch tube is connected to the second end of the capacitor, and a second end of the switch tube is connected to the output circuit.

5. The abnormality processing circuit according to claim 3, characterized in that: The output circuit includes: a first NOT gate circuit, wherein an input end of the first NOT gate circuit is connected to the delay circuit; a first AND gate circuit, wherein an input end of the first AND gate circuit is connected to an output end of the enable circuit and an output end of the first NOT gate circuit respectively; a second NOT gate circuit, wherein an input end of the second NOT gate circuit is connected to an output end of the first AND gate circuit; A second AND gate circuit, wherein the input end of the second AND gate circuit is connected to the output end of the second NOT gate circuit and receives an enable signal, and the output end of the second AND gate circuit is configured to receive the vehicle-mounted display screen.

6. The abnormality processing circuit according to claim 1, characterized in that: The voltage signal includes a source voltage and a gate voltage, and the detection circuit includes: a first comparison circuit configured to access the gate voltage and a first threshold; a second comparison circuit configured to access the gate voltage and a second threshold; a third comparison circuit configured to access the source voltage and a third threshold; a fourth comparison circuit configured to access the source voltage and a fourth threshold; an OR gate circuit, wherein an input end of the OR gate circuit is connected to the output ends of the first comparison circuit and the second comparison circuit; a third AND gate circuit, wherein an input terminal of the third AND gate circuit is connected to an output terminal of the third comparison circuit and an output terminal of the fourth comparison circuit respectively; a fourth AND gate circuit, wherein an input end of the fourth AND gate circuit is connected to an output end of the OR gate circuit and an output end of the third AND gate circuit; a third NOT gate circuit, wherein an input end of the third NOT gate circuit is connected to an output end of the fourth AND gate circuit, and an output end of the third NOT gate circuit is connected to the fault generating circuit; Among them, the first threshold>the third threshold>the fourth threshold>the second threshold.

7. The abnormality processing circuit according to claim 6, characterized in that: The first threshold includes a first sub-threshold and a second sub-threshold, and the first comparison circuit includes: a first comparator, wherein a non-inverting input terminal of the first comparator is configured to be connected to the gate voltage, and an inverting input terminal of the first comparator is configured to be connected to the first sub-threshold; a second comparator, wherein an inverting input terminal of the second comparator is configured to be connected to the gate voltage, and a non-inverting input terminal of the second comparator is configured to be connected to the second sub-threshold; a fifth AND gate circuit, wherein an output terminal of the fifth AND gate circuit is connected to the output terminals of the first comparator and the second comparator, and an output terminal of the fifth AND gate circuit is connected to an input terminal of the OR gate circuit, wherein the second sub-threshold is greater than or equal to the first sub-threshold; or The second threshold includes a third sub-threshold and a fourth sub-threshold, and the second comparison circuit includes: a third comparator, wherein a non-inverting input terminal of the third comparator is configured to be connected to the gate voltage, and an inverting input terminal of the third comparator is configured to be connected to the third sub-threshold; a fourth comparator, wherein an inverting input terminal of the fourth comparator is configured to be connected to the gate voltage, and a non-inverting input terminal of the fourth comparator is configured to be connected to the fourth sub-threshold; A sixth AND gate circuit, wherein the output end of the sixth AND gate circuit is connected to the output ends of the third comparator and the fourth comparator, and the output end of the sixth AND gate circuit is connected to the input end of the OR gate circuit, wherein the fourth sub-threshold is greater than or equal to the third sub-threshold.

8. The abnormality processing circuit according to claim 2, characterized in that: The enabling circuit includes: A seventh AND gate circuit, wherein the input end of the seventh AND gate circuit is connected to the detection circuit and receives an enable signal, and the output end of the seventh AND gate circuit is connected to the delay circuit.

9. A vehicle-mounted display system, characterized in that: include: In-vehicle display screen; The abnormality handling circuit according to any one of claims 1 to 8 is connected to the vehicle-mounted display screen.

10. A vehicle, characterized in that: include: The vehicle-mounted display system according to claim 9.

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