SOP lead frame packaging structure
By designing the upper epoxy resin layer to be thicker than the lower epoxy resin layer in the SOP lead frame packaging structure, the problem of traditional packaging structure being incompatible with thick chips, multi-chip stacking and high-line arc chips is solved, and a wider range of packaging applicability and compatibility is achieved.
Patent Information
- Application Number
- CN202422599262.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2034-10-25
AI Technical Summary
The traditional SOP packaging structure is not suitable for thick chips, multi-chip stacking and special high-line arc chip packaging, and the packaging structure is highly incompatible.
A SOP lead frame packaging structure is designed, in which the thickness of the upper epoxy resin layer is greater than that of the lower epoxy resin layer. The chip is encapsulated in the upper epoxy resin layer. The upper epoxy resin layer is arranged on the upper side of the lead frame, and the lower epoxy resin layer is arranged on the lower side, forming a packaging structure with a thicker top and a thinner bottom.
It achieves the packaging requirements of compatible thick chips, multi-chip stacking and high-line arc chips, and improves the applicability and compatibility of the packaging structure.
Smart Images
Figure CN223333795U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a packaging technology for integrated circuits, in particular to a SOP packaging structure. Background Art
[0002] SOP packaging is a packaging form for integrated circuits. Common packaging materials include epoxy resin, ceramics, glass, metal, etc. Epoxy resin packaging is now basically used. It has a wide range of applications and is mainly used in various integrated circuits.
[0003] Currently, traditional multi-chip packaging products generally adopt a SOP packaging structure for convenience. In this packaging structure, multiple chips are laid flat on the lead frame, and the epoxy resin is evenly distributed on the upper and lower layers of the lead frame. The epoxy resin thickness of the upper and lower layers of the lead frame is consistent. However, this packaging structure is not conducive to the packaging of thick chips, multi-chip stacking, and special high-line arc chips. Utility Model Content
[0004] Purpose of the utility model: The purpose of the utility model is to provide an SOP lead frame packaging structure suitable for thick chip packaging, multi-chip stacking packaging, and special high-line arc chip packaging, which has compatibility.
[0005] Technical solution: A SOP lead frame packaging structure, including a lead frame and a pin device connected thereto, wherein the pin device includes a left pin device and a right pin device respectively located on a group of opposite sides of the lead frame, an upper epoxy resin layer is arranged on the upper side of the lead frame, and a lower epoxy resin layer is arranged on the lower side, the thickness of the upper epoxy resin layer is greater than the thickness of the lower epoxy resin layer, and the chip is encapsulated in the upper epoxy resin layer.
[0006] Furthermore, the thickness of the upper epoxy resin layer is 0.5 to 1.02 mm, and the thickness of the lower epoxy resin layer is 0.3 to 0.55 mm.
[0007] Furthermore, the overall thickness of the packaging structure is 1.2-1.97 mm, wherein the thickness of the lead frame is 0.25 mm, and the height of the pin device is 0.15 mm.
[0008] Optimally, the thickness of the upper epoxy resin layer is 1.0148 mm, and the thickness of the lower epoxy resin layer is 0.55 mm.
[0009] Optimally, the overall thickness of the package structure is 1.9648 mm, wherein the thickness of the lead frame is 0.25 mm, and the height of the pin device is 0.15 mm.
[0010] Furthermore, the chip encapsulated in the upper epoxy resin layer is a thick chip, a stacked multi-chip, or a high-line arc chip.
[0011] Beneficial effect: The advantage of the utility model is that the thickness of the upper epoxy resin layer of the SOP lead frame is designed to be greater than the thickness of the lower epoxy resin layer, forming a packaging structure with a thick top and a thin bottom, which is compatible with the packaging requirements of most thick chips, stacked multi-chips, and high-line arc chips. The SOP lead frame packaging structure of the same specification has strong applicability and good compatibility. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 A three-dimensional view of the packaging structure of this application;
[0013] Figure 2 for Figure 1 The main view;
[0014] Figure 3 A schematic diagram of stacking multiple chips for packaging in this application;
[0015] Figure 4 for Figure 3 Schematic diagram of the internal structure;
[0016] Figure 5 Schematic diagram of packaging thick chips for this application;
[0017] Figure 6 This is a schematic diagram of packaging a high-line arc chip for this application. DETAILED DESCRIPTION
[0018] The present invention will be further illustrated below with reference to specific embodiments.
[0019] A SOP lead frame packaging structure is described by taking the packaging of stacked multi-chips as an example. Figures 1 to 4 As shown, the SOP lead frame package structure includes a lead frame 1 and a pin assembly 2 connected thereto. The pin assembly 2 includes a left pin assembly 21 and a right pin assembly 22. The left pin assembly 21 is on one side of the lead frame 1, and the right pin assembly 22 is on the other side of the lead frame 1 opposite thereto. The left pin assembly 21 and the right pin assembly 22 each include four pins. An upper epoxy resin layer 3 is disposed on the upper side of the lead frame 1, and a lower epoxy resin layer 4 is disposed on the lower side of the lead frame 1. The thickness D1 of the upper epoxy resin layer 3 is greater than the thickness D2 of the lower epoxy resin layer 4. The specific structural dimensions are: the thickness D1 of the upper epoxy resin layer is 1.0148 mm, the thickness D2 of the lower epoxy resin layer is 0.55 mm, the thickness D3 of the lead frame is 0.25 mm, and the height D4 of the pin assembly is 0.15 mm. The overall thickness D of the package structure is 1.9648 mm.
[0020] The stacked multi-chip 6 is encapsulated in the upper epoxy resin layer 3. The stacked multi-chip 6 is arranged by stacking three chips, and the chips and the pins are connected by gold wires 5. The height of the pin device facilitates subsequent PCB mounting.
[0021] The above-mentioned SOP lead frame packaging structure is also applicable to packaging thick chips, as shown in the attached Figure 5 As shown, the thick chip 7 is encapsulated in the upper epoxy resin layer 3.
[0022] The above-mentioned SOP lead frame packaging structure is also applicable to packaging high-line arc chips, as shown in the attached Figure 6 As shown, the high-line arc chip 8 is encapsulated in the upper epoxy resin layer 3.
[0023] The thickness D1 of the upper epoxy layer is designed to be 0.5-1.02mm, and the thickness D2 of the lower epoxy layer is designed to be 0.3-0.55mm. This is compatible with most packaging requirements for thick chips, stacked multi-chips, and high-line arc chips. The lead frame thickness D3 and the pin device height D4 remain unchanged, and the overall package thickness D is 1.2-1.97mm. This SOP lead frame package structure, with the same specifications, offers strong adaptability and compatibility.
Claims
1. A SOP lead frame packaging structure, comprising a lead frame (1) and a pin device (2) connected thereto, wherein the pin device (2) comprises a left pin device (21) and a right pin device (22) respectively located on a set of opposite sides of the lead frame (1), characterized in that: An upper epoxy resin layer (3) is arranged on the upper side of the lead frame (1), and a lower epoxy resin layer (4) is arranged on the lower side; the thickness of the upper epoxy resin layer (3) is greater than the thickness of the lower epoxy resin layer (4); and a chip is encapsulated in the upper epoxy resin layer (3).
2. A SOP lead frame packaging structure according to claim 1, characterized in that: The thickness of the upper epoxy resin layer (3) is 0.5 to 1.02 mm, and the thickness of the lower epoxy resin layer (4) is 0.3 to 0.55 mm.
3. A SOP lead frame packaging structure according to claim 2, characterized in that: The overall thickness of the packaging structure is 1.2 to 1.97 mm, wherein the thickness of the lead frame (1) is 0.25 mm, and the height of the pin device (2) is 0.15 mm.
4. A SOP lead frame packaging structure according to claim 2, characterized in that: The thickness of the upper epoxy resin layer (3) is 1.0148 mm, and the thickness of the lower epoxy resin layer (4) is 0.55 mm.
5. The SOP lead frame packaging structure according to claim 4, wherein: The overall thickness of the packaging structure is 1.9648 mm, wherein the thickness of the lead frame (1) is 0.25 mm, and the height of the pin device (2) is 0.15 mm.
6. A SOP lead frame packaging structure according to any one of claims 1 to 5, characterized in that: The chip encapsulated in the upper epoxy resin layer (3) is a thick chip, a stacked multi-chip, or a high-line arc chip.