Plug-in wake-up power supply device and mobile power supply

Abstract

The utility model relates to the field of power supply devices, in particular to a plug-in awakening power supply device and a mobile power supply. The VIN end of the power management circuit is connected with the VOUT end of the Apple mother seat interface, and the first CC end of the power management circuit is connected with the second CC end of the Apple mother seat interface; the Apple mother seat interface further comprises a DATA end, the insertion wake-up circuit comprises a first switch MOS tube, a grid electrode of the first switch MOS tube is connected with the DATA end, and a drain electrode and a source electrode of the first switch MOS tube are connected with a second CC end and a GND end of the Apple mother seat interface respectively. The beneficial effects of the utility model lie in that compared with the prior art, the first CC end of the power management circuit and the second CC end of the Apple socket interface are directly connected with the GND end due to the conduction of the first switch MOS tube Q2, a low-level signal is generated, the power management circuit obtains an insertion signal through the first CC end of the P2 terminal, and the insertion signal is transmitted to the second CC end of the Apple socket interface. Namely, the Apple socket interface is inserted by an equipment interface of external electronic equipment.

Description

Technical Field

[0001] The utility model relates to the field of power supply devices, in particular to an insertion-awakening power supply device and a mobile power supply. Background Art

[0002] Existing power supply devices also have the function of inserting recognition and waking up, especially the Apple female socket interface, which realizes wake-up by contacting the metal shell and then grounding. However, the connection between the metal shell and the ground of the circuit board is prone to problems. During long-term use, the connection between the metal shell and the circuit board may fail due to metal deformation or other reasons, and cannot be tightly connected. Utility Model Content

[0003] The technical problem to be solved by the present invention is to provide a plug-in wake-up power supply device and a mobile power supply in response to the above-mentioned defects of the prior art, so as to solve the problem that the connection between the metal housing and the circuit board may fail due to metal deformation or other reasons.

[0004] The technical solution adopted by the present invention to solve the technical problem is to provide a power supply device capable of being woken up by insertion, comprising:

[0005] A power management circuit and an Apple female socket interface, wherein the VIN terminal of the power management circuit is connected to the VOUT terminal of the Apple female socket interface, and the first CC terminal of the power management circuit is connected to the second CC terminal of the Apple female socket interface;

[0006] Insert the wake-up circuit, the Apple female socket interface also includes a DATA terminal, the insert wake-up circuit includes a first switch MOS tube, the gate of the first switch MOS tube is connected to the DATA terminal, and the drain and source of the first switch MOS tube are respectively connected to the second CC terminal and GND terminal of the Apple female socket interface.

[0007] Among them, the preferred solution is: a first resistor is connected in series between the second CC terminal of the Apple female socket interface and the drain of the first switch MOS tube, the node between the drain of the first switch MOS tube and the first resistor is connected to the metal shell of the Apple female socket interface, and the source of the first switch MOS tube is connected to the GND terminal.

[0008] Among them, the preferred solution is: a first diode and a second resistor are connected in series between the DATA end of the Apple female socket interface and the gate of the first switch MOS tube, and the cathode of the first diode is connected to the second resistor, and the anode of the first diode is connected to the DATA end; wherein, the cathode of the first diode is also connected to the GND end through a first capacitor.

[0009] Among them, the preferred solution is: a second switch MOS tube is also arranged between the VIN end of the power management circuit and the VOUT end of the Apple female socket interface, the drain and source of the second switch MOS tube are respectively connected to the VIN end of the power management circuit and the VOUT end of the Apple female socket interface, the power supply device also includes a control chip, the first pin of the control chip is connected to the DATA end of the Apple female socket interface, and the second pin of the control chip is connected to the gate of the second switch MOS tube.

[0010] Among them, a preferred solution is: the second pin of the control chip is connected to the gate of the second switch MOS tube through a third resistor, and the second pin of the control chip is also connected to the VIN terminal of the power management circuit through a fourth resistor.

[0011] Among them, the preferred solution is: the VIN end of the power management circuit is connected to the gate of the second switch MOS tube through a second diode, and the VIN end of the power management circuit is directly connected to the source of the second switch MOS tube, and the drain of the second switch MOS tube is connected to the VOUT end of the Apple female socket interface; and a fifth resistor is connected in parallel between the drain and source of the second switch MOS tube.

[0012] Among them, the preferred solution is: the first pin of the control chip is connected to the DATA end of the Apple female socket interface through the sixth resistor, the first pin of the control chip is connected to the GND end through the third diode, the cathode of the third diode is connected to the first pin of the control chip and the sixth resistor, and the anode of the third diode is connected to the GND end; wherein, the gate of the first switch MOS tube is connected to the node between the sixth resistor and the DATA end of the Apple female socket interface.

[0013] Among them, a preferred solution is: the VDD_C pin of the control chip is connected to the GND terminal through the second capacitor, and the VDDH pin of the control chip is connected to the GND terminal through the third capacitor.

[0014] Among them, the preferred solution is: the power management circuit includes a power management module and a fast charging protocol module.

[0015] The beneficial effect of the present invention is that, compared with the prior art, the first CC terminal of the power management circuit of the present invention and the second CC terminal of the Apple female socket interface are directly connected to the GND terminal due to the conduction of the first switch MOS tube Q2, generating a low-level signal. The power management circuit obtains the insertion signal through the first CC terminal of the P2 terminal, that is, the Apple female socket interface is inserted by the device interface of the external electronic device, thereby waking up or triggering the power management circuit to work normally, and outputting electric energy to the outside through the VIN terminal of the power management circuit, so that the VOUT terminal of the Apple female socket interface supplies power to the external electronic device. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0017] Figure 1 This is a circuit diagram of the utility model's plug-in wake-up power supply device;

[0018] Figure 2 This is a circuit diagram of the power supply device based on the control chip of the utility model;

[0019] Figure 3 This is a schematic diagram of the circuit principle of the power management circuit of the utility model. DETAILED DESCRIPTION

[0020] Now, in conjunction with the accompanying drawings, the preferred embodiments of the present utility model will be described in detail.

[0021] like Figure 1 and Figure 2 As shown, the utility model provides a preferred embodiment of a power supply device.

[0022] A power supply device for insertion wake-up includes a power management circuit 100 and an Apple female socket interface 200, and also includes an insertion wake-up circuit 300. The VIN terminal of the power management circuit 100 is connected to the VOUT terminal of the Apple female socket interface 200, and the first CC terminal of the power management circuit 100 is connected to the second CC terminal of the Apple female socket interface 200. The Apple female socket interface 200 also includes a DATA terminal. The insertion wake-up circuit 300 includes a first switch MOS tube Q2, the gate of the first switch MOS tube Q2 is connected to the DATA terminal, and the drain and source of the first switch MOS tube Q2 are respectively connected to the second CC terminal and the GND terminal of the Apple female socket interface 200.

[0023] Specifically, the power management circuit 100 is provided with a P2 terminal that is arranged in conjunction with the Apple female socket interface 200. The VIN end of the P2 terminal is connected to the VOUT end of the Apple female socket interface 200 serving as the P1 terminal. The first CC end of the power management circuit 100 is connected to the second CC end of the Apple female socket interface 200. The Apple female socket interface 200 also includes a DATA end. The insertion wake-up circuit 300 includes a first switch MOS tube Q2. The gate of the first switch MOS tube Q2 is connected to the DATA end. The drain and source of the first switch MOS tube Q2 are respectively connected to the second CC end and the GND end of the Apple female socket interface 200. The normal working conditions are as follows: when the device interface of the external electronic device is inserted into the Apple female socket interface 200, the device interface of the electronic device generates a certain voltage for the DATA end of the Apple female socket interface 200, thereby realizing the conduction of the first switch MOS tube Q2. At this time, the first CC end of the power management circuit 100 and the second CC end of the Apple female socket interface 200 are directly connected to the GND end due to the conduction of the first switch MOS tube Q2, generating a low-level signal. The power management circuit 100 obtains the insertion signal through the first CC end of the P2 terminal, that is, the Apple female socket interface 200 is inserted by the device interface of the external electronic device, thereby waking up or triggering the power management circuit 100 to work normally, and outputting electric energy to the outside through the VIN end of the power management circuit 100, so that the VOUT end of the Apple female socket interface 200 supplies power to the external electronic device.

[0024] Among them, the first CC end of the power management circuit 100 is 2 pins, the second CC end of the Apple female socket interface 200 is 7 pins, the DATA end of the Apple female socket interface 200 is 4 pins, the VIN end of the power management circuit 100 is 1 pin, and the VOUT end of the Apple female socket interface 200 is 5 pins.

[0025] In this embodiment, in the wake-on-insertion circuit 300, the first MOS switch Q2 is preferably an NMOS transistor. An NMOS transistor conducts when its gate is at a high level (|VGS| > Vt) and disconnects when its gate is at a low level, thus controlling the connection to ground. Specifically, the gate of the first MOS switch Q2 is connected to the DATA terminal. When an external device is plugged in, a voltage signal is generated at the DATA terminal, causing the gate voltage to exceed the drain voltage, turning on the first MOS switch Q2. The drain of the first MOS switch Q2 is connected to the second CC terminal, and the source is connected to the GND terminal.

[0026] In this embodiment, a first resistor R5 is connected in series between the second CC terminal of the Apple female socket interface 200 and the drain of the first switch MOS tube Q2. The node between the drain of the first switch MOS tube Q2 and the first resistor R5 is connected to the metal shell 400 of the Apple female socket interface 200, and the source of the first switch MOS tube Q2 is connected to the GND terminal.

[0027] The first resistor R5 provides current limiting protection, limiting the current passing through the first MOS switch Q2 to prevent excessive current from damaging the first MOS switch Q2 or other circuit components. When an external device is plugged in, a large current may flow through the circuit instantaneously. The first resistor R5 can act as a current limiter to protect the circuit. The first resistor R5 also stabilizes voltage, helping to stabilize the drain voltage of the first MOS switch Q2 and prevent voltage fluctuations from affecting the normal operation of the circuit.

[0028] In the metal housing 400 connected to the Apple female connector 200, when an external device is inserted, the second CC terminal and the first CC terminal can also be grounded through the metal housing 400 through the connection with the metal housing 400, providing a direct grounding path. Even if the insertion wake-up circuit 300 or other circuit components fail, the metal housing 400 can still ensure the grounding of the device. Of course, when there is a problem with the connection between the metal housing 400 and the circuit board, the second CC terminal and the first CC terminal can be grounded after the insertion of the wake-up circuit 300, so as to prevent the connection between the metal housing 400 and the circuit board from failing due to metal deformation or other reasons during long-term use.

[0029] In this embodiment, a first diode D1 and a second resistor R1 are connected in series between the DATA end of the Apple female socket interface 200 and the gate of the first switch MOS tube Q2, and the cathode of the first diode D1 is connected to the second resistor R1, and the anode of the first diode D1 is connected to the DATA end; wherein, the cathode of the first diode D1 is also connected to the GND end through the first capacitor C1.

[0030] The first diode D1 provides reverse voltage protection, preventing reverse voltage from damaging the gate of the first MOS switch Q2. When the voltage at the DATA terminal is lower than the cathode voltage of the first diode D1, the first diode D1 is cut off, protecting the gate of the first MOS switch Q2. The first diode D1 also provides unidirectional conduction, ensuring that current can only flow from the DATA terminal to the gate of the first MOS switch Q2 and not in the reverse direction, preventing unnecessary current flow from affecting normal circuit operation.

[0031] The second resistor R1 functions as a current limiter. By limiting the current flowing through the first diode D1 and into the gate of the first MOS switch Q2, it prevents excessive current from damaging the gate of the first MOS switch Q2. This ensures that the first MOS switch Q2 operates within its normal operating range, extending its service life and improving circuit reliability. The second resistor R1 also functions as a voltage divider within the circuit, ensuring that the gate voltage of the first MOS switch Q2 remains within a reasonable range. The voltage drop across the second resistor R1 can be used to adjust the gate voltage of the first MOS switch Q2, ensuring that it operates at an appropriate level.

[0032] The first capacitor C1 functions as a filter. It and the second resistor R1 form an RC filter circuit, which removes high-frequency noise from the DATA-terminal signal and provides a more stable voltage signal to the gate of the first MOS switch Q2. This improves the circuit's anti-interference capability and ensures that the first MOS switch Q2 operates in a clean signal environment. The first capacitor C1 also functions as a voltage stabilizer, helping to stabilize the voltage at the gate of the first MOS switch Q2, preventing sudden voltage changes from affecting the operating state of the first MOS switch Q2. This provides a short-term voltage buffer, smoothing voltage changes and ensuring stable on and off conditions for the first MOS switch Q2.

[0033] like Figure 2 As shown, the present invention provides a preferred embodiment of the control chip U1.

[0034] A second switch MOS tube Q1 is also provided between the VIN end of the power management circuit 100 and the VOUT end of the Apple female socket interface 200. The drain and source of the second switch MOS tube Q1 are respectively connected to the VIN end of the power management circuit 100 and the VOUT end of the Apple female socket interface 200. The power supply device also includes a control chip U1. The first pin SDQ of the control chip U1 is connected to the DATA end of the Apple female socket interface 200, and the second pin SCL of the control chip U1 is connected to the gate of the second switch MOS tube Q1.

[0035] Specifically, the gate of the second switch MOS transistor Q1 is connected to the second pin SCL of the control chip U1, the source is connected to the VIN terminal of the power management circuit 100, and the drain is connected to the VOUT terminal of the Apple motherboard interface 200. When the second pin SCL of the control chip U1 outputs a signal, the gate voltage of the second switch MOS transistor Q1 is less than the source voltage, and the second switch MOS transistor Q1 is turned on. When the second switch MOS transistor Q1 is turned on, the power energy at the VIN terminal of the power management circuit 100 is transferred to the VOUT terminal of the Apple motherboard interface 200 through the second switch MOS transistor Q1, powering the connected electronic device. Conversely, when the second pin SCL of the control chip U1 does not output a signal, the gate voltage of the second switch MOS transistor Q1 has no voltage, or does not meet the conduction condition, and the second switch MOS transistor Q1 is turned off. When the second switch MOS transistor Q1 is turned off, the VOUT terminal of the Apple motherboard interface 200 is left floating, preventing the Apple motherboard interface 200 from turning black or even being damaged due to a short circuit or incorrect contact.

[0036] Regarding the working condition of the control chip U1, the first pin SDQ of the control chip U1 is connected to the DATA terminal of the Apple female connector 200, the second pin SCL is connected to the gate of the second switch MOS tube Q1, and the other pins are connected to the power supply and ground (such as VDD, GND, etc.) to ensure its normal power supply and operation. The working principle is as follows:

[0037] 1. When an external device is plugged into Apple female connector 200, the DATA terminal generates a signal that is transmitted to the SDQ pin of control chip U1. Control chip U1 detects the signal change on the SDQ pin and determines the external device's insertion status. 2. Based on the detected signal, control chip U1 controls the gate voltage of second MOS switch Q1 via the SCL pin, turning on second MOS switch Q1.

[0038] Of course, the second switch MOS tube Q1 can be used as a PMOS tube or an NMOS tube according to the specific circuit, so as to set different control conditions for turning on or off, and is preferably a PMOS tube.

[0039] Among them, the SDQ pin and the SCL pin are usually used for communication and control pins. The SDQ pin is a Single-Wire Data Line and is usually used for a single-wire communication protocol. The SCL pin is a Serial Clock Line and is usually used for a clock signal line in an I2C (Inter-Integrated Circuit) communication protocol.

[0040] In this embodiment, the external electronic device is preferably an Apple electronic device or other electronic device. When inserted into the Apple female socket interface 200, it performs handshake communication with the control chip U1 through the DATA terminal. At this time, the control chip U1 performs protocol identification on the external electronic device. If it is identified as an Apple electronic device or an electronic device that can be identified and can be charged and communicated, the control chip U1 successfully communicates with the external electronic device and controls the second switch MOS tube Q1 to turn on through the SCL pin, thereby realizing the power supply operation. More specifically, an implementable solution is provided: 1. Device insertion: an external Apple device is inserted into the Apple female socket interface 200, a signal is generated at the DATA end, and the signal is transmitted to the control chip U1 through the SDQ pin; 2. Handshake communication starts: the control chip U1 detects the signal change on the SDQ pin, starts handshake communication with the Apple device, and the control chip sends a specific handshake signal sequence to the Apple device; 3. Protocol identification: after receiving the handshake signal, the Apple device sends its protocol identification information (such as device ID, protocol version, etc.) back to the control chip U1, and the control chip U1 receives and analyzes this information to confirm that the device is an Apple device; 4. Communication success confirmation: the control chip U1 confirms that the protocol identification information of the Apple device is correct, the handshake communication is successful, and the control chip U1 is ready to perform power supply operations.

[0041] In this embodiment, the second pin SCL of the control chip U1 is connected to the gate of the second switch MOS transistor Q1 through the third resistor R3, and the second pin SCL of the control chip U1 is also connected to the VIN terminal of the power management circuit 100 through the fourth resistor R4.

[0042] The third resistor R3 provides current limiting protection and stabilizes the gate drive signal, preventing damage to the circuit caused by excessive current and transient voltage. The fourth resistor R4 acts as a pull-up resistor to prevent the SCL pin from floating, ensuring that the SCL pin remains in a known state when no drive signal is present, thereby preventing false triggering of the MOS transistor Q1. The third and fourth resistors R3 and R4 work together to ensure reliable drive and control of the second switch MOS transistor Q1.

[0043] Furthermore, the VIN terminal of the power management circuit 100 is connected to the gate of the second switch MOS tube Q1 through the second diode D2, and the VIN terminal of the power management circuit 100 is directly connected to the source of the second switch MOS tube Q1, and the drain of the second switch MOS tube Q1 is connected to the VOUT terminal of the Apple female socket interface 200; and a fifth resistor R2 is connected in parallel between the drain and source of the second switch MOS tube Q1.

[0044] The second diode D2 prevents reverse current from flowing into the gate of the second MOS switch Q1, protecting the gate drive circuit and the gate of the second MOS switch Q1 from excessive voltage, ensuring that the gate voltage remains within a safe range. The fifth resistor R2 serves as the startup resistor for the second MOS switch Q1, ensuring stability during startup, preventing drain floating, and providing a discharge path to prevent excessive drain voltage, thereby protecting other components in the circuit.

[0045] The second diode D2 is preferably a TVS (Transient Voltage Suppressor) diode, also known as an avalanche breakdown diode. TVS diodes are primarily used in circuits to absorb and suppress transient voltage spikes, preventing these spikes from damaging other sensitive components in the circuit. When a transient high voltage appears in the circuit, the TVS diode quickly turns on, clamping the overvoltage to a safe level and thus protecting the circuit.

[0046] In this embodiment, the first pin SDQ of the control chip U1 is connected to the DATA end of the Apple female socket interface 200 through the sixth resistor R7, and the first pin SDQ of the control chip U1 is connected to the GND end through the third diode D3. The cathode of the third diode D3 is connected to the first pin SDQ of the control chip U1 and the sixth resistor R7, and the anode of the third diode D3 is connected to the GND end; wherein, the gate of the first switch MOS tube Q2 is connected to the node between the sixth resistor R7 and the DATA end of the Apple female socket interface 200.

[0047] The sixth resistor R7 is used for current limiting protection, signal adjustment and level matching to ensure that the signal transmitted from the DATA end of the Apple female connector 200 to the control chip U1 and the gate of the first switch MOS tube Q2 is stable and reliable. The third diode D3 provides reverse voltage protection, electrostatic discharge protection and transient voltage protection to ensure that the control chip U1 and other circuit components are protected from damage by excessive voltage and static electricity; wherein, the third diode D3 is preferably a TVS (Transient Voltage Suppressors) diode. The connection position of the gate of the first switch MOS tube Q2, by connecting the gate to the node between the sixth resistor R7 and the DATA end, enables the first switch MOS tube Q2 to respond quickly according to the DATA end signal, while performing current limiting and signal adjustment through the sixth resistor R7 to protect the MOS tube and the control chip U1.

[0048] Furthermore, the VDD_C pin of the control chip U1 is connected to the GND terminal via the second capacitor C2, and the VDDH pin of the control chip U1 is connected to the GND terminal via the third capacitor C3.

[0049] The VDD_C pin is usually used to provide power for the core part of the control chip (such as the internal logic circuit), and the VDDH pin is usually used to provide power for the high-voltage part of the control chip (such as the I / O interface or the drive circuit). The second capacitor C2 and the third capacitor C3 both function as filters to filter out high-frequency noise and transient interference in the power supply, ensuring that the power pins of the control chip obtain a clean and stable voltage. In addition, it prevents voltage fluctuations on the power line from affecting the power pins of the control chip and reduces noise and interference. In addition, when the power supply voltage changes rapidly, C2 and C3 can provide transient current to help stabilize the voltage and ensure stable operation of the control chip.

[0050] like Figure 3 As shown, the present invention provides a preferred embodiment of a power management circuit 100 .

[0051] The power management circuit 100 includes a power management module 102 and a fast charging protocol module 103 .

[0052] The power management module 102 is the core part of the power supply device, responsible for controlling the distribution, conversion and monitoring of power to ensure the safety and efficiency of the equipment. Specific working methods: 1. Convert the input power or the power of the battery 101 into the voltage energy required by the external device; 2. Achieve voltage stability and ensure the stability of the output voltage through the voltage stabilization circuit; 3. Achieve current limitation to prevent excessive current from damaging the device; 4. Achieve power distribution and reasonably distribute power to different circuit parts; 5. Power monitoring, monitor the power status, such as voltage, current and temperature. Since the power management circuit 100 is a conventional and mature circuit, it only needs to output the required power through the VIN terminal of the P2 terminal, and the external device insertion status can be obtained through the first CC terminal, thereby realizing the corresponding insertion wake-up function.

[0053] The power management circuit 100 also includes a fast charging protocol module 103, which is responsible for communicating with external devices to achieve fast charging. This includes: protocol identification, identifying whether the connected device supports the fast charging protocol; communication handshake, communicating with the device to confirm charging parameters; power adjustment, adjusting the output power according to device requirements; safety protection, monitoring temperature and voltage during fast charging to ensure safety. Therefore, the power management circuit 100 is not the protection core of the present invention. Any circuit that can be used with the P2 terminal to achieve the corresponding function can be used as the power management circuit 100 described in the present invention.

[0054] Provide a specific solution for the power management module 102:

[0055] The power management module 102 converts the input power or the power of the battery 101 into the voltage required by the external device, and outputs stable power through the VIN end of the P2 terminal to meet the power demand of the external device.

[0056] Insertion wake-up is achieved through the first CC terminal. The power management module 102 obtains the insertion status of the external device through the first CC terminal. When the insertion of the external device is detected, the power management module 102 wakes up the corresponding circuit part and prepares to provide power to the device.

[0057] The fast charging protocol module 103 is responsible for communicating with external devices to achieve fast charging, either directly or through the power management module 102. The fast charging protocol module 103 identifies whether the connected device supports the fast charging protocol. Through the P2 terminal, the fast charging protocol module 103 can detect the insertion of an external device and identify the fast charging protocol type of the device.

[0058] The fast charge protocol module 103 communicates with the device to confirm the charging parameters. Through the P2 terminal, the fast charge protocol module 103 performs handshake communication with the external device to confirm the charging voltage and current parameters required by the device. Power adjustment can also be performed to adjust the output power according to the device requirements. The fast charge protocol module 103 adjusts the voltage and current of the power output from the P2 terminal through the power management module 102 to meet the fast charging requirements of the external device.

[0059] Among them, the fast charging protocol module 103 can directly perform fast charging protocol communication through the P2 terminal, or it can indirectly establish a communication connection with the P2 terminal through the power management module 102.

[0060] In the present utility model, a preferred embodiment of a mobile power supply is provided.

[0061] The power supply device is the internal circuit of the mobile power supply, and the power supply is realized externally through the mobile power supply battery 101. As a portable power supply device, the core of the mobile power supply is that the battery 101 is set inside, and the power supply is realized externally through the mobile power supply battery 101.

[0062] The above description is only the best embodiment of the present invention and is not intended to limit the scope of the present invention. All equivalent changes or modifications made within the scope of the patent application of the present invention are covered by the present invention.

Claims

1. A power supply device capable of being woken up upon insertion, characterized in that: include: A power management circuit and an Apple female socket interface, wherein the VIN terminal of the power management circuit is connected to the VOUT terminal of the Apple female socket interface, and the first CC terminal of the power management circuit is connected to the second CC terminal of the Apple female socket interface; Insert the wake-up circuit, the Apple female socket interface also includes a DATA terminal, the insert wake-up circuit includes a first switch MOS tube, the gate of the first switch MOS tube is connected to the DATA terminal, and the drain and source of the first switch MOS tube are respectively connected to the second CC terminal and GND terminal of the Apple female socket interface.

2. The power supply device according to claim 1, wherein: A first resistor is connected in series between the second CC terminal of the Apple female socket interface and the drain of the first switch MOS tube. The node between the drain of the first switch MOS tube and the first resistor is connected to the metal shell of the Apple female socket interface, and the source of the first switch MOS tube is connected to the GND terminal.

3. The power supply device according to claim 1 or 2, characterized in that: A first diode and a second resistor are connected in series between the DATA end of the Apple female socket interface and the gate of the first switch MOS tube, and the cathode of the first diode is connected to the second resistor, and the anode of the first diode is connected to the DATA end; wherein, the cathode of the first diode is also connected to the GND end through a first capacitor.

4. The power supply device according to claim 1, wherein: A second switch MOS tube is also arranged between the VIN end of the power management circuit and the VOUT end of the Apple female socket interface. The drain and source of the second switch MOS tube are respectively connected to the VIN end of the power management circuit and the VOUT end of the Apple female socket interface. The power supply device also includes a control chip. The first pin of the control chip is connected to the DATA end of the Apple female socket interface, and the second pin of the control chip is connected to the gate of the second switch MOS tube.

5. The power supply device according to claim 4, wherein: The second pin of the control chip is connected to the gate of the second switch MOS tube through a third resistor, and the second pin of the control chip is also connected to the VIN terminal of the power management circuit through a fourth resistor.

6. The power supply device according to claim 4 or 5, characterized in that: The VIN terminal of the power management circuit is connected to the gate of the second switch MOS tube through a second diode, and the VIN terminal of the power management circuit is directly connected to the source of the second switch MOS tube, and the drain of the second switch MOS tube is connected to the VOUT terminal of the Apple female socket interface; and a fifth resistor is connected in parallel between the drain and source of the second switch MOS tube.

7. The power supply device according to claim 4, wherein: The first pin of the control chip is connected to the DATA end of the Apple female socket interface through the sixth resistor, and the first pin of the control chip is connected to the GND end through the third diode. The cathode of the third diode is connected to the first pin of the control chip and the sixth resistor, and the anode of the third diode is connected to the GND end; wherein, the gate of the first switch MOS tube is connected to the node between the sixth resistor and the DATA end of the Apple female socket interface.

8. The power supply device according to claim 7, wherein: The VDD_C pin of the control chip is connected to the GND terminal through the second capacitor, and the VDDH pin of the control chip is connected to the GND terminal through the third capacitor.

9. The power supply device according to claim 1, wherein: The power management circuit includes a power management module and a fast charging protocol module.

10. A mobile power supply, characterized in that: The mobile power supply comprises the power supply device according to any one of claims 1 to 9.

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