Multi-phase interleaving converter system based on BUCK

Abstract

The utility model relates to the field of electrical control, in particular to a BUCK-based multi-phase interleaving converter system, which comprises a current loop, a signal conditioning module and a controller module, the controller module is connected to a circuit topology structure in a current loop through an mos driving module in the signal conditioning module; the circuit topological structure is formed by connecting a plurality of single-phase BUCK converters in parallel; the method is used for solving the problems that a single-phase BUCK converter is large in ripple coefficient, weak in dynamic response capability and unstable in system. Through a circuit topological structure, the ripple coefficient is effectively reduced, and the stability of the system is improved; three different conduction control modes are executed through the signal conditioning module so as to ensure the performance exertion of the converter; a master-slave current sharing control algorithm is executed through the signal conditioning module, so that balanced distribution of current and reduction of noise are realized; inductive current ripples, inductance, capacitance and resistance operation are processed through the controller, so that the stability and efficiency of power supply are improved.

Description

Technical Field

[0001] The utility model relates to the field of electrical control, and more specifically, to a multi-phase interleaved converter system based on BUCK. Background Art

[0002] With the rapid advancement of technology, modern high-performance computer systems face higher computing loads and more complex operating environments. This is especially true in cutting-edge fields such as cloud computing, big data, and artificial intelligence. High-performance CPUs, GPUs, and DSP processors place increasingly stringent demands on power supply stability and efficiency. To meet the high integration density and component density of integrated circuit transistors while simultaneously reducing power consumption and heat generation, low-voltage, high-current power supplies are the preferred choice for these chips.

[0003] To meet these requirements, this proposal proposes a four-phase interleaved parallel buck converter. This converter utilizes an STM32F334 microcontroller as its core controller, incorporating high-end current and voltage sensing, along with a high-current gate driver chip. This multiphase converter utilizes interleaved parallel technology to effectively reduce ripple and improve system stability. The system utilizes three different control modes for light, medium, and heavy loads to ensure optimal converter performance. A master-slave current-sharing algorithm is employed within each phase module to achieve balanced current distribution and reduce noise. This proposal aims to further investigate the application of multiphase interleaved parallel buck converters in modern high-performance computer systems, aiming to improve the stability and efficiency of their power supply. Utility Model Content

[0004] The present invention aims to overcome at least one defect (shortcoming) of the above-mentioned prior art and provide a multi-phase interleaved converter system based on BUCK to solve the problems of large ripple coefficient, weak dynamic response capability and system instability of single-phase BUCK converter.

[0005] The technical solution adopted by the present invention is to provide a multi-phase interleaved converter system based on BUCK, which includes: a current loop, a signal conditioning module and a controller module. The current loop provides a stable voltage for the controller module after step-down conversion of the input voltage through the signal conditioning module. The current loop feeds back the real-time monitoring and usage of the output voltage to the controller module in the form of an analog signal through the signal conditioning module; the controller module is connected to a circuit topology structure in the current loop through a MOS driver module in the signal conditioning module; the circuit topology structure is formed by multiple single-phase BUCK converters connected in parallel, and the multiple single-phase BUCK converters use the same operating frequency, and the adjacent two phases are staggered in sequence with a fixed phase angle, and operate in a cyclic interleaved working mode.

[0006] It is beneficial to achieve rapid response to load changes in a short period of time through the circuit topology, effectively reduce voltage fluctuations and noise, disperse the load to effectively reduce power loss, and provide system reliability and stability; provide stable power output through the current loop, process signals and execute control algorithms through the signal conditioning module, transmit signals between the current loop and the controller module, maintain extremely high efficiency and low ripple, avoid loop control competition, process operations through the controller module, and issue alarms for abnormal status.

[0007] Furthermore, the controller module includes a single-chip microcomputer, a buzzer and an LED, the signal conditioning module includes a current detection component and a voltage detection component, the single-chip microcomputer sends a signal to the MOS driver module, receives feedback analog signals from the current detection component and the voltage detection component, and when the single-chip microcomputer is in an abnormal state, it will issue an audible and visual alarm through the buzzer and LED indication.

[0008] It is beneficial to detect the use status of the current loop in real time through the current detection component and the voltage detection component and provide timely feedback, perform calculation control through the single-chip microcomputer, and issue sound and light alarm indications through the buzzer and LED.

[0009] Furthermore, the multi-phase inductor current ripple generated by the circuit topology is shown in Formula (5). Assuming that the number of phases of the multi-phase power supply is N,

[0010]

[0011] is the current voltage; is the duty cycle; is the switching cycle; is the inductance;

[0012] At this time, the ratio of multi-phase current ripple to single-phase current ripple is set to G, and its calculation formula is shown in formula (6). It can be seen that as the number of phases N increases, the ripple gradually decreases;

[0013]

[0014] In an N-phase power supply, the ripple exists when the power modules of each phase are staggered by 360° / N and the duty cycle at the load end is a multiple of 1 / N. The theoretical ripple value is zero.

[0015] It is beneficial to reduce the multi-phase current ripple through the circuit topology structure, so as to achieve the system stability effect of low voltage, high current and low ripple.

[0016] Furthermore, the model of the single-chip microcomputer is STM32F334, which is used to process signals and execute control algorithms. The control algorithm includes a conduction mode algorithm, which includes three stages: FCCM mode is adopted under light load state, BCM mode is adopted under medium load state, and CCM mode is adopted under heavy load mode. The inductor current of the three control modes maintains continuous flow throughout the entire switching cycle. The judgment of different load states adopts a hysteresis control algorithm. The effective value of the inductor current is detected by the signal conditioning module, and a threshold is added to the set point for judgment.

[0017] It is beneficial to execute the conduction mode algorithm through a specific type of microcontroller to avoid the voltage ripple and harmonics generated in the DCM mode. Dividing the control method into three stages is beneficial to electromagnetic compatibility requirements and can adjust to load changes more quickly, thereby improving the dynamic performance of the system.

[0018] Furthermore, the control algorithm also includes a multi-phase current sharing control algorithm, which designates a single-phase BUCK converter as a master module and the remaining single-phase BUCK converters as slave modules. The master module operates according to a normal control loop, and the slave modules perform current sharing compensation based on the current of the master module.

[0019] This helps prevent uneven current distribution from causing overheating of a phase power module, which in turn shortens its service life, as well as abnormal noise and vibration that increase electromagnetic interference to the surrounding area. It also improves the system's fault tolerance and effectively balances performance and computing power costs.

[0020] Furthermore, the reference voltage of the main module is Vref, and the output voltage is V0. After passing through the voltage error amplifier, a voltage error signal Ve is generated, which is compared with the feedback voltage signal Vi1, and the switch tube is driven to work by controlling the Vc1 voltage; after the slave module compares with the feedback voltage signal Vi2 in the form of a follower, the switch tube is driven to work by controlling the Vc2 voltage, thereby realizing current sharing between the slave module and the main module.

[0021] It is beneficial to realize a dual closed-loop control system for sampling current and voltage feedback signals through a multi-phase current sharing control algorithm.

[0022] Furthermore, the input and output capacitors in each single-phase BUCK converter are composed of polarized and non-polarized capacitors with different capacitance values. The polarized capacitors are solid capacitors, and the non-polarized capacitors are multilayer ceramic capacitors. The capacitance calculation formula is as shown in formula (7):

[0023]

[0024] is the output current; is the output voltage; is the change value of current and voltage; is the switching frequency; is the current voltage.

[0025] It is beneficial to control the capacitance value through the capacitance calculation formula to shorten the response time to sudden load changes.

[0026] Furthermore, the inductor in each single-phase BUCK converter is selected as an integrated molded inductor with an inductance value of 15uH, and the calculation formula is as shown in formula (8)

[0027]

[0028] is the output current; is the output voltage; is the switching frequency.

[0029] It is beneficial to control the inductance value through the inductance calculation formula to shorten the response time to sudden load changes.

[0030] Furthermore, the power switch tube in each single-phase buck converter uses an N-channel power MOSFET, model NTMFS5C430NL, whose main performance parameters are: Vdss = 40V, Idss = 200A (25°C), Rdson = 1.4mΩ, Qg = 15nC; the MOSFET is connected in parallel with an RC snubber snubber circuit, the capacitor in the RC snubber snubber circuit is CADD, and the resistance value is calculated as shown in formula (9),

[0031]

[0032] is the measured value of the switch node oscillation frequency, The resistor package is 0805 or 1206.

[0033] It is beneficial to control the resistance value through the resistance calculation formula to reduce the high-frequency oscillation of the switch node.

[0034] Furthermore, the MOS driver module adopts the UCC27211 pre-driver chip; the voltage sampling of the voltage detection component adopts the operational amplifier chip 1M321, and the current sampling of the current detection component adopts the ina240 high-end current sampling chip.

[0035] It is helpful to match the selection of various components in the system with specific chip models to improve the stability of the system.

[0036] Compared with the existing technology, the beneficial effects of the present invention are: through the circuit topology structure, the ripple coefficient is effectively reduced and the stability of the system is improved; three different conduction control modes are executed through the signal conditioning module to ensure the performance of the converter; the master-slave current sharing control algorithm is executed through the signal conditioning module to achieve balanced current distribution and noise reduction; the controller processes the calculation of inductor current ripple, inductance, capacitance, and resistance to improve the stability and efficiency of the power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 This is a schematic diagram of the multi-phase BUCK converter system of the present invention.

[0038] Figure 2 This is a schematic diagram of the four-phase synchronous BUCK topology structure of the present utility model.

[0039] Figure 3 This is a schematic diagram of the derivation of the driving signal and capacitor voltage of the single-phase BUCK converter of the present invention.

[0040] Figure 4 This is the current ripple simulation waveform diagram of V0=24V, Vi=18V of the utility model.

[0041] Figure 5 These are the four control modes in the power converter of the present utility model.

[0042] Figure 6 This is a schematic diagram of the dead time of the control signal of the switch tube of the present invention.

[0043] Figure 7 This is a prototype of the four-phase synchronous BUCK converter of the present utility model.

[0044] Figure 8 This is the voltage waveform diagram of the experimental 2A to 20A of the utility model.

[0045] Figure 9 This is the voltage waveform diagram of the experimental 20A to 2A of the present utility model. DETAILED DESCRIPTION

[0046] The drawings in this utility model are for illustrative purposes only and are not to be construed as limiting the scope of this utility model. To better illustrate the following embodiments, some components in the drawings may be omitted, enlarged, or reduced in size, and do not represent the actual dimensions of the products. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted from the drawings.

[0047] Example

[0048] The voltage reduction process of the single-phase BUCK power stage topology in this embodiment is as follows: Figure 3As shown, first the switch is turned on, the power supply and input capacitor provide current to the load through the inductor, while charging the inductor and output capacitor. At this time, the diode is in the reverse cutoff state; then the switch is turned off, the inductor and capacitor provide power to the load, and the current forms a loop through the diode. When the converter reaches steady state, the capacitor current when the switch is turned on can be calculated using the capacitor ampere-second balance method.

[0049]

[0050] When the switch is turned off, the capacitor current is as follows:

[0051]

[0052] According to the charge and discharge characteristics of the capacitor, the change in capacitor voltage ΔVc, that is, the voltage ripple at the load end, can be expressed as:

[0053]

[0054] The inductor current ripple can be expressed as:

[0055]

[0056] A multiphase Buck converter is composed of multiple single-phase Buck converters connected in parallel. It uses multi-phase technology, also known as carrier interleaving. This technology connects each working module in parallel, uses the same operating frequency, and interleaves the adjacent two phases in sequence with a fixed phase angle, ultimately forming a cyclic interleaved operating mode.

[0057] Multiphase Buck converters offer numerous advantages. First, they can quickly respond to load changes, effectively reducing voltage fluctuations and noise. Second, they offer excellent energy efficiency optimization and thermal management. By distributing the load, they can effectively reduce power losses. Multiphase Buck converters also offer excellent fault tolerance. If one phase fails, the other phases can still operate normally, improving system reliability and stability.

[0058] The multi-phase buck is not a simple parallel connection of input and output, but requires the following technical points: phase control, circuit current sharing, response to sudden load changes, loop control competition, and component selection. Its topology is as follows Figure 2 shown.

[0059] Power supply ripple is generated by the switching action of the power module. In a multi-phase power supply, each phase power module has its own switching and control loop. When these modules work in parallel with a certain phase difference, the ripple they generate also has a certain phase difference. When they are combined together, their ripple parts will offset each other to some extent, thereby reducing the overall output ripple level. The multi-phase inductor current ripple is as follows: As shown, suppose the number of phases of the multi-phase power supply is N

[0060]

[0061] At this time, the ratio of multi-phase current ripple to single-phase current ripple is set to G, and its calculation formula is as follows: It can be seen that as the number of phases N increases, the ripple gradually decreases.

[0062]

[0063] When synchronous triggering is used, that is, the operating frequency is the same, the phase is consistent, and the load-end ripple is equal to N times the single-phase power supply ripple, then when all modules are switched on and off simultaneously, a large voltage and current shock may be generated at the switching moment, resulting in increased switching losses and exponentially increased stress on external components, thereby shortening the service life of the module.

[0064] When out-of-phase triggering is used, it is also called phase interleaving technology. In an N-phase power supply, it exists when the phases of the power modules are staggered by 360° / N, and the duty cycle at the load end is a multiple of 1 / N. For example, in the four-phase interleaved power supply designed in this system, when the duty cycle is 25%, 50%, and 75%, the ripple theoretical value is zero. Using psim simulation software, the switching frequency is simulated at 100KHz, the input voltage is 24V, the output voltage is 18V, and the simulation time is 100ms. Figure 4 shown.

[0065] like Figure 1 The hardware block diagram shows the basic components of a multiphase buck converter system. First, the power input provides the entire system with power. The filter module performs DC-DC step-down conversion from 10V to 3.3V, providing the required stable voltage. The STM32F334C8T6, the system's core controller, is responsible for processing various signals and executing control algorithms. It connects to the power topology via a MOSFET driver module, which drives the MOSFET power devices. The voltage and current detection modules monitor system usage in real time, providing analog signals back to the microcontroller system. If any abnormalities occur, an audible and visual alarm is generated via a buzzer and LED. Finally, the filter module removes most of the noise from the circuit, ensuring stable power output.

[0066] In power converters, CCM (continuous conduction mode), DCM (discontinuous conduction mode), BCM (critical conduction mode), and FCCM (forced continuous conduction mode) are common control modes, such as Figure 5 shown.

[0067] Generally speaking, as the average load current decreases, the converter automatically transitions from CCM to DCM or FCCM, but necessarily through BCM. This design considers the low ripple requirements of high-performance computers to ensure stable operation and optimal performance, thereby avoiding the voltage ripple and harmonics generated in DCM. The control method employed is divided into three stages. Under light load conditions, the system operates in FCCM. While efficiency is lower, overall power dissipation is also low due to the low on-current. Under medium load conditions, BCM maintains extremely high efficiency and low ripple. Under heavy load conditions, CCM is used, maintaining high efficiency even at higher output currents. In all three control modes employed in this design, the inductor current flows continuously throughout the switching cycle, facilitating electromagnetic compatibility (EMC) compliance and enabling faster adaptation to load changes, thereby improving the system's dynamic performance. Hysteresis control is used to determine different load states. This method detects the effective value of the inductor current and applies a threshold to the set point for determination. This method effectively addresses the competition issue in the control loop.

[0068] Because the parasitic parameters of the components in each phase of a multiphase power supply vary, as do differences in circuit board layout, their current output capabilities vary. Some modules may operate normally, while others may be overloaded or underloaded. Uneven current distribution can cause certain phase power modules to overheat, shortening their service life, increasing noise and vibration, and generating electromagnetic interference to the surrounding area.

[0069] To address the current sharing issue for multi-phase power supplies, this system uses a master-slave current sharing algorithm. This algorithm designates one module as the master and the remaining modules as slaves. The master module operates according to the normal control loop, while the slave modules compensate for current sharing based on the master's current. This current sharing algorithm also improves fault tolerance, ensuring that even if one phase fails, the remaining phases remain operational. Compared to passive and average current sharing methods, this algorithm effectively balances performance and computing power costs.

[0070] The input and output capacitors both use a combination of polarized and non-polarized capacitors with different capacitance values, which can effectively widen the frequency response range, compensate each other, and reduce the interference of noise and harmonics. Polarized capacitors use solid capacitors, which are smaller and lighter than electrolytic capacitors; they have a longer lifespan and are less prone to problems such as leakage; they have better temperature stability and frequency response, and can ensure lower ESR (equivalent series resistance) and ESL (equivalent series inductance). Non-polarized capacitors use MLCC (multilayer ceramic capacitors), which have excellent high-frequency response characteristics, can effectively filter out high-frequency interference in the circuit, have extremely low ESR characteristics, less energy loss, and have smaller size and lighter weight. The capacitance calculation formula is as follows: Assuming the input voltage ripple coefficient is 0.25, the minimum input capacitor value is 200uF. The capacitor has a negative piezoelectric effect, and the capacitance attenuation is serious. Therefore, the input capacitor uses a solid capacitor with a voltage resistance of 35V and a capacitance of 470uF, plus X7R, 10uF and 0.1uF MLC. The output capacitor uses a solid capacitor with a voltage resistance of 35V and a capacitance of 220uF, plus X7R, 10uF and X7R, 0.1uF MLC.

[0071]

[0072] The inductor adopts an integrated molded inductor. Compared with flat copper wire inductors and magnetic ring inductors, it is smaller and lighter. Due to the pressing process, the leakage magnetic field is very small, which optimizes the EMI performance. In addition, the integrated molded inductor has a high Q value and excellent high-frequency characteristics. The calculation formula of the inductor value is as follows: , so the minimum inductance is 12uH. To improve conversion efficiency, the inductor's power dissipation should be less than 2W, so the DCR (DC equivalent resistance) should be no greater than 10mΩ. Inductors also experience skin effect at high frequencies, generating eddy current losses and core losses. This margin should be left when selecting the inductor. Therefore, a molded inductor with a 2213 package (220mm wide, 120mm high), a DCR of 5.7mΩ, and an inductance of 15uH was selected.

[0073]

[0074] The power switch tube uses MOSFET. Compared with triode, MOSFET usually has lower on-resistance, which is beneficial to reduce on-resistance. MOSFET can operate at a higher switching frequency, up to 2MHz, which is very important for applications requiring high efficiency. The driving circuit of MOSFET is relatively simple, while triode and IGBT require more complex driving circuit to control the base or gate current. In the buck converter, the voltage switching stress of both the upper and lower tubes is , a 30% margin should be left for the withstand voltage. This design uses an N-channel power MOSFET from ON Semiconductor, model NTMFS5C430NL. Its main performance parameters are: Vdss = 40V, Idss = 200A (25°C), Rdson = 1.4mΩ, and Qg = 15nC.

[0075] Driver Circuit Design Analysis: MOS pre-driver chips are high-frequency high-side / low-side drivers specifically designed for driving N-channel MOSFETs in half-bridge configurations. This system uses the TI (Texas Instruments) UCC27211 pre-driver chip. These chips offer high peak drive current output, capable of sinking 4A and sourcing 4A, making them suitable for driving high-power MOSFETs, particularly during the MOSFET's Miller plateau transition. Compared to other pre-driver chips, their built-in 120V fast-recovery diode effectively reduces layout complexity and size.

[0076] Design Analysis of Voltage and Current Sampling: The voltage sampling circuit uses the LM321 operational amplifier chip from Texas Instruments. This voltage follower structure has high input impedance and low output impedance. This structure also acts as a buffer, providing a certain current output capability. Current sampling chips are amplifiers specifically designed for current sensing. Because the inductor current needs to be sampled, high common-mode voltage requirements are high. This design uses the TI ina240 high-end current sampling chip. It is capable of suppressing large common-mode voltage transients (ΔV / Δt). Its zero-drift architecture, 400 kHz -3dB bandwidth, and high-gain options ensure measurement accuracy. The current sampling resistors are alloy resistors, offering ultra-low temperature drift and enhanced stability. Kelvin connections are used to further minimize lead effects. Common-mode and differential-mode filter capacitors are added to effectively suppress high-frequency noise interference on the circuit board.

[0077] Due to the physical properties of semiconductors, MOSFETs have a reverse-parallel parasitic diode. Taking the MOSFET used in this system as an example, the diode conduction voltage is 0.81V and the reverse recovery time is 61ns, while the Schottky diode conduction voltage is 0.3V and the reverse conduction time is zero, which can further reduce the conduction loss and switching loss. By connecting a Schottky diode in parallel with the switch tube, in the dead time t2-t3, Figure 6As shown, at this point, the current forms a loop through the inductor and Schottky diode. The voltage across the MOSFET is clamped to 0.3V by the Schottky diode, nearly satisfying the zero-voltage switching (ZVS) condition. This characteristic significantly reduces switching losses and lowers the voltage and current slew rate during switching, thereby improving EMI performance. During the dead time, the output capacitor acts as the converter's freewheeling power source, so ZVS imposes a certain amount of current stress on the output capacitor. However, due to the multi-phase interleaved parallel connection technology, during the dead time of one phase of the converter, another phase is always conducting, significantly reducing this current stress.

[0078] In a synchronous Buck converter, when the MOSFET is turned on and off, the switch node SW will generate high-frequency oscillations due to its own parasitic inductance and capacitance, as well as the parasitic inductance and capacitance parameters of the PCB traces. Excessive oscillations will increase losses and aggravate EMI interference. This design uses an RC snubber buffer circuit. Since the oscillation frequency is related to the PCB, it needs to be measured in practice. First, without adding an RC snubber circuit, measure the switch node oscillation waveform to determine the oscillation frequency; then, connect a capacitor CADD with appropriate capacitance in parallel between the switch node and GND to halve the oscillation frequency. At this time, the capacitance of the capacitor in the RC filter is CADD, and the resistance value is calculated as follows: Since the RC snubber circuit will bring additional losses, the resistor package should be 0805 or 1206.

[0079]

[0080] Based on the above calculation and analysis of system circuit parameters, a four-phase interleaved parallel Buck converter prototype was built. Figure 7 The test was performed using a Bufan SS-3033KD DC regulated power supply, a Puyuan DS1102E oscilloscope, and a Uni-T UTL8211 load meter.

[0081] In the converter's constant voltage mode and the load meter's constant current mode, the converter system input voltage was set at 24V, and the load was maintained at a stable 10A. The output voltages were set to 5V, 10V, 15V, and 20V, respectively. The test results are shown in Table 1. The error indicates that, for a constant load, as the output voltage increases, the absolute value of the error gradually increases, but the error percentage gradually decreases. Analysis of multiple sets of experimental data shows that the output voltage conversion accuracy remains within a ±1% error range.

[0082] Table 1 Output voltage accuracy

[0083]

[0084] When the load was stable at 10A, the current values ​​of each phase converter were measured simultaneously. The test results are shown in Table 2. It can be seen that the error between the first phase current value and the average value of the total output current before current sharing is the largest, at +0.392A, with a deviation rate as high as 15.7%. The variance of the current values ​​of each phase can be calculated to be 0.272 before current sharing and 0.009 after current sharing. This shows that the addition of the current sharing algorithm can effectively reduce the variability of the converter phases, but the average current error and the current sharing value of each phase still have certain errors.

[0085] Table 2 Comparison of currents in each phase

[0086]

[0087] Load step test, set the converter system input voltage to 24V, output voltage to 5V, initial current to 2A, steady-state current to 20A, current rise rate to 100A / ms. Figure 8 It can be seen that the average undershoot is 0.3V, the average overcharge is 0.8V, the overshoot is about 16%, and the adjustment time is less than 1.5ms. The initial current is set to 20A, the steady-state current is 2A, and the current drop rate is 100A / ms. Figure 9 As can be seen, the average undershoot is 0.6V, the average overcharge is 0.3V, the overshoot is approximately 6%, and the settling time is approximately 3ms. This shows that the converter maintains a voltage deviation of no more than 1V and a settling time of no more than 5ms when the load changes. While the voltage ripple increases when the load current increases, the output voltage will exhibit some deviation due to the resistance of the wires connecting the load.

[0088] Obviously, the above embodiments of the present invention are merely examples for the purpose of clearly illustrating the technical solution of the present invention, and are not intended to limit the specific implementation methods of the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the claims of the present invention shall be included within the scope of protection of the claims of the present invention.

Claims

1. A multi-phase interleaved converter system based on BUCK, characterized in that: include: A current loop, a signal conditioning module, and a controller module. The current loop provides a stable voltage for the controller module after stepping down the input voltage through the signal conditioning module. The current loop also feeds back the real-time monitoring and usage of the output voltage to the controller module in the form of an analog signal through the signal conditioning module. The controller module is connected to a circuit topology structure in the current loop through a MOS driver module in the signal conditioning module. The circuit topology structure is formed by connecting multiple single-phase buck converters in parallel. The multiple single-phase buck converters use the same operating frequency, and adjacent phases are staggered at fixed phase angles in sequence, operating in a cyclically staggered operating mode.

2. The multi-phase interleaved converter system based on BUCK according to claim 1, characterized in that: The controller module includes a single-chip microcomputer, a buzzer and an LED; the signal conditioning module includes a current detection component and a voltage detection component; the single-chip microcomputer sends a signal to the MOS driver module and receives feedback analog signals from the current detection component and the voltage detection component; when an abnormal state occurs in the single-chip microcomputer, an audible and visual alarm is issued through a buzzer and an LED.

3. The multi-phase interleaved converter system based on BUCK according to claim 1, characterized in that: The multi-phase inductor current ripple generated by the circuit topology is shown in Equation (5). Assuming the number of phases of the multi-phase power supply is N, is the current voltage; is the duty cycle; is the switching cycle; is the inductance; At this time, the ratio of multi-phase current ripple to single-phase current ripple is set to G, and its calculation formula is shown in formula (6). It can be seen that as the number of phases N increases, the ripple gradually decreases; In an N-phase power supply, the ripple exists when the power modules of each phase are staggered by 360° / N and the duty cycle at the load end is a multiple of 1 / N. The theoretical ripple value is zero.

4. The multi-phase interleaved converter system based on BUCK according to claim 2, characterized in that: The single-chip microcomputer is an STM32F334, which is used to process signals and execute control algorithms. The control algorithm includes a conduction mode algorithm, which includes three stages: FCCM mode is adopted under light load conditions, BCM mode is adopted under medium load conditions, and CCM mode is adopted under heavy load conditions. The inductor current in the three control modes maintains continuous flow throughout the entire switching cycle. A hysteresis control algorithm is used to judge different load states. The effective value of the inductor current is detected by a signal conditioning module, and a threshold is added to the set point for judgment.

5. The multi-phase interleaved converter system based on BUCK according to claim 4, characterized in that: The control algorithm also includes a multi-phase current sharing control algorithm, which designates a single-phase BUCK converter as a master module and the remaining single-phase BUCK converters as slave modules. The master module operates according to the normal control loop, and the slave modules perform current sharing compensation based on the current of the master module.

6. The multi-phase interleaved converter system based on BUCK according to claim 5, characterized in that: The reference voltage of the master module is Vref, and the output voltage is V0. After passing through the voltage error amplifier, a voltage error signal Ve is generated, which is compared with the feedback voltage signal Vi1, and the switch tube is driven to work by controlling the Vc1 voltage; the slave module is compared with the feedback voltage signal Vi2 in the form of a follower, and the switch tube is driven to work by controlling the Vc2 voltage, thereby realizing current sharing between the slave module and the master module.

7. The multi-phase interleaved converter system based on BUCK according to claim 1, characterized in that: The input and output capacitors in each single-phase BUCK converter are a combination of polarized and non-polarized capacitors with different capacitance values. The polarized capacitors are solid capacitors, and the non-polarized capacitors are multilayer ceramic capacitors. The capacitance calculation formula is as shown in formula (7): is the output current; is the output voltage; is the change value of current and voltage; is the switching frequency; is the current voltage.

8. The multi-phase interleaved converter system based on BUCK according to claim 1, characterized in that: The inductor in each single-phase buck converter is an integrated inductor with an inductance of 15uH. The calculation formula is as follows: is the output current; is the output voltage; is the switching frequency.

9. The multi-phase interleaved converter system based on BUCK according to claim 1, characterized in that: The power switch tube in each single-phase buck converter uses an N-channel power MOSFET, model NTMFS5C430NL, with the following main performance parameters: Vdss = 40V, Idss = 200A (25°C), Rdson = 1.4mΩ, Qg = 15nC; the MOSFET is connected in parallel to an RC snubber circuit, the capacitor in the RC snubber circuit is CADD, and the resistance value is calculated as shown in formula (9): is the measured value of the switch node oscillation frequency, The resistor package is 0805 or 1206.

10. The multi-phase interleaved converter system based on BUCK according to claim 2, characterized in that: The MOS driver module adopts the UCC27211 pre-driver chip; the voltage sampling of the voltage detection component adopts the operational amplifier chip 1M321, and the current sampling of the current detection component adopts the ina240 high-end current sampling chip.

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