Driving circuit with fast rise time

Abstract

The utility model discloses a drive circuit with fast rise time, which relates to the field of repetition frequency high-voltage pulse power supplies, and comprises a control signal unit used for transmitting a signal to a primary side of an isolation transformer, and the isolation transformer carries out electricity-magnetism-electricity conversion on a control signal and outputs the control signal to a drive unit; the beneficial effects of the utility model are that the energy storage capacitors C3 and C4 are arranged, so that an energy release path is shortened, and a faster opening signal rising edge can be generated; the triode Q1 is arranged to delay conduction, so that the leakage inductance limitation of the isolation transformer can be relieved, and the conduction or turn-off speed of the switch is improved; a resistance adjusting method is adopted, and the resistance value of R2 in the driving circuit is changed, so that the dead zone time is controllably adjusted; when the discharge switch tube Sdi is switched off, even if interference pulses exist, the MOS tube M2 can firmly clamp the grid electrode of the discharge switch tube Sdi at-10V, and the anti-electromagnetic interference performance of the drive circuit is improved.

Description

Technical Field

[0001] The utility model relates to the field of heavy-frequency high-voltage pulse power supplies, in particular to a driving circuit with a fast rise time. Background Art

[0002] The output amplitude, operating frequency, and pulse width of a fully solid-state Marx pulse generator are primarily limited by the MOSFET driver module. The driver module's voltage isolation level, drive capability, response speed, synchronization performance, and anti-interference capability are key indicators of the generator's output capability. The magnetic isolation drive solution utilizes magnetic field coupling to simultaneously transmit drive signals and energy, eliminating the need for an additional isolated power supply module. The isolation voltage is determined by the insulation capacity of the primary and secondary windings.

[0003] Due to the existence of the isolation transformer leakage inductance, the rising / falling edge of the driving pulse is slow, resulting in a slower rise time of the high-voltage pulse output by the solid-state Marx, which needs to be improved. Utility Model Content

[0004] The purpose of the present invention is to provide a driving circuit with a fast rise time to solve the problems raised in the above background technology.

[0005] To achieve the above objectives, the present invention provides the following technical solutions:

[0006] A driving circuit with fast rise time, comprising:

[0007] The control signal unit is used to transmit the signal to the primary side of the isolation transformer. The isolation transformer converts the control signal into electric-magnetic-electrical and outputs it to the drive unit.

[0008] The drive unit is used to receive the control signal output by the secondary side of the isolation transformer and charge the energy storage capacitor in the drive circuit. When the positive turn-on signal comes, the signal first charges the energy storage capacitor of the drive circuit, triggering the PMOS tube to turn on. After the PMOS is turned on, the energy storage capacitor discharges and outputs a 15V positive voltage turn-on signal. When the negative turn-off signal comes, the negative voltage signal charges the energy storage capacitor, triggering the NOMS to turn on, and generating a -10V negative voltage turn-off signal.

[0009] There are two drive units with the same structure, which respectively obtain two control signals with opposite polarities from the primary side of the isolation transformer. The two drive units respectively control the conduction of the charging switch tube Sci and the discharging switch tube Sdi;

[0010] The control signal unit is connected to the primary side of the isolation transformer, and the secondary side of the isolation transformer is connected to the drive unit.

[0011] As a further solution of the present invention: the driving unit includes a diode D1, a diode D2, a diode D3, a resistor R1, a capacitor C1, a resistor R2, a resistor R4, a diode DA1, a diode DA2, a diode DA3, a diode DA4, a capacitor C3, a capacitor C4, a MOS tube M1, a MOS tube M2, a capacitor C2, a resistor R5, a resistor R6, a resistor R3, a transistor Q1, a diode D4, a diode D5, and a diode D6. The positive electrode of the diode D1 is connected to one end of the secondary side of the isolation transformer, one end of the resistor R4, the emitter of the transistor Q1, and one end of the resistor R3. The positive electrode of the diode D2 is connected to the other end of the secondary side of the isolation transformer and the negative electrode of the diode D6. The negative electrode of the diode D1 is connected to the positive electrode of the diode D3, one end of the resistor R2, one end of the resistor R1, one end of the capacitor C1, and the G pole of the MOS tube M1. The negative electrode of the diode D2 is connected to the negative electrode of the diode D3, one end of the capacitor C3, the diode DA The cathode of transistor Q3 is connected to the cathode of transistor 3, the other end of resistor R1, the other end of capacitor C1, and the S electrode of MOS transistor M1. The D electrode of MOS transistor M1 is connected to the D electrode of MOS transistor M2, one end of capacitor C2, and one end of resistor R5. The other end of capacitor C2 is connected to the other end of resistor R5 and one end of resistor R6. The other end of resistor R6 is connected to the other end of capacitor C3, one end of capacitor C4, the cathode of diode DA4, and the anode of diode DA3. The other end of resistor R4 is connected to the cathode of diode DA1. The anode of diode DA1 is connected to the cathode of diode DA2 and the G electrode of MOS transistor M2. The S electrode of MOS transistor M2 is connected to the anode of diode DA2, the anode of diode DA4, the other end of capacitor C4, the anode of diode D6, the anode of diode D5, and the anode of diode D4. The cathode of diode D5 is connected to the collector of transistor Q1 and the other end of resistor R2. The cathode of diode D4 is connected to the other end of resistor R3 and the base of transistor Q1.

[0012] Compared with the prior art, the beneficial effects of the present invention are as follows: the present invention provides two energy storage capacitors C3 and C4, shortens the energy release path, and can generate a faster rising edge of the turn-on signal; provides a delayed turn-on link of the transistor Q1, which can alleviate the leakage inductance limitation of the isolation transformer and improve the turn-on or turn-off speed of the switch; adopts a resistance adjustment method to controllably adjust the dead time by changing the resistance value of R2 in the drive circuit; during the disconnection period of the discharge switch tube Sdi, even if there is an interference pulse, the MOS tube M2 can firmly clamp the gate of the discharge switch tube Sdi at -10V, thereby improving the anti-electromagnetic interference performance of the drive circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 The figure is a circuit diagram of a driving circuit with a fast rise time.

[0014] Figure 2The circuit diagram shows the current flowing through the working process of a driving circuit with a fast rise time. DETAILED DESCRIPTION

[0015] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0016] See also Figure 1 , a driving circuit with a fast rise time, comprising:

[0017] The control signal unit is used to transmit the signal to the primary side of the isolation transformer. The isolation transformer converts the control signal into electric-magnetic-electrical and outputs it to the drive unit.

[0018] The drive unit is used to receive the control signal output by the secondary side of the isolation transformer and charge the energy storage capacitor in the drive circuit. When the positive turn-on signal comes, the signal first charges the energy storage capacitor of the drive circuit, triggering the PMOS tube to turn on. After the PMOS is turned on, the energy storage capacitor discharges and outputs a positive voltage turn-on signal. When the negative turn-off signal comes, the negative voltage signal charges the energy storage capacitor, triggering the NOMS to turn on, and generating a negative voltage turn-off signal.

[0019] There are two drive units with the same structure, which respectively obtain two control signals with opposite polarities from the primary side of the isolation transformer. The two drive units respectively control the conduction of the charging switch tube Sci and the discharging switch tube Sdi;

[0020] The control signal unit is connected to the primary side of the isolation transformer, and the secondary side of the isolation transformer is connected to the drive unit;

[0021] The driving unit includes a diode D1, a diode D2, a diode D3, a resistor R1, a capacitor C1, a resistor R2, a resistor R4, a diode DA1, a diode DA2, a diode DA3, a diode DA4, a capacitor C3, a capacitor C4, a MOS tube M1, a MOS tube M2, a capacitor C2, a resistor R5, a resistor R6, a resistor R3, a transistor Q1, a diode D4, a diode D5, and a diode D6. The positive electrode of the diode D1 is connected to one end of the secondary side of the isolation transformer, one end of the resistor R4, the emitter of the transistor Q1, and one end of the resistor R3. The positive electrode of the diode D2 is connected to the other end of the secondary side of the isolation transformer and the negative electrode of the diode D6. The negative electrode of the diode D1 is connected to the positive electrode of the diode D3, one end of the resistor R2, one end of the resistor R1, one end of the capacitor C1, and the G pole of the MOS tube M1. The negative electrode of the diode D2 is connected to the negative electrode of the diode D3, one end of the capacitor C3, the negative electrode of the diode DA3, and the resistor R The other end of resistor R6 is connected to the other end of capacitor C3, one end of capacitor C4, the cathode of diode DA4, and the anode of diode DA3. The other end of resistor R4 is connected to the cathode of diode DA1, the anode of diode DA1 is connected to the cathode of diode DA2, and the G electrode of MOS transistor M2. The S electrode of MOS transistor M2 is connected to the anode of diode DA2, the anode of diode DA4, the other end of capacitor C4, the anode of diode D6, the anode of diode D5, and the anode of diode D4. The cathode of diode D5 is connected to the collector of transistor Q1 and the other end of resistor R2. The cathode of diode D4 is connected to the other end of resistor R3 and the base of transistor Q1.

[0022] In this example: See Figure 1 After the PMOS in the driving unit is turned on, the energy storage capacitor discharges and outputs a 15V turn-on voltage signal; the NOMS is turned on and generates a -10V negative voltage turn-off signal.

[0023] In a specific embodiment, the power circuit topology of an all-solid-state Marx pulse generator is essentially fixed. However, maximizing its output power, operating frequency, and output pulse waveform quality remains a core research direction. The output amplitude, operating frequency, and pulse width of a high-frequency all-solid-state Marx pulse generator are primarily limited by the MOSFET driver module. The driver module's voltage isolation rating, drive capability, response speed, synchronization performance, and anti-interference capabilities are crucial factors in determining the generator's output capability.

[0024] The existing technology has the following problems:

[0025] (1) The transformer core in magnetic isolation drive is limited by the volt-second product, and the drive pulse width output by the isolation transformer is limited.

[0026] (2) The isolation transformer has leakage inductance, and the rising / falling edge of the driving pulse is slow, which causes the rise time of the high-voltage pulse output by the solid-state Marx to slow down.

[0027] (3) When the gate of Sdi is subjected to an interference voltage pulse, the interference voltage pulse passes through the diode, MOSFET, transformer secondary side, and diode back to the source. Since the loop through which the interference pulse flows is long and the inductance of the transformer secondary side in the loop is large, the interference voltage pulse cannot return to the source immediately. If the interference voltage pulse exceeds the turn-on threshold of Sdi, Sdi will be turned on unexpectedly. The pulse source has high dv / dt and di / dt when working, and the electromagnetic interference is serious. If the structure is a half-bridge or full-bridge pulse source, the charging and discharging tubes will be turned on at the same time, causing the switch tube to be directly short-circuited and damaged.

[0028] To address the above-mentioned problems, the present invention not only ensures that the maximum pulse width of the drive signal is not limited by the saturation of the magnetic core, but also introduces a delayed turn-on circuit. The output pulse of the transformer first charges the capacitor, which then charges the main switch gate, thereby accelerating the rising edge of the drive pulse. It also provides a low-impedance path to firmly clamp the turn-off voltage at -10V, thereby improving the drive circuit's ability to suppress electromagnetic interference caused by high-frequency and high-voltage pulses in the power circuit.

[0029] In this example: See Figure 2 , a driving method with a fast rise time, comprising the following steps:

[0030] Step 1: The positive pulse charges capacitors C3 and C4;

[0031] Step 2, MOS tube M1 is turned on with a delayed delay;

[0032] Step 3, outputting a positive voltage conduction signal;

[0033] Step 4: Negative pulse charges capacitors C3 and C4;

[0034] Step 5: MOS tube M1 is turned off (quickly), and MOS tube M2 is turned on with a lag;

[0035] Step 6, outputting a negative voltage conduction signal;

[0036] Step 7: MOS tube M2 is turned off (quickly).

[0037] In this example: See Figure 2In (a), in step 1, the control signal unit generates a positive pulse and couples it to the secondary side TX1 of the isolation transformer. Capacitors C3 and C4 are charged through a loop formed by the secondary side TX1 of the isolation transformer, diode D2, diode D4, and resistor R3. Diodes DA3 and DA4 are 15V and 10V Zener diodes, respectively, which can clamp the charging voltage of capacitors C3 and C4 to the regulated value.

[0038] The control signal unit generates a positive pulse and couples it to the secondary side TX1 of the isolation transformer. The upper end of the secondary side TX1 of the isolation transformer, the diode D2, the capacitor C3, the capacitor C4, the diode D4, the resistor R3, and the lower end of the secondary side TX1 of the isolation transformer form a complete loop.

[0039] In this example: See Figure 2 In step (b) of FIG5 , in step 2, due to the current flowing through resistor R3, a voltage is generated across resistor R3. This voltage is applied to the gate-source capacitance of transistor Q1 to charge it. When the voltage exceeds the conduction threshold of transistor Q1, transistor Q1 is turned on. Therefore, while step 1 is being performed, the positive pulse charges capacitors C3 and C4 via diode D2, diode D5, and transistor Q1, and charges capacitor C1 via diode D2, resistor R2, and transistor Q1. This creates a voltage difference between the G and S electrodes of MOS transistor M1, causing MOS transistor M1 to be turned on with a delayed turn-on.

[0040] In the charging circuit of capacitors C3 and C4, the upper end of the secondary side TX1 of the isolation transformer, diode D2, capacitor C3, capacitor C4, diode D5, transistor Q1, and the lower end of the secondary side TX1 of the isolation transformer form a complete circuit;

[0041] In the capacitor C1 charging circuit, the upper end of the secondary side TX1 of the isolation transformer, the diode D2, the capacitor C1, the resistor R2, the transistor Q1, and the lower end of the secondary side TX1 of the isolation transformer form a complete circuit.

[0042] In this example: See Figure 2 In step (c) of FIG5 , after the MOS transistor M1 is turned on, the capacitor C3 positively charges the gate-source capacitance of the charging switch transistor Sci via the MOS transistor M1, the capacitor C2, and the resistor R5, turning on the charging switch transistor Sci. Simultaneously, the positive pulse of the secondary side TX1 of the isolation transformer also positively charges the gate-source capacitance of the charging switch transistor Sci via the MOS transistor M1, the capacitor C2, and the resistor R5. Therefore, the charging switch transistor Sci can obtain a faster rise time and turn on faster.

[0043] Here, capacitor C2 and resistor R5 are connected in parallel. Through the voltage supply of capacitor C3 and the positive pulse voltage supply of the secondary side TX1 of the isolation transformer, the charging switch tube Sci can obtain a faster rise time and turn on faster.

[0044] In this example: See Figure 2 In step (d), in step 4, the control signal unit generates a negative pulse and couples it to the secondary side TX1 of the isolation transformer. Capacitors C3 and C4 are charged through a loop consisting of the secondary side TX1 of the isolation transformer, diode D1, diode D3, and diode D6. Diodes DA3 and DA4 are 15V and 10V Zener diodes, respectively, which can clamp the charging voltage of capacitors C3 and C4 at the regulated value.

[0045] The control signal unit generates a negative pulse and couples it to the secondary side TX1 of the isolation transformer. The lower end of the secondary side TX1 of the isolation transformer, diode D1, diode D3, capacitor C3, capacitor C4, diode D6, and the upper end of the secondary side TX1 of the isolation transformer form a complete loop.

[0046] In this example: See Figure 2 In step (e), in step 5, due to the conduction of diode D3, the charge on capacitor C1 and the gate-source capacitance of MOS transistor M1 is discharged (quickly via loop ①), and MOS transistor M1 is (quickly) turned off. Simultaneously, the negative pulse charges the gate-source capacitance of MOS transistor M2 via the loop formed by resistor R4, diode DA1, and diode D6, turning on MOS transistor M2. Diode DA1 is a 5V voltage regulator diode that suppresses negative voltage disturbances from positive or negative pulse control signals. Only a negative voltage signal greater than -5V can break through diode DA1 and charge the gate of MOS transistor M2. The typical turn-on threshold voltage of MOS transistor M2 is 1.6V. Therefore, MOS transistor M2 will only turn on when the negative voltage signal is greater than -6.6V. Therefore, diode DA1 can delay the turn-on time of MOS transistor M2 and prevent MOS transistors M1 and M2 from turning on at the same time. Diode DA2 is a 15V voltage regulator diode that is used to limit the gate-source voltage of MOS transistor M2.

[0047] Circuit ① Figure 2 As shown in (e), the charge on capacitor C1 and the gate-source capacitance of MOS transistor M1 is rapidly discharged, causing MOS transistor M1 to be quickly turned off. Loop ① specifically consists of capacitor C1 and the gate-source capacitance of MOS transistor M1, diode D3, capacitor C1, and the gate-source capacitance of MOS transistor M1.

[0048] In this example: See Figure 2 In step (f), after the MOS transistor M2 is turned on, the gate capacitance of the charging switch transistor Sci discharges to the energy storage capacitor C4 via the capacitor C2, the resistor R5, and the MOS transistor M2. The gate voltage of the charging switch transistor Sci drops (rapidly) to -10V, causing the charging switch transistor Sci to be (quickly) turned off. Since there is no discharge loop for the gate charge of the MOS transistor M2, it remains in the on state. The capacitor C4 can continuously apply a negative turn-off voltage between the gate and source of the charging switch transistor Sci.

[0049] There is no discharge loop for the gate charge of the MOS tube M2, so it always remains in the on state, avoiding the false triggering of the charging switch tube Sci.

[0050] In this example: See Figure 2 In (g), in step 7, when the positive pulse of the next working cycle arrives, the potential at the emitter of the transistor Q1 is negative, the gate-source charge of the MOS tube M2 is discharged (quickly through loop ②), and the MOS tube M2 is (quickly) disconnected.

[0051] Circuit ② Figure 2 As shown in (g), the charge at the gate and source of MOS transistor M2 rapidly leaks, causing MOS transistor M1 to quickly turn off. Loop ② specifically consists of the gate and source of MOS transistor M2, diode DA1, resistor R4, the secondary side of the isolation transformer TX1, diode D2, capacitor C3, capacitor C4, and the gate and source of MOS transistor M2.

[0052] The utility model is provided with two energy storage capacitors C3 and C4, which shorten the energy release path and can generate a faster rising edge of the turn-on signal; the transistor Q1 is provided with a delayed turn-on link, which can alleviate the leakage inductance limitation of the isolation transformer and improve the turn-on or turn-off speed of the switch; a resistance adjustment method is adopted to controllably adjust the dead time by changing the resistance value of R2 in the drive circuit; during the disconnection period of the discharge switch tube Sdi, even if there is an interference pulse, the MOS tube M2 can firmly clamp the gate of the discharge switch tube Sdi at -10V, thereby improving the anti-electromagnetic interference performance of the drive circuit.

[0053] It is obvious to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential features of the present invention. Therefore, the embodiments should be considered in all respects as exemplary and non-restrictive.

[0054] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A driving circuit with a fast rise time, characterized in that: The driver circuit with fast rise time includes: The control signal unit is used to transmit the signal to the primary side of the isolation transformer. The isolation transformer converts the control signal into electric-magnetic-electrical and outputs it to the drive unit. The drive unit is used to receive the control signal output by the secondary side of the isolation transformer and charge the energy storage capacitor in the drive circuit. When the positive turn-on signal comes, the signal first charges the energy storage capacitor of the drive circuit, triggering the PMOS tube to turn on. After the PMOS is turned on, the energy storage capacitor discharges and outputs a 15V positive voltage turn-on signal. When the negative turn-off signal comes, the negative voltage signal charges the energy storage capacitor, triggering the NOMS to turn on, and generating a -10V negative voltage turn-off signal. There are two drive units with the same structure, which respectively obtain two control signals with opposite polarities from the primary side of the isolation transformer. The two drive units respectively control the conduction of the charging switch tube Sci and the discharging switch tube Sdi; The control signal unit is connected to the primary side of the isolation transformer, and the secondary side of the isolation transformer is connected to the drive unit.

2. The driving circuit with fast rise time according to claim 1, wherein: The driving unit includes a diode D1, a diode D2, a diode D3, a resistor R1, a capacitor C1, a resistor R2, a resistor R4, a diode DA1, a diode DA2, a diode DA3, a diode DA4, a capacitor C3, a capacitor C4, a MOS tube M1, a MOS tube M2, a capacitor C2, a resistor R5, a resistor R6, a resistor R3, a transistor Q1, a diode D4, a diode D5, and a diode D6. The positive electrode of the diode D1 is connected to one end of the secondary side of the isolation transformer, one end of the resistor R4, the emitter of the transistor Q1, and one end of the resistor R3. The positive electrode of the diode D2 is connected to the other end of the secondary side of the isolation transformer and the negative electrode of the diode D6. The negative electrode of the diode D1 is connected to the positive electrode of the diode D3, one end of the resistor R2, one end of the resistor R1, one end of the capacitor C1, and the G pole of the MOS tube M1. The negative electrode of the diode D2 is connected to the negative electrode of the diode D3, one end of the capacitor C3, the negative electrode of the diode DA3, and the resistor R The other end of resistor R6 is connected to the other end of capacitor C3, one end of capacitor C4, the cathode of diode DA4, and the anode of diode DA3. The other end of resistor R4 is connected to the cathode of diode DA1, the anode of diode DA1 is connected to the cathode of diode DA2, and the G electrode of MOS transistor M2. The S electrode of MOS transistor M2 is connected to the anode of diode DA2, the anode of diode DA4, the other end of capacitor C4, the anode of diode D6, the anode of diode D5, and the anode of diode D4. The cathode of diode D5 is connected to the collector of transistor Q1 and the other end of resistor R2. The cathode of diode D4 is connected to the other end of resistor R3 and the base of transistor Q1.

Images