ADC preceding-stage single-ended-to-differential driving circuit

Abstract

The utility model relates to the technical field of driving circuits, in particular to an ADC (Analog to Digital Converter) preceding-stage single-ended to differential driving circuit, which comprises a proportional operation circuit, a reverse operation amplification circuit and an anti-aliasing filter, the proportional operation circuit comprises a signal input end P1, a resistor RG, a resistor RF, a capacitor C1, an amplifier A1 and a first voltage division circuit used for providing reference voltage for the amplifier A1, and the reverse operation amplification circuit comprises a resistor R1, a resistor R2, an amplifier A2 and a second voltage division circuit used for providing reference voltage for the amplifier A2. The anti-aliasing filter comprises a resistor R9, a resistor R10, a capacitor C4 and a capacitor C5. According to the utility model, through the single-ended-to-differential driving circuit composed of the two operational amplifiers, the peripheral resistors, the peripheral capacitors and the like, processing such as following, amplification or attenuation, filtering, differential conversion and the like can be carried out on the amplitude of an input signal, the signal conditioning is realized, the ADC is adapted, and the application scene is wide.

Description

Technical Field

[0001] The utility model relates to the technical field of drive circuits, in particular to an ADC front-stage single-ended to differential drive circuit. Background Art

[0002] Analog-to-digital converters (ADCs) typically incorporate a signal processing circuit, called a driver circuit, at the signal input for signal acquisition. This data acquisition using an ADC presents challenges, such as the large amplitude range of the target signal and its single-ended nature, while the ADC input range is limited. Furthermore, due to the strong interference resistance of differential signals, most ADCs utilize differential inputs.

[0003] However, the existing differential drive circuit cannot amplify, attenuate, filter, or perform other processing on the amplitude of the single-ended target signal, resulting in the target signal not being within the ADC acquisition range. That is, the signal cannot be conditioned to adapt to the ADC, which limits the application scenarios of the differential drive circuit. Utility Model Content

[0004] In view of this, the purpose of the present invention is to propose an ADC pre-stage single-ended to differential drive circuit to solve the problem that the existing drive circuit cannot amplify, attenuate, filter, etc. the amplitude of the single-ended target signal, resulting in the single-ended target signal being difficult to be within the acquisition range of the ADC.

[0005] Based on the above objectives, the present invention provides an ADC pre-stage single-ended to differential drive circuit, which includes a proportional operation circuit, an inverse operational amplifier circuit, and an anti-aliasing filter. The proportional operation circuit includes a signal input terminal P1, a resistor RG, a resistor RF, a capacitor C1, an amplifier A1, and a voltage divider circuit 1 for providing a reference voltage for the amplifier A1. The inverse operational amplifier circuit includes a resistor R1, a resistor R2, an amplifier A2, and a voltage divider circuit 2 for providing a reference voltage for the amplifier A2. The anti-aliasing filter includes a resistor R9, a resistor R10, a capacitor C4, and a capacitor C5.

[0006] One end of the signal input terminal P1 is grounded, and the other end is connected to the resistor RG. The other end of the resistor RG is connected to the inverting input terminal of the amplifier A1. The resistor RF is connected in parallel to the inverting input terminal and the output terminal of the amplifier A1. The capacitor C1 is connected in parallel to the resistor. The first voltage divider circuit is connected to the non-inverting input terminal of the amplifier A1. One end of the resistor R1 is connected to the output terminal of the amplifier A1. The other end of the resistor R1 is connected to the inverting input terminal of the amplifier A2. The resistor R2 is connected in parallel to the inverting input terminal and the output terminal of the amplifier A2. The second voltage divider circuit is connected to the non-inverting input terminal of the amplifier A2. One end of the resistor R9 is connected to the resistor, and the other end is connected to the non-inverting input terminal of the ADC. One end of the resistor R10 is connected to the output terminal of the amplifier A2, and the other end is connected to the inverting input terminal of the ADC. The capacitors C4 and C5 are connected in series to the non-inverting input terminal and the inverting input terminal of the ADC.

[0007] Preferably, the proportional operation circuit also includes a resistor R4, and the voltage divider circuit 1 includes a resistor R5 and a resistor R7, one end of the resistor R5 is grounded, and a capacitor C2 is connected in parallel to the resistor R5, the other end of the resistor R5 is connected to one end of the resistor R4 and one end of the resistor R7, the other end of the resistor R4 is connected to the non-inverting input end of the amplifier A1, and the other end of the resistor R7 is connected to VREF.

[0008] Preferably, the reverse operational amplifier circuit also includes a resistor R3, and the second voltage divider circuit includes a resistor R6 and a resistor R8, one end of the resistor R6 is grounded, and a capacitor C3 is connected in parallel to the resistor R6, the other end of the resistor R6 is connected to one end of the resistor R3 and one end of the resistor R8, the other end of the resistor R3 is connected to the same-direction input terminal of the amplifier A2, and the other end of the resistor R8 is connected to VREF.

[0009] Preferably, the reference voltage provided by the first voltage divider circuit to the non-inverting input terminal of the amplifier A1 is VG, and the reference voltage provided by the second voltage divider circuit to the non-inverting input terminal of the amplifier A2 is VR. The calculation formulas of VG and VR are as follows:

[0010]

[0011] Preferably, the voltage inputted by the signal input terminal is the input voltage VIN, and the formulas for the voltage at the same-direction input terminal VOP and the voltage at the reverse input terminal VON of the ADC are as follows:

[0012]

[0013] The formula for the differential voltage Vdm is as follows:

[0014]

[0015] Preferably, the ratio of the resistor RF and the resistor RG is a conditioning multiple A of the input signal VIN, where different ratios can achieve three different situations: A=1, A>1, and A<1. That is, according to the formula of the differential voltage Vdm, by adjusting the resistor RF and the resistor RG, the amplitude of the input signal VIN can be amplified, attenuated, and followed.

[0016] The beneficial effects of the present invention are as follows: the present invention provides an ADC front-stage single-ended to differential drive circuit, in which the ratio of the resistor RF to the resistor RG is the conditioning multiple A of the input signal VIN, wherein different ratios can realize three different situations of A=1, A>1 and A<1. That is, according to the formula of the differential voltage Vdm, by adjusting the resistor RF and the resistor RG, the amplitude of the input signal VIN can be followed, amplified or attenuated, filtered, and converted to differential processing. At the same time, the resistor RG can be equivalent to the input impedance of the entire circuit, generally maintained at the KΩ level, and the capacitor C1 can be matched with the resistor RG and RF according to conditions such as signal bandwidth or noise.

[0017] In summary, the single-ended to differential drive circuit composed of two operational amplifiers and peripheral resistors and capacitors can amplify or attenuate the amplitude of the input signal, filter it, and perform other processing such as differential conversion, thereby achieving signal conditioning and adapting to the ADC, and has a wide range of application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 This is a schematic diagram of the circuit structure of an embodiment of the present utility model. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0021] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present invention should have the usual meanings understood by people with ordinary skills in the field to which the present invention belongs. The "first", "second" and similar words used in the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0022] like Figure 1 As shown, an ADC pre-stage single-ended to differential drive circuit includes a proportional operation circuit, an inverse operational amplifier circuit, and an anti-aliasing filter. The proportional operation circuit includes a signal input terminal P1, a resistor RG, a resistor RF, a capacitor C1, an amplifier A1, and a voltage divider circuit 1 for providing a reference voltage for the amplifier A1. The inverse operational amplifier circuit includes a resistor R1, a resistor R2, an amplifier A2, and a voltage divider circuit 2 for providing a reference voltage for the amplifier A2. The anti-aliasing filter includes a resistor R9, a resistor R10, a capacitor C4, and a capacitor C5. The anti-aliasing filter composed of the resistors R9, R10, and the capacitors C4 and C5 can be matched accordingly according to the sampling rate and signal bandwidth.

[0023] One end of the signal input terminal P1 is grounded, and the other end is connected to the resistor RG. The other end of the resistor RG is connected to the inverting input terminal of the amplifier A1. The resistor RF is connected in parallel to the inverting input terminal and the output terminal of the amplifier A1. The capacitor C1 is connected in parallel to the resistor RF. The voltage divider circuit 1 is connected to the non-inverting input terminal of the amplifier A1. One end of the resistor R1 is connected to the output terminal of the amplifier A1. The other end of the resistor R1 is connected to the inverting input terminal of the amplifier A2. The resistor R2 is connected in parallel to the inverting input terminal and the output terminal of the amplifier A2. The voltage divider circuit 2 is connected to the non-inverting input terminal of the amplifier A2. One end of the resistor R9 is connected to the resistor RF. The other end of the resistor R9 is connected to the non-inverting input terminal of the ADC. One end of the resistor R10 is connected to the output terminal of the amplifier A2. The other end of the resistor R10 is connected to the inverting input terminal of the ADC. The capacitors C4 and C5 are connected in series to the non-inverting input terminal and the inverting input terminal of the ADC.

[0024] The single-ended to differential drive circuit composed of two operational amplifiers and external resistors and capacitors can amplify or attenuate the amplitude of the input signal, filter it, and perform other processing such as differential conversion, thus achieving signal conditioning and adapting it to the ADC, and has a wide range of application scenarios.

[0025] In a preferred embodiment of the present invention, the proportional operation circuit further includes a resistor R4, and the voltage divider circuit 1 includes a resistor R5 and a resistor R7. One end of the resistor R5 is grounded, and a capacitor C2 is connected in parallel to the resistor R5. The other end of the resistor R5 is connected to one end of the resistor R4 and one end of the resistor R7. The other end of the resistor R4 is connected to the non-inverting input terminal of the amplifier A1, and the other end of the resistor R7 is connected to VREF.

[0026] In another preferred embodiment of the present invention, the reverse operational amplifier circuit also includes a resistor R3, and the second voltage divider circuit includes a resistor R6 and a resistor R8. One end of the resistor R6 is grounded, and a capacitor C3 is connected in parallel to the resistor R6. The other end of the resistor R6 is connected to one end of the resistor R3 and one end of the resistor R8. The other end of the resistor R3 is connected to the non-inverting input terminal of the amplifier A2, and the other end of the resistor R8 is connected to VREF. The capacitors C2 and C3 play a filtering role in the voltage divider circuit.

[0027] In another preferred embodiment of the present invention, the reference voltage VG provided by the first voltage divider circuit to the non-inverting input terminal of the amplifier A1 is provided, and the reference voltage VR provided by the second voltage divider circuit to the non-inverting input terminal of the amplifier A2 is provided. The calculation formulas of VG and VR are as follows:

[0028]

[0029] The voltage input to the signal input terminal is the input voltage VIN. The formulas for the voltage VOP at the same-direction input terminal and the voltage VON at the reverse input terminal of the ADC are as follows:

[0030]

[0031] The formula for the differential voltage Vdm is as follows:

[0032]

[0033] The ratio of resistor RF to resistor RG is the conditioning factor A of the input signal VIN. Different ratios can achieve three different situations: A=1, A>1, and A<1. That is, according to the formula for the differential voltage Vdm, by adjusting resistor RF and resistor RG, the amplitude of the input signal VIN can be followed (A=1), amplified (A>1), or attenuated (A<1), as well as filtered and differentially processed.

[0034] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present invention is limited to these examples. Within the scope of the present invention, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the present invention as described above, which are not provided in detail for the sake of simplicity.

[0035] The embodiments of the present invention are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An ADC pre-stage single-ended to differential drive circuit, characterized in that: The single-ended to differential drive circuit includes a proportional operation circuit, an inverse operational amplifier circuit, and an anti-aliasing filter. The proportional operation circuit includes a signal input terminal P1, a resistor RG, a resistor RF, a capacitor C1, an amplifier A1, and a voltage divider circuit 1 for providing a reference voltage for the amplifier A1. The inverse operational amplifier circuit includes a resistor R1, a resistor R2, an amplifier A2, and a voltage divider circuit 2 for providing a reference voltage for the amplifier A2. The anti-aliasing filter includes a resistor R9, a resistor R10, a capacitor C4, and a capacitor C5. One end of the signal input terminal P1 is grounded, and the other end is connected to the resistor RG. The other end of the resistor RG is connected to the inverting input terminal of the amplifier A1. The resistor RF is connected in parallel to the inverting input terminal and the output terminal of the amplifier A1. The capacitor C1 is connected in parallel to the resistor RF. The voltage divider circuit 1 is connected to the non-inverting input terminal of the amplifier A1. One end of the resistor R1 is connected to the output terminal of the amplifier A1. The other end of the resistor R1 is connected to the inverting input terminal of the amplifier A2. The resistor R2 is connected in parallel to the inverting input terminal and the output terminal of the amplifier A2. The voltage divider circuit 2 is connected to the non-inverting input terminal of the amplifier A2. One end of the resistor R9 is connected to the resistor RF, and the other end is connected to the non-inverting input terminal of the ADC. One end of the resistor R10 is connected to the output terminal of the amplifier A2, and the other end is connected to the inverting input terminal of the ADC. The capacitors C4 and C5 are connected in series to the non-inverting input terminal and the inverting input terminal of the ADC.

2. The ADC pre-stage single-ended to differential drive circuit according to claim 1, wherein: The proportional operation circuit also includes a resistor R4, and the voltage divider circuit 1 includes a resistor R5 and a resistor R7. One end of the resistor R5 is grounded, and a capacitor C2 is connected in parallel to the resistor R5. The other end of the resistor R5 is connected to one end of the resistor R4 and one end of the resistor R7. The other end of the resistor R4 is connected to the non-inverting input terminal of the amplifier A1, and the other end of the resistor R7 is connected to VREF.

3. The ADC pre-stage single-ended to differential driving circuit according to claim 2, wherein: The reverse operational amplifier circuit also includes a resistor R3, and the second voltage divider circuit includes a resistor R6 and a resistor R8. One end of the resistor R6 is grounded, and a capacitor C3 is connected in parallel to the resistor R6. The other end of the resistor R6 is connected to one end of the resistor R3 and one end of the resistor R8. The other end of the resistor R3 is connected to the non-inverting input terminal of the amplifier A2, and the other end of the resistor R8 is connected to VREF.

4. The ADC pre-stage single-ended to differential driving circuit according to claim 1, wherein: The reference voltage VG provided by the voltage divider circuit 1 to the non-inverting input terminal of the amplifier A1, and the reference voltage VR provided by the voltage divider circuit 2 to the non-inverting input terminal of the amplifier A2 are calculated as follows:

5. The ADC pre-stage single-ended to differential driving circuit according to claim 4, characterized in that: The voltage input to the signal input terminal is VIN, and the formulas for the voltage VOP at the same-direction input terminal and the voltage VON at the reverse input terminal of the ADC are as follows: The formula for the differential voltage Vdm is as follows:

6. The ADC pre-stage single-ended to differential driving circuit according to claim 5, characterized in that: The ratio of the resistor RF and the resistor RG is a conditioning multiple A of the input signal VIN, where different ratios can achieve three different situations: A=1, A>1, and A<1. That is, according to the formula of the differential voltage Vdm, by adjusting the resistor RF and the resistor RG, the amplitude of the input signal VIN can be amplified, attenuated, and followed.

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