Parallel multi-chip current-sharing high-power full-bridge SiC module
By connecting multiple chips in parallel and optimizing the substrate layout, the current imbalance and heat dissipation problems of SiC MOSFETs in parallel are solved, the reliability and switching speed of the module are improved, and different application requirements are met.
Patent Information
- Application Number
- CN202422523506.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-18
- Publication Date
- 2025-09-23
- Estimated Expiration
- 2034-10-18
AI Technical Summary
Existing SiC MOSFETs have current imbalance problems when connected in parallel, and their heat dissipation and module reliability are insufficient.
By adopting a parallel multi-chip structure, optimizing the substrate layout and gate resistor connection method, and combining insulating fillers and heat sinks, the on and off of the switching elements are controlled to achieve current sharing and reduce parasitic inductance and thermal resistance.
The power density is improved, the reliability and switching speed of the module are enhanced to meet the needs of different application conditions.
Smart Images
Figure CN223378169U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of power modules, and in particular to a high-power full-bridge SiC module with multiple parallel chips and current sharing. Background Art
[0002] Power modules are widely used in a variety of fields, including automotive, charging stations, photovoltaic power generation, wind power generation, consumer electronics, rail transit, industrial motors, energy storage, aerospace, and military applications. The booming electric vehicle market, in particular, places stringent demands on the power density and reliability of power modules, as core components of electric drive inverters.
[0003] Silicon carbide (SiC) MOSFETs currently offer numerous advantages in various applications due to their low R dson, low switching losses, high thermal conductivity, and high switching frequency. Furthermore, the positive temperature coefficient of on-resistance of SiC MOSFETs makes parallel SiC MOSFETs widely used due to their flexibility. However, current imbalance remains a major challenge when connecting SiC MOSFETs in parallel.
[0004] In summary, the focus of power modules is on effectively solving current imbalance, heat dissipation problems, and improving module reliability. Therefore, this application proposes a high-power full-bridge SiC module with parallel multi-chip current sharing. Utility Model Content
[0005] The purpose of this utility model is to address the problems of power modules in the background technology, which mainly focus on how to effectively solve the current imbalance, heat dissipation problems and improve the reliability of the module, and propose a parallel multi-chip current-sharing high-power full-bridge SiC module.
[0006] The technical solution of the utility model is as follows: a parallel multi-chip current-sharing high-power full-bridge SiC module, comprising a housing, a substrate fixed in the housing, a heat sink welded to the bottom of the substrate, a signal terminal, a power terminal and a switching element respectively mounted on the top of the substrate, the switching element respectively electrically connected to a gate resistor and a thermistor NTC welded on the substrate, a conductive metal copper layer on the front side of the substrate comprises a current input area 1 and a current input area 2, a current output area is arranged between the current input area 1 and the current input area 2, an AC output area is arranged at the bottom of the conductive metal copper layer; a Kelvin source area 1 and a gate area 1 are sequentially arranged below the current output area; a Kelvin source area 2 and a gate area 2 are arranged above the AC output area, and a thermistor area is arranged on one side of the current input area 2.
[0007] Optionally, there are three substrates, which are electrically connected in sequence. The substrates are composed of a front conductive metal copper layer, an intermediate ceramic insulating layer and a back metal copper layer connected in sequence. The switching element includes a chip, and the front conductive metal copper layer is connected to a bonding wire, one end of the bonding wire is connected to the chip.
[0008] Optionally, the intermediate ceramic insulating layer is any one of an aluminum oxide plate, a silicon nitride plate and an aluminum nitride plate.
[0009] Optionally, an insulating cover is fixedly connected to the top of the shell.
[0010] Optionally, the shell is filled with insulating filler.
[0011] Optionally, the insulating filler is a silicone gel filling layer or an epoxy resin filling layer.
[0012] Compared with the prior art, this application has at least one of the following beneficial technical effects:
[0013] The utility model can connect multiple switch elements in parallel to improve power density;
[0014] By increasing the gate resistance of the switching element, the on and off of the switching element is controlled to achieve current sharing;
[0015] By controlling the voltage of the gate resistor, the switching speed and switching time can be precisely controlled to meet different application conditions;
[0016] The utility model optimizes the layout of the substrate and adjusts the connection mode of the gate resistor to reduce the parasitic inductance and thermal resistance, thereby improving the switching rate, power output capacity and module reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 A schematic diagram of the structure of a parallel multi-chip current-sharing high-power full-bridge SiC module;
[0018] Figure 2 Schematic diagram of the structure of the insulating cover;
[0019] Figure 3 It is a schematic diagram of the position structure of the signal terminal and the insulating filler;
[0020] Figure 4 Schematic diagram of the structure of the housing, substrate and power terminals;
[0021] Figure 5 Schematic diagram of the location structure of the gate resistor;
[0022] Figure 6 Schematic diagram of the position structure of the switch element;
[0023] Figure 7 Schematic diagram of the top view of the substrate;
[0024] Figure 8 Schematic diagram of the basic structure;
[0025] Figure 9 This is a schematic diagram of the partial structural position of a parallel multi-chip current-sharing high-power full-bridge SiC module.
[0026] Figure numerals: 1. Housing; 2. Radiator; 3. Substrate; 301. Front conductive metal copper layer; 302. Intermediate ceramic insulating layer; 303. Back metal copper layer; 4. Signal terminal; 5. Power terminal; 6. Insulating cover; 7. Insulating filler; 8. Switching element; 9. Gate resistor; 10. Thermistor NTC; 11. Bonding wire; 12. Chip; 3011. Current input area 1; 3012. Current output area; 3013. Current input area 2; 3014. AC output area; 3015. Kelvin source area 1; 3016. Gate area 1; 3017. Kelvin source area 2; 3018. Gate area 2; 3019. Thermistor area. DETAILED DESCRIPTION
[0027] The technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments.
[0028] The components of the embodiments of the present invention generally described and shown in the drawings herein may be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but rather merely represents selected embodiments of the present invention.
[0029] Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative work shall fall within the scope of protection of the present invention.
[0030] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of this utility model and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0031] It should be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, article, or apparatus. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
[0032] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on the specific circumstances.
[0033] Example
[0034] like Figure 1 and Figure 7-9 As shown, the present invention proposes a parallel multi-chip current-sharing high-power full-bridge SiC module, including a housing 1, in which three substrates 3 are fixed. The three substrates 3 have a large heat dissipation area, which is conducive to reducing the junction temperature; the three substrates 3 are electrically connected in sequence, and the substrates 3 are composed of a front conductive metal copper layer 301, an intermediate ceramic insulating layer 302 and a back metal copper layer 303 connected in sequence; the switching element 8 includes a chip 12, and the front conductive metal copper layer 301 is connected to a bonding wire 11, and one end of the bonding wire 11 is connected to the chip 12.
[0035] The middle ceramic insulating layer 302 is any one of an aluminum oxide plate, a silicon nitride plate and an aluminum nitride plate.
[0036] like Figure 5 As shown, the front conductive metal copper layer 301 of the substrate 3 includes a current input area 1 3011 and a current input area 2 3013, with a current output area 3012 provided between the current input area 1 3011 and the current input area 2 3013. An AC output area 3014 is provided at the bottom of the conductive metal copper layer 301; a Kelvin source area 1 3015 and a gate area 1 3017 are provided in sequence below the current output area 3012; a Kelvin source area 2 3017 and a gate area 2 3018 are provided above the AC output area 3014, and a thermistor area is provided on one side of the current input area 2 3013.
[0037] like Figure 1-6 As shown, a heat sink 2 is welded on the bottom of the substrate 3 for heat dissipation of the entire module. Signal terminals 4, power terminals 5 and switching elements 8 are respectively installed on the top of the substrate. Multiple switching elements 8 can be connected in parallel to improve power density.
[0038] It is worth noting that an insulating cover plate 6 is fixedly connected to the top of the housing 1, and a packaging process is adopted to greatly improve the heat dissipation capacity and reliability.
[0039] Furthermore, switching element 8 is electrically connected to a gate resistor 9 and a thermistor NTC 10, both soldered to substrate 3. The addition of switching element 8 and gate resistor 9 controls the on and off state of switching element 8, achieving current sharing. By controlling the voltage across gate resistor 9, the switching speed and timing can be precisely controlled to meet diverse application requirements.
[0040] In this embodiment, the housing 1 is filled with an insulating filler 7 , which is a silicone gel filling layer or an epoxy resin filling layer.
[0041] The present invention optimizes the layout of the substrate 3 and adjusts the connection mode of the gate resistor 9 to reduce parasitic inductance and thermal resistance, thereby improving the switching rate, power output capability and module reliability.
[0042] The above specific embodiments are merely several optional embodiments of the present invention. Based on the technical solutions of the present invention and the relevant inspirations of the above embodiments, those skilled in the art may make various alternative improvements and combinations to the above specific embodiments.
Claims
1. A parallel multi-chip current-sharing high-power full-bridge SiC module, comprising a housing (1), characterized in that: A substrate (3) is fixed in the housing (1), a heat sink (2) is welded to the bottom of the substrate (3), a signal terminal (4), a power terminal (5) and a switch element (8) are respectively mounted on the top of the substrate, the switch element (8) is respectively electrically connected to a gate resistor (9) and a thermistor NTC (10) welded on the substrate (3), and a front conductive metal copper layer (301) of the substrate (3) includes a current input area 1 (3011) and a current input area 2 (3013), the current input area 1 (3011) A current output region (3012) is provided between the second current input region (3013), and an AC output region (3014) is provided at the bottom of the conductive metal copper layer (301); a Kelvin source region (3015) and a gate region (3016) are provided in sequence below the current output region (3012); a Kelvin source region (3017) and a gate region (3018) are provided above the AC output region (3014), and a thermistor region (3019) is provided on one side of the second current input region (3013).
2. A parallel multi-chip current-sharing high-power full-bridge SiC module according to claim 1, characterized in that: The number of the substrates (3) is three, and the three substrates (3) are electrically connected in sequence. The substrates (3) are composed of a front conductive metal copper layer (301), an intermediate ceramic insulating layer (302), and a back metal copper layer (303) connected in sequence. The switching element (8) includes a chip (12), and the front conductive metal copper layer (301) is connected to a bonding wire (11), and one end of the bonding wire (11) is connected to the chip (12).
3. A parallel multi-chip current-sharing high-power full-bridge SiC module according to claim 2, characterized in that: The intermediate ceramic insulating layer is an aluminum oxide plate, a silicon nitride plate and an aluminum nitride plate.
4. The parallel multi-chip current-sharing high-power full-bridge SiC module according to claim 1, characterized in that: An insulating cover plate (6) is fixedly connected to the top of the housing (1).
5. The parallel multi-chip current-sharing high-power full-bridge SiC module according to claim 1, characterized in that: The housing (1) is filled with an insulating filler (7).
6. The parallel multi-chip current-sharing high-power full-bridge SiC module according to claim 5, characterized in that: The insulating filler (7) is a silicone gel filling layer or an epoxy resin filling layer.