Solar laminated cell

By adopting a stacked structure and tunneling layer connection in perovskite silicon tandem cells, the absorption range of the solar spectrum is expanded, the problem of low photoelectric conversion efficiency is solved, and efficient photoelectric conversion and improved stability are achieved.

CN223379524UActive Publication Date: 2025-09-23SHENZHEN HIKING PV TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202422007718.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-19
Publication Date
2025-09-23
Estimated Expiration
2034-08-19

AI Technical Summary

Technical Problem

The photoelectric conversion efficiency of existing perovskite silicon tandem cells is far lower than the theoretical efficiency, and its structure needs to be optimized to improve the photoelectric conversion efficiency.

Method used

The solar tandem cell adopts a stacked structure, including a bottom cell, a middle cell and a top cell, which are connected by a tunneling layer to expand the absorption range of the solar spectrum. The band gap of the top cell perovskite absorption layer is larger than the band gap of the middle cell perovskite absorption layer, realizing effective absorption of sunlight in different bands.

Benefits of technology

It broadens the scope of sunlight utilization, improves photoelectric conversion efficiency and battery efficiency, and enhances battery stability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of batteries, and provides a solar laminated battery, which comprises a bottom battery; a first tunneling layer; the middle cell is arranged on the surface, far away from the bottom cell, of the first tunneling layer, and the middle cell comprises a middle cell hole transport layer, a middle cell perovskite absorption layer and a middle cell electron transport layer which are sequentially stacked; the second tunneling layer is arranged on one surface, far away from the bottom battery, of the middle battery; the top cell is arranged on the surface, away from the bottom cell, of the second tunneling layer, the top cell comprises a top cell hole transport layer, a top cell perovskite absorption layer, a top cell electron transport layer and a second electrode layer which are sequentially stacked, and the band gap of the top cell perovskite absorption layer is larger than that of the middle cell perovskite absorption layer. And the band gap of the top cell perovskite absorption layer is 1.9-2.1 eV. According to the solar laminated cell, the structure of the solar laminated cell is optimized, so that the technical problem of low photoelectric conversion efficiency of the solar laminated cell in the prior art is solved.
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Description

Technical Field

[0001] The present application belongs to the field of battery technology, and more specifically, relates to a solar laminate battery. Background Art

[0002] Solar cells are one of the most efficient ways to convert solar energy into electrical energy. In recent years, perovskite crystalline silicon stacking technology has become a research hotspot in the field of solar cell technology. Perovskite crystalline silicon stacking technology refers to combining perovskite solar cells and crystalline silicon solar cells through stacking to form crystalline silicon perovskite stacked cells with high photoelectric conversion efficiency and low cost.

[0003] Currently, the actual photoelectric conversion efficiency of perovskite crystalline silicon tandem cells is far lower than the theoretical effective photoelectric conversion efficiency. Therefore, it is necessary to optimize the structure of perovskite crystalline silicon tandem cells to improve their photoelectric conversion efficiency. Utility Model Content

[0004] The purpose of the present application is to provide a solar tandem cell to solve the technical problem of low photoelectric conversion efficiency of solar tandem cells in the related art.

[0005] To achieve the above objectives, the technical solutions adopted in the embodiments of the present application are:

[0006] Provided is a solar tandem cell, comprising:

[0007] The bottom cell comprises a first electrode layer, a P-type base doping layer, a base passivation layer, a silicon substrate, a base surface passivation layer and an N-type base doping layer stacked in sequence;

[0008] A first tunneling layer is provided on a side of the N-type base doping layer away from the silicon substrate;

[0009] A middle battery is provided on a side of the first tunneling layer away from the bottom battery, wherein the middle battery comprises a middle battery hole transport layer, a middle battery perovskite absorption layer, and a middle battery electron transport layer stacked in sequence;

[0010] A second tunneling layer is provided on a side of the middle cell away from the bottom cell; and

[0011] A top cell is arranged on a side of the second tunneling layer away from the bottom cell. The top cell includes a top cell hole transport layer, a top cell perovskite absorption layer, a top cell electron transport layer, and a second electrode layer stacked in sequence. The band gap of the top cell perovskite absorption layer is greater than the band gap of the middle cell perovskite absorption layer, and the band gap of the top cell perovskite absorption layer is 1.9eV-2.1eV.

[0012] In one embodiment, the band gap of the mid-cell perovskite absorption layer is 1.3 eV-1.6 eV.

[0013] In one embodiment, the top cell further comprises a top cell buffer layer, wherein the top cell buffer layer is disposed between the top cell electron transport layer and the second electrode layer; and / or

[0014] The intermediate battery further includes a intermediate battery buffer layer, and the intermediate battery buffer layer is disposed between the intermediate battery electron transport layer and the second tunneling layer.

[0015] In one embodiment, the material of the top battery buffer layer is one of zinc oxide, tin dioxide, and titanium dioxide, and the thickness of the top battery buffer layer is in the range of 0-30 nm; and / or

[0016] The material of the intermediate battery buffer layer is one of zinc oxide, tin dioxide and titanium dioxide, and the thickness of the intermediate battery buffer layer is in the range of 0-30 nm.

[0017] In one embodiment, the top cell further includes an anti-reflection layer, which is disposed on a side of the second electrode layer away from the top cell electron transport layer, and the material of the anti-reflection layer is one of magnesium fluoride, lithium fluoride, sodium fluoride, and silicon oxide.

[0018] In one embodiment, the thickness of the middle battery hole transport layer, the middle battery perovskite absorption layer, the middle battery electron transport layer, the top battery hole transport layer, the top battery perovskite absorption layer, the top battery electron transport layer, the second electrode layer, and the anti-reflection layer is 1nm-600nm.

[0019] In one embodiment, the top cell further comprises a top cell passivation layer, wherein the top cell passivation layer is disposed between the top cell perovskite absorption layer and the top cell electron transport layer; and / or

[0020] The middle battery further includes a middle battery passivation layer, which is disposed between the middle battery perovskite absorption layer and the middle battery electron transport layer.

[0021] In one embodiment, the material of the top battery hole transport layer and the material of the middle battery hole transport layer are one of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine], poly-3-hexylthiophene, nickel oxide, molybdenum trioxide, cuprous iodide, and cuprous thiocyanate.

[0022] In one embodiment, the material of the middle battery electron transport layer and the top battery electron transport layer is one of zinc oxide, tin dioxide, titanium dioxide, [6,6]-phenyl C61 butyric acid methyl ester, carbon 60, and 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline.

[0023] In one embodiment, the material of the first tunneling layer and the second tunneling layer is one of indium tin oxide, indium zinc oxide, aluminum zinc oxide, indium zinc oxide, tin dioxide, zinc oxide, aluminum oxide, and conductive metal.

[0024] The solar tandem cell provided in this application includes a stacked bottom cell, a first tunneling layer, a middle cell, a second tunneling layer, and a top cell. The bottom cell includes a first electrode layer, a P-type base doping layer, a base passivation layer, a silicon substrate, a base surface passivation layer, and an N-type base doping layer stacked in sequence. The middle cell includes a middle cell hole transport layer, a middle cell perovskite absorption layer, and a middle cell electron transport layer stacked in sequence. The top cell is disposed on the side of the second tunneling layer away from the bottom cell. The top cell includes a top cell hole transport layer, a top cell perovskite absorption layer, a top cell electron transport layer, and a second electrode layer stacked in sequence. Thus, under the action of the first tunneling layer and the second tunneling layer, the bottom cell, the middle cell, and the top cell cooperate to expand the absorption range of the solar spectrum, fully absorb and utilize sunlight, and effectively improve the photoelectric conversion efficiency and cell efficiency. In addition, the band gap of the top cell perovskite absorption layer is larger than that of the middle cell perovskite absorption layer. The band gap of the top cell perovskite absorption layer is 1.9eV-2.1eV, which can maximize the absorption of the higher energy part of the solar spectrum by the top cell, while allowing photons with energy lower than the band gap to pass through and be absorbed by the middle cell or bottom cell, thereby improving the energy conversion efficiency and stability of the entire stacked solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or exemplary technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0026] Figure 1 A schematic diagram of the structure of the solar cell stack provided in an embodiment of the present application.

[0027] Among them, the main marks of the drawings in the figure are:

[0028] 100. Solar tandem cells;

[0029] 10. Bottom cell; 11. First metal electrode layer; 12. First transparent electrode layer; 13. P-type base doping layer; 14. Base passivation layer; 15. Silicon substrate; 16. Base surface passivation layer; 17. N-type base doping layer;

[0030] 20. first tunneling layer;

[0031] 30. Middle battery; 31. Middle battery hole transport layer; 32. Middle battery perovskite absorption layer; 33. Middle battery passivation layer; 34. Middle battery electron transport layer; 35. Middle battery buffer layer;

[0032] 40. Second tunneling layer;

[0033] 50. Top cell; 51. Top cell hole transport layer; 52. Top cell perovskite absorption layer; 53. Top cell passivation layer; 54. Top cell electron transport layer; 55. Top cell buffer layer; 56. Second transparent electrode layer; 57. Second metal electrode layer; 58. Anti-reflection layer. DETAILED DESCRIPTION

[0034] In order to make the technical problems, technical solutions and beneficial effects to be solved by this application more clearly understood, this application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0035] It should be noted that when an element is referred to as being “fixed on” or “disposed on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.

[0036] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, "multiple" means two or more, unless otherwise clearly and specifically defined. "Several" means one or more, unless otherwise clearly and specifically defined.

[0037] In the description of this application, it should be understood that the terms "center", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0038] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal communication between two components or the interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0039] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, when the phrases "in one embodiment" or "in some embodiments" appear in various places throughout this specification, not all references are to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0040] In a first aspect, the present application provides a solar tandem cell for optimizing the structure of solar tandem cells, especially perovskite crystalline silicon tandem cells, and improving the photoelectric conversion efficiency of solar tandem cells.

[0041] Please refer to Figure 1 The embodiment of the present application provides a solar tandem cell 100 , including a bottom cell 10 , a first tunneling layer 20 , a middle cell 30 , a second tunneling layer 40 and a top cell 50 .

[0042] The bottom cell 10 includes a first electrode layer, a P-type base doping layer 13, a base passivation layer 14, a silicon substrate 15, a base surface passivation layer 16, and an N-type base doping layer 17, which are stacked in sequence. The base passivation layer 14 and the base surface passivation layer 16 are disposed on opposite sides of the silicon substrate 15 and are used to passivate the opposite sides of the silicon substrate 15. The base passivation layer 14 and the base surface passivation layer 16 work together to enhance the passivation effect on the silicon substrate 15, reduce carrier recombination, thereby reducing carrier loss during transmission, improving transmission efficiency, and thus improving battery efficiency. In addition, the P-type base doping layer 13 is disposed on the side of the base passivation layer 14 away from the silicon substrate 15, and the N-type base doping layer 17 is disposed on the side of the base surface passivation layer 16 away from the silicon substrate 15, to reduce surface recombination and improve conversion efficiency.

[0043] The first tunneling layer 20 is arranged on the side of the N-type base doped layer 17 away from the silicon substrate 15. The first tunneling layer 20 is used to realize the current tunneling effect between the bottom battery 10 and the middle battery 30, so as to allow current to flow between the bottom battery 10 and the middle battery 30, which is beneficial to eliminate the electrical mismatch and device instability problems caused by the direct series connection of the bottom battery 10 and the middle battery 30.

[0044] The middle cell 30 is disposed on a side of the first tunneling layer 20 away from the bottom cell 10 . The middle cell 30 includes a middle cell hole transport layer 31 , a middle cell perovskite absorption layer 32 , and a middle cell electron transport layer 34 , which are stacked in sequence.

[0045] It is understood that direct contact between the N-type base doped layer 17 and the middle cell hole transport layer 31 can lead to lattice mismatch and difficulty in tunneling, resulting in low open-circuit voltage and conversion efficiency of the solar tandem cell 100. Therefore, the first tunneling layer 20 is provided to prevent direct contact between the N-type base doped layer 17 and the middle cell hole transport layer 31.

[0046] The second tunneling layer 40 is disposed on a side of the middle cell 30 away from the bottom cell 10 . The second tunneling layer 40 is used to achieve a current tunneling effect between the middle cell 30 and the top cell 50 , thereby allowing current to flow between the middle cell 30 and the top cell 50 .

[0047] The top battery 50 is arranged on the side of the second tunneling layer 40 away from the bottom battery 10. The top battery 50 includes a top battery hole transport layer 51, a top battery perovskite absorption layer 52, a top battery electron transport layer 54, and a second electrode layer stacked in sequence. The band gap of the top battery perovskite absorption layer 52 is greater than the band gap of the middle battery perovskite absorption layer 32. The band gap of the top battery perovskite absorption layer 52 is 1.9eV-2.1eV.

[0048] The bottom cell 10, middle cell 30, and top cell 50 each utilize sunlight with different wavelengths, specifically, different absorption ranges. The top cell's perovskite absorber layer 52 has a wider bandgap, enabling it to more effectively absorb the higher-energy portion of the solar spectrum. Specifically, it absorbs sunlight in the short-wavelength band while allowing sunlight in other bands to pass through. The middle cell 30 absorbs sunlight in the band between short and long wavelengths while allowing sunlight in the long-wavelength band to pass through. The bottom cell 10 absorbs sunlight in the long-wavelength band. The solar tandem cell 100 provided herein can significantly broaden the range of sunlight utilization and improve its conversion efficiency.

[0049] The solar tandem cell 100 provided in the present application includes a bottom cell 10, a first tunneling layer 20, a middle cell 30, a second tunneling layer 40 and a top cell 50 arranged in a stacked manner. The bottom cell 10 includes a first electrode layer, a P-type base doping layer 13, a base passivation layer 14, a silicon substrate 15, a base surface passivation layer 16 and an N-type base doping layer 17 stacked in sequence. The middle cell 30 includes a middle cell hole transport layer 31, a middle cell perovskite absorption layer 32, and a middle cell electron transport layer 34 stacked in sequence. The top cell 50 is arranged on the side of the second tunneling layer 40 away from the bottom cell 10. The top cell 50 includes a top cell hole transport layer 51, a top cell perovskite absorption layer 52, a top cell electron transport layer 54 and a second electrode layer stacked in sequence. Thus, under the action of the first tunneling layer 20 and the second tunneling layer 40, the bottom cell 10, the middle cell 30, and the top cell 50 cooperate to expand the absorption range of the solar spectrum, fully absorb and utilize sunlight, and effectively improve the photoelectric conversion efficiency and cell efficiency. In addition, the band gap of the top cell perovskite absorber layer 52 is larger than the band gap of the middle cell perovskite absorber layer 32, and the band gap of the top cell perovskite absorber layer 52 is 1.9eV-2.1eV. This enables the top cell 50 to maximize the absorption of the higher energy portion of the solar spectrum, while allowing photons with energy below the band gap to pass through and be absorbed by the middle cell 30 or the bottom cell 10, thereby improving the energy conversion efficiency and stability of the entire tandem solar cell.

[0050] In the embodiment of the present application, the first electrode layer includes a first metal electrode layer 11 and a first transparent electrode layer 12. The first metal electrode layer 11 is disposed on a side of the first transparent electrode layer 12 away from the P-type base doping layer 13. The second electrode layer includes a second transparent electrode layer 56 and a second metal electrode layer 57. The second metal electrode layer 57 is disposed on a side of the second transparent electrode layer 56 away from the top cell electron transport layer 54.

[0051] The first transparent electrode layer 12 and the second transparent electrode layer 56 are arranged on the inner side and have good transparency. They are used to guide the incident light into the interior of the solar cell and can transport the photogenerated carriers to the outer metal electrode layer.

[0052] In the embodiment provided herein, the material of the first transparent electrode layer 12 is at least one of indium tin oxide, indium zinc oxide, and aluminum zinc oxide; and / or the material of the second transparent electrode layer 56 is at least one of indium tin oxide, indium zinc oxide, and aluminum zinc oxide.

[0053] Optionally, in one embodiment, the materials of the first transparent electrode layer 12 and the second transparent electrode layer 56 are both indium tin oxide.

[0054] The first metal electrode layer 11 and the second metal electrode layer 57 are arranged on the outside for collecting current and introducing or leading the current into an external circuit.

[0055] In the embodiments provided herein, the material of the first metal electrode layer 11 is at least one of silver, gold, copper, aluminum, and carbon; and / or the material of the second metal electrode layer 57 is at least one of silver, gold, copper, aluminum, and carbon.

[0056] Optionally, in one embodiment, the materials of the first metal electrode layer 11 and the second metal electrode layer 57 are both silver.

[0057] In the embodiment provided in the present application, the thickness of the second metal electrode layer 57 is 1 nm-600 nm; and / or the thickness of the second transparent electrode layer 56 is 1 nm-600 nm.

[0058] Optionally, in one embodiment, the thickness of the first metal electrode layer 11 is 200 nm, the thickness of the first transparent electrode layer 12 is 100 nm, the thickness of the second metal electrode layer 57 is 100 nm, and the thickness of the second transparent electrode layer 56 is 100 nm.

[0059] In an embodiment of the present application, the material of the top cell perovskite absorption layer 52 and the middle cell perovskite absorption layer 32 includes a perovskite with an ABX3 structure, wherein the A position is an organic cation, including at least one of a methylamine cation, a formamidine cation, a phenylethylamine cation or a cesium cation; the B position is a metal cation, including at least one of a lead (II) ion and a tin (II) ion; and the X position is a halogen anion, including at least one of a fluoride ion, a chloride ion, a bromide ion and an iodide ion.

[0060] In an embodiment of the present application, the thickness of the top cell perovskite absorption layer 52 is 1 nm-600 nm.

[0061] Optionally, in one embodiment, the thickness of the top cell perovskite absorber layer 52 is 500 nm.

[0062] In the embodiment of the present application, the band gap of the middle cell perovskite absorption layer 32 is 1.3 eV-1.6 eV, so as to fully absorb sunlight in the wavelength band between short wave and long wave and allow long wave sunlight to pass through.

[0063] In the embodiment of the present application, the thickness of the middle cell perovskite absorption layer 32 is 1 nm-600 nm.

[0064] Optionally, in one embodiment, the thickness of the middle cell perovskite absorption layer 32 is 500 nm.

[0065] Please refer to Figure 1In some embodiments of the present application, the top battery 50 further includes a top battery buffer layer 55, which is disposed between the top battery electron transport layer 54 and the second electrode layer; and / or the middle battery 30 further includes a middle battery buffer layer 35, which is disposed between the middle battery electron transport layer 34 and the second tunneling layer 40.

[0066] The top cell buffer layer 55 is used to reduce the contact resistance between the top cell electron transport layer 54 and the second electrode layer, allowing charge carriers to be more easily and quickly transferred to the second electrode layer, thereby improving the photovoltaic conversion efficiency of the solar tandem cell 100. Accordingly, the function of the middle cell buffer layer 35 is similar to that of the top cell buffer layer 55 and will not be further described here.

[0067] In an embodiment of the present application, the material of the top battery buffer layer 55 is one of zinc oxide, tin dioxide, and titanium dioxide, and the thickness range of the top battery buffer layer 55 is 0-30nm; and / or the material of the middle battery buffer layer 35 is one of zinc oxide, tin dioxide, and titanium dioxide, and the thickness range of the middle battery buffer layer 35 is 0-30nm.

[0068] Optionally, in one embodiment, the material of the top battery buffer layer 55 is tin dioxide, and the thickness of the top battery buffer layer 55 is 15 nm. The material of the middle battery buffer layer 35 is tin dioxide, and the thickness of the middle battery buffer layer 35 is in the range of 15 nm.

[0069] The above materials have good electron transport properties, which help promote the effective extraction and transmission of electrons; at the same time, the above materials also have good light transmittance, allowing sunlight to pass through without being absorbed, which is beneficial to improving the photoelectric conversion efficiency of the solar tandem cell 100.

[0070] It can be understood that in other embodiments of the present application, the material of the top battery buffer layer 55 is different from the material of the middle battery buffer layer 35, and the thickness of the top battery buffer layer 55 and the thickness of the middle battery buffer layer 35 are other values, such as 30 nm, but not limited thereto.

[0071] Please refer to Figure 1 In an embodiment of the present application, the top cell 50 further includes an anti-reflection layer 58, which is disposed on a side of the second electrode layer away from the top cell electron transport layer 54, and is used to reduce reflection loss, thereby increasing the transmittance of sunlight, thereby increasing the light absorption rate, and increasing the photoelectric conversion efficiency of the solar stack cell 100.

[0072] In the embodiment of the present application, the material of the anti-reflection layer 58 is one of magnesium fluoride, lithium fluoride, sodium fluoride, and silicon oxide.

[0073] Optionally, in one embodiment, the material of the anti-reflection layer 58 is magnesium fluoride, which has good anti-reflection properties and can effectively reduce sunlight reflection.

[0074] In the embodiment of the present application, the thickness of the anti-reflection layer 58 is 1 nm-600 nm.

[0075] Optionally, in one embodiment, the thickness of the anti-reflection layer 58 is 100 nm.

[0076] Please refer to Figure 1 In an embodiment of the present application, the top battery 50 further includes a top battery passivation layer 53, which is disposed between the top battery perovskite absorption layer 52 and the top battery electron transport layer 54; and / or the middle battery 30 further includes a middle battery passivation layer 33, which is disposed between the middle battery perovskite absorption layer 32 and the middle battery electron transport layer 34.

[0077] The top cell passivation layer 53 is used to improve the interface contact quality between the top cell perovskite absorber layer 52 and the top cell electron transport layer 54, making electron transport smoother. At the same time, the top cell passivation layer 53 can reduce carrier recombination at the interface between the top cell perovskite absorber layer 52 and the top cell electron transport layer 54, thereby increasing the open circuit voltage of the solar tandem cell 100. The function of the middle cell passivation layer 33 in improving the interface between the middle cell perovskite absorber layer 32 and the middle cell electron transport layer 34 is similar to that of the top cell passivation layer 53 and will not be further described here.

[0078] In the embodiments provided herein, the material of the top battery passivation layer 53 is at least one of propylenediamine iodine, propylenediamine bromide, butylammonium chloride, butylammonium bromide, butylammonium iodide, N,N-dimethyl-1,3-propylenediamine hydrochloride, dodecanediamin bromide, magnesium fluoride, lithium fluoride, and sodium fluoride; and / or, the material of the middle battery passivation layer 33 is at least one of propylenediamine iodine, propylenediamine bromide, butylammonium chloride, butylammonium bromide, butylammonium iodide, N,N-dimethyl-1,3-propylenediamine hydrochloride, dodecanediamin bromide, magnesium fluoride, lithium fluoride, and sodium fluoride.

[0079] Optionally, in one embodiment, the materials of the top cell passivation layer 53 and the middle cell passivation layer 33 are both propylene diamine iodide.

[0080] In the embodiments provided herein, the thickness of the top cell passivation layer 53 is 1 nm-50 nm; and / or the thickness of the middle cell passivation layer 33 is 1 nm-50 nm.

[0081] Optionally, in one embodiment, the thickness of the top cell passivation layer 53 is 4 nm, and the thickness of the middle cell passivation layer 33 is 4 nm.

[0082] It is understood that in other embodiments, the top cell passivation layer 53 and the middle cell passivation layer 33 may also be omitted, which is not limited here.

[0083] In an embodiment of the present application, the material of the top battery hole transport layer 51 and the material of the middle battery hole transport layer 31 are one of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine], poly-3-hexylthiophene, nickel oxide, molybdenum trioxide, cuprous iodide, and cuprous thiocyanate.

[0084] Optionally, in one embodiment, the material of the top cell hole transport layer 51 is poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine], and the material of the middle cell hole transport layer 31 is also poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine].

[0085] The above materials have high hole mobility and can efficiently transport holes to the anode, thereby improving the photoelectric conversion efficiency of the solar tandem cell 100 .

[0086] It is understood that in other embodiments of the present application, the material of the top battery hole transport layer 51 and the material of the middle battery hole transport layer 31 may also be different, which is not limited here.

[0087] In the embodiment provided in the present application, the thickness of the top cell hole transport layer 51 is 1 nm-600 nm, and the thickness of the middle cell hole transport layer 31 is 1 nm-600 nm.

[0088] Optionally, in one embodiment, the thickness of the top cell hole transport layer 51 is 20 nm, and the thickness of the middle cell hole transport layer 31 is 20 nm.

[0089] In an embodiment of the present application, the material of the middle battery electron transport layer 34 and the top battery electron transport layer 54 is one of zinc oxide, tin dioxide, titanium dioxide, [6,6]-phenyl C61 butyric acid methyl ester, carbon 60, and 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline.

[0090] Optionally, in one embodiment, the material of the middle cell electron transport layer 34 is carbon 60, and the material of the top cell electron transport layer 54 is also carbon 60.

[0091] These materials have excellent electrical conductivity, facilitating the rapid and efficient transmission of electrons while minimizing electron loss during transmission. Furthermore, these materials exhibit good light transmittance, enabling sunlight to penetrate and reach the top cell perovskite absorber layer 52 and the middle cell perovskite absorber layer 32, thereby improving the photovoltaic conversion efficiency of the solar tandem cell 100.

[0092] In the embodiments provided herein, the thickness of the middle battery electron transport layer 34 and the top battery electron transport layer 54 is 1 nm to 600 nm.

[0093] Optionally, in one embodiment, the thickness of the middle battery electron transport layer 34 is 20 nm, and the thickness of the middle battery hole transport layer 31 is 20 nm.

[0094] In the embodiment of the present application, the material of the first tunneling layer 20 and the second tunneling layer 40 is one of indium tin oxide, indium zinc oxide, aluminum zinc oxide, indium zinc oxide, tin dioxide, zinc oxide, aluminum oxide, and conductive metal.

[0095] Optionally, in one embodiment, the material of the first tunneling layer 20 and the second tunneling layer 40 is indium tin oxide.

[0096] In the embodiment provided in the present application, the thickness of the first tunneling layer 20 and the second tunneling layer 40 is 0.1 nm-5 nm.

[0097] Optionally, in one embodiment, the thickness of the first tunneling layer 20 and the second tunneling layer 40 is 1 nm.

[0098] In one embodiment provided in this application, please refer to Figure 1 The solar tandem cell 100 includes a first metal electrode layer 11, a first transparent electrode layer 12, a P-type base doping layer 13, a base passivation layer 14, a silicon substrate 15, a base surface passivation layer 16, an N-type base doping layer 17, a first tunneling layer 20, a middle cell hole transport layer 31, a middle cell perovskite absorption layer 32, a middle cell passivation layer 33, a middle cell electron transport layer 34, a middle cell buffer layer 35, a second tunneling layer 40, a top cell hole transport layer 51, a top cell perovskite absorption layer 52, a top cell passivation layer 53, a top cell electron transport layer 54, a top cell buffer layer 55, a second transparent electrode layer 56, a second metal electrode layer 57, and an anti-reflection layer 58, which are stacked in sequence from bottom to top.

[0099] Among them, the thickness of the middle battery hole transport layer 31, the middle battery perovskite absorption layer 32, the middle battery electron transport layer 34, the top battery hole transport layer 51, the top battery perovskite absorption layer 52, the top battery electron transport layer 54, the second electrode layer, and the anti-reflection layer 58 is 1nm-600nm.

[0100] In a second aspect, the present application provides a method for manufacturing a solar tandem cell, which is used to manufacture the solar tandem cell 100 in the first aspect.

[0101] In some embodiments, the first transparent electrode layer 12 is prepared by magnetron sputtering.

[0102] Specifically, the silicon substrate 15 on which the P-type base doping layer 13 , the base passivation layer 14 , the base surface passivation layer 16 and the N-type base doping layer 17 are prepared is placed in a magnetron sputtering device, and the power is controlled to be between 50W and 200W.

[0103] In some embodiments, the first metal electrode layer 11 is prepared by evaporation.

[0104] Specifically, the substrate sample prepared with the first transparent electrode layer 12 is placed on a mask for evaporation. The evaporation vacuum is 5×10 -5 -2×10 -4 Pa, the evaporation temperature is 500-2000℃, and the evaporation rate is 0.1-5Å / S;

[0105] In some embodiments, the first tunneling layer 20 and the second tunneling layer 40 are prepared by atomic deposition, magnetron sputtering, or wet chemical method.

[0106] In some embodiments, the middle cell hole transport layer 31 and the top cell hole transport layer 51 are prepared by spin coating or magnetron sputtering.

[0107] Specifically, when using spin coating, the hole transport layer dispersion is evenly coated on the surface of the first tunneling layer 20 or the second tunneling layer 40 at a spin coating speed of 1000-5000 rpm for 10-100 seconds. After spin coating, an annealing operation is performed at a temperature of 300-600°C for 10-50 minutes. When using magnetron sputtering, the prepared substrate is placed in a magnetron sputtering device at a controlled power of 30-90W.

[0108] In some embodiments, the middle cell perovskite absorption layer 32 is prepared by spin coating, flash evaporation or solution method.

[0109] Specifically, when the spin coating method is used, a perovskite precursor solution is prepared, and the dissolving solvent of the perovskite precursor solution includes at least one of dimethylformamide, G-butyrolactone, dimethyl sulfoxide and N,N-dimethylacetamide, and the solvent ratio is between 0-3:10-7; the perovskite precursor solution is evenly coated on the surface of the middle battery hole transport layer 31, and then dynamically spin-coated using an anti-solvent, and the anti-solvent includes at least one of toluene, chlorobenzene, and ethyl acetate; the spin coating speed is 1200-6000rpm, the spin coating time is 20-120s, and the anti-solvent titration time is 10-50s after the start of the speed; after the spin coating is completed, an annealing operation is performed, the annealing temperature is 50-150°C, and the annealing time is 5-40min. When the flash evaporation method is used, a perovskite precursor solution is prepared and evenly coated on the surface of the hole transport layer at a spin coating speed of 1000-6000 rpm and a spin coating time of 20-120 s; after the spin coating is completed, a flash evaporation operation is performed, the flash evaporation time is 10-60 s, and the flash evaporation temperature is 0-100° C. After the flash evaporation is completed, an annealing treatment is performed at an annealing temperature of 50-150° C. and an annealing time of 5-40 min;

[0110] In some embodiments, the top cell perovskite absorber layer 52 is prepared using a binary evaporation method.

[0111] Specifically, lead bromide and cesium iodide powders are co-evaporated binaryly. The maximum evaporation rate of lead bromide is 1-10A / s, the maximum evaporation rate of cesium iodide is controlled at 1-10A / s, the total evaporation time is controlled between 600-3600s, and the thickness of the formed film is 1-600nm. The evaporation rates of lead bromide and cesium iodide are maintained at a constant value throughout the coating process by controlling the rate ratio of lead iodide to cesium bromide, controlling the ratio of lead iodide to cesium bromide to be between 2:1 and 1:2, and the evaporation vacuum is controlled at 1-3×10 -4 Pa, the evaporation temperature is 200-700 ° C. During the evaporation process, the substrate temperature is controlled at 100-200 ° C.

[0112] In some embodiments, the middle cell passivation layer 33 and the top cell passivation layer 53 are prepared by evaporation, spin coating, or spray coating.

[0113] Specifically, when the evaporation method is used, propylene diamine iodide is evaporated onto the surface of the middle cell perovskite absorption layer 32 or the top cell perovskite absorption layer 52, and the evaporation vacuum degree is 1-5×10 -4Pa, the evaporation temperature is 50-400°C, and the evaporation rate is 0.05-1Å / s. After evaporation, an annealing operation is performed at a temperature of 0-150°C and a time of 0-30 minutes. When using the spin coating method, a passivation layer dispersion is prepared and evenly coated on the surface of the middle cell perovskite absorber layer 32 or the top cell perovskite absorber layer 52. Propylene diamine iodine is dissolved in an organic solvent including but not limited to methanol, ethanol, or isopropanol, ultrasonically dissolved, and spin coated. The concentration of propylene diamine iodine is 0.1-6 mg / ml, the ultrasonic time is 0-30 minutes, the spin coating speed is 1000-7000 rpm, and the spin coating time is 20-120 seconds. After the spin coating is completed, an annealing operation is performed at a temperature of 40-160°C and a time of 5-40 minutes. When the spraying method is used, the passivation layer dispersion is sprayed on the middle cell perovskite absorption layer 32 or the top cell perovskite absorption layer 52 at a spraying rate of 0-100 cm / s. After the spraying is completed, an annealing operation is performed at an annealing temperature of 20-170° C. and an annealing time of 0-30 min.

[0114] In some embodiments, the middle cell electron transport layer 34 and the top cell electron transport layer 54 are prepared by spin coating, inkjet coating or evaporation.

[0115] Specifically, when the spin coating method is used, the electron transport layer dispersion is evenly coated on the surface of the passivation layer, the spin coating speed is 500-4000 rpm, and the spin coating time is 10-80 s. When the evaporation method is used, the electron transport layer material is evaporated onto the surface of the passivation layer, and the evaporation vacuum is 5×10 -5 -5×10 -4 Pa, the evaporation temperature is 100-400℃, and the evaporation rate is 0.05-1Å / S.

[0116] In some embodiments, the middle battery buffer layer 35 and the top battery buffer layer 55 are prepared by spin coating, atomic deposition or evaporation.

[0117] Specifically, when the atomic accumulation deposition method is used, the electron transport layer material is deposited onto the surface of the electron transport layer using an atomic accumulation deposition device, and the deposition vacuum is 0-1×10 4 Pa, the deposition pipeline temperature is between 50-150℃, and the deposition chamber temperature is 40-150℃. When the evaporation method is used, the electron transport layer modification layer material is evaporated to the corresponding electron transport layer surface, and the evaporation vacuum degree is 6×10 -5 -4×10 -4 Pa, the evaporation temperature is 100-500℃, and the evaporation rate is 0.05-1Å / S.

[0118] In some embodiments, the second transparent electrode layer 56 is prepared by magnetron sputtering or evaporation.

[0119] Specifically, when the magnetron sputtering method is used, the transparent electrode material is sputtered onto the surface of the top electron transport layer modification layer, and the control power is 30-200 W. When the evaporation method is used, the transparent electrode material is evaporated onto the surface of the top electron transport layer modification layer, and the evaporation vacuum is 1×10 -5 -5×10 -4 Pa, the evaporation temperature is 1000-2000℃, and the evaporation rate is 0.05-3Å / S.

[0120] In some embodiments, the second metal electrode layer 57 is formed by evaporation.

[0121] Specifically, the preparation method thereof is similar to the preparation method of the first metal electrode layer 11 except that the mask is different.

[0122] In some embodiments, the anti-reflection layer 58 is prepared by magnetron sputtering or evaporation.

[0123] Specifically, when magnetron sputtering is used, the preparation method is similar to the preparation method of the second transparent electrode layer 56. When evaporation is used, it is similar to the preparation method of the top cell passivation layer 53, but the evaporation rate is 0-5A / S;

[0124] Optionally, in one embodiment, the method for manufacturing the solar tandem cell 100 provided in the embodiment of the present application includes:

[0125] S1. Provide a silicon substrate 15, the silicon substrate 15 including a first surface and a second surface arranged opposite to each other, and fabricate a base passivation layer 14 and a P-type base doping layer 13 stacked in sequence on the first surface of the silicon substrate 15, and fabricate a base surface passivation layer 16 and an N-type base doping layer 17 stacked in sequence on the second surface of the silicon substrate 15.

[0126] Specifically, the first surface is the backlight surface, and the second surface is the light-facing surface. A base passivation layer 14 is formed on the first surface of the silicon substrate 15, a P-type base doping layer 13 is formed on the side of the base passivation layer 14 away from the silicon substrate 15, and a first electrode layer is formed on the side of the P-type base doping layer 13 away from the silicon substrate 15. A base surface passivation layer 16 is formed on the second surface of the silicon substrate 15, and an N-type base doping layer 17 is formed on the side of the base surface passivation layer 16 away from the silicon substrate 15.

[0127] S2 , preparing a first electrode layer, including preparing a first transparent electrode layer 12 and a first metal electrode layer 11 stacked in sequence on the surface of the P-type base doping layer 13 .

[0128] Specifically, the first transparent electrode layer 12 was prepared on the surface of the P-type base doped layer 13. The sample was placed in a magnetron sputtering device using a magnetron sputtering method. An ITO target was set. The power was controlled to 60W and the operation time was 1.5 hours. The thickness of the first transparent electrode layer 12 was 100nm. Then, the sample was placed on a mask using an evaporation method and placed in an evaporation chamber. The vacuum degree of the evaporation was 2×10 -4 Pa, the evaporation voltage is adjusted to the evaporation temperature, the evaporation rate is controlled at 2.5Å / S, and silver is evaporated onto the layer film to make the thickness of the first metal electrode layer 11 200nm.

[0129] S3 , preparing a first tunneling layer 20 on the surface of the N-type base doping layer 17 .

[0130] Specifically, the sample was placed on a mask and then placed in a magnetron sputtering device using a magnetron sputtering method. The control power was 60 W, the operation time was 1 hour, and the thickness of the first tunneling layer 20 was 40 nm.

[0131] S4, preparing the middle battery 30, including preparing the middle battery hole transport layer 31, the middle battery perovskite absorption layer 32, the middle battery passivation layer 33, the middle battery electron transport layer 34, and the middle battery buffer layer 35 which are stacked in sequence.

[0132] Specifically, first, prepare the medium-cell hole transport layer 31: treat the sample with UV-Ozone for 15 minutes, then use the spin coating method to prepare a hole transport layer dispersion. Weigh 0.05 mol of NiOx powder and dissolve it in 1 ml of ultrapure water. Ultrasonic vibration is then applied for 20 minutes. The hole transport layer dispersion is evenly coated on the surface of the sample. The spin coating speed is set to 2000 rpm, the spin coating time is 40 seconds, and the solution volume is 100 μl. After the spin coating is completed, annealing is performed at 450°C for 30 minutes. The thickness of the medium-cell hole transport layer 31 is approximately 20 nm.

[0133] Secondly, prepare the medium-sized battery perovskite absorption layer 32: use the flash evaporation method, prepare the perovskite precursor solution, weigh 1.52eV bandgap perovskite powder and dissolve it in 1ml DMF and DMSO solvent with a solvent ratio of 8:2, and magnetically stir for 30 minutes. Then place the sample on the base of the spin coater, set the spin coating speed to 3500rpm, the spin coating time to 30s, and the amount of perovskite precursor solution is 120ul to coat the surface of the sample. After the spin coating is completed, place the sample on the flash evaporation table, set the flash evaporation time to 30s, and the flash evaporation temperature to 30°C. After the flash evaporation is completed, annealing treatment is performed, the annealing temperature is set to 100°C, and the annealing time is 15 minutes. The thickness of the medium-sized battery perovskite absorption layer 32 is about 500nm.

[0134] Secondly, prepare the battery passivation layer 33: using the evaporation method, weigh 3 mg of propylene diamine iodine and place it in a crucible, place the substrate sample on the mask, and put it into the evaporation chamber. Wait for the evaporation vacuum to be 2×10 -4 Pa, the evaporation voltage was adjusted to the evaporation temperature, the evaporation rate was controlled at 0.1Å / S, and propylene diamine iodide was evaporated onto the layer film to make the thickness of the middle battery passivation layer 33 4nm. After the completion, the annealing table temperature was set to 100℃ and the annealing operation was carried out for 8 minutes.

[0135] Next, prepare the battery electron transport layer 34: Use the evaporation method to place the substrate sample on the mask and put it into the evaporation chamber. Wait for the evaporation vacuum to be 1×10 -4 Pa, the evaporation voltage is adjusted to the evaporation temperature, the evaporation rate is controlled at 0.1-0.15Å / S, and C60 is evaporated onto the layer film to make the thickness of the middle battery electron transport layer 34 20nm.

[0136] Finally, prepare the battery buffer layer 35: use atomic deposition method, set the vacuum degree of atomic deposition equipment to 0.5×10 4 Pa, the deposition channel temperature is between 60° C., the deposition chamber temperature is 70° C., and tin dioxide is evaporated onto the layer film to make the thickness of the middle battery buffer layer 35 be 15 nm.

[0137] S5 , preparing a second tunneling layer 40 on the surface of the middle battery buffer layer 35 .

[0138] Specifically, the sample was placed on a mask and then placed in a magnetron sputtering device using a magnetron sputtering method. The control power was 60 W, the operation time was 1 hour, and the thickness of the 40-layer second tunneling layer was 40 nm.

[0139] S6. Prepare the top cell 50, including preparing a top cell hole transport layer 51, a top cell perovskite absorption layer 52, a top cell passivation layer 53, a top cell electron transport layer 54, a top cell buffer layer 55 and a second electrode layer stacked in sequence.

[0140] Specifically, the top cell hole transport layer 51 was first prepared: the sample was treated with UV-Ozone for 15 minutes. Using a spin coating method, a hole transport layer dispersion was prepared. 0.05 mol of NiOx powder was weighed and dissolved in 1 ml of ultrapure water, and ultrasonic vibration was applied for 20 minutes. The hole transport layer dispersion was evenly coated on the surface of the sample. The spin coating speed was set to 2000 rpm, the spin coating time was set to 40 seconds, and the solution volume was 100 μl. After the spin coating, an annealing operation was performed at 450°C for 30 minutes. The thickness of the top cell hole transport layer 51 was approximately 20 nm.

[0141] Secondly, prepare the top cell perovskite absorption layer 52: Scheme 1 uses a solution method, prepares a perovskite precursor solution, weighs 2.05eV bandgap perovskite powder and dissolves it in 1ml DMF and DMSO solvent with a solvent ratio of 8:2, and magnetically stirs for 30 minutes. Then, place the sample on the base of the spin coater, set the spin coating speed to 3500rpm, the spin coating time to 30s, and the amount of perovskite precursor solution is 120ul to coat the surface of the sample. After the spin coating is completed, place the sample on the flash evaporation table, set the flash evaporation time to 30s, and the flash evaporation temperature to 30°C. After the flash evaporation is completed, annealing is performed, the annealing temperature is set to 100°C, and the annealing time is 15min. The thickness of the top cell perovskite absorption layer 52 is about 500nm.

[0142] Next, prepare the top cell passivation layer 53: using the evaporation method, weigh 3 mg of propylene diamine iodine and place it in a crucible, place the substrate sample on the mask, and place it in the evaporation chamber. Wait for the evaporation vacuum to be 2×10 -4 Pa, the evaporation voltage was adjusted to the evaporation temperature, the evaporation rate was controlled at 0.1Å / S, and propylene diamine iodide was evaporated onto the layer film. The thickness of the top battery passivation layer 53 was 4nm. After the completion, the annealing table temperature was set to 100℃ and the annealing operation was performed for 8 minutes.

[0143] Next, prepare the top cell electron transport layer 54: Use the evaporation method to place the substrate sample on the mask and put it into the evaporation chamber. Wait for the evaporation vacuum to be 1×10 -4 Pa, the evaporation voltage was adjusted to the evaporation temperature, and the evaporation rate was controlled at 0.1-0.15Å / S. 60 The thickness of the top cell electron transport layer 54 is 20 nm after evaporation onto the film.

[0144] Next, prepare the top battery buffer layer 55: use atomic deposition method and set the vacuum degree of atomic deposition equipment to 0.5×10 4 Pa, the deposition channel temperature is between 60°C, the deposition chamber temperature is 70°C, and SnO2 is evaporated onto the layer film to make the thickness of the top battery buffer layer 55 15nm.

[0145] Finally, the second electrode layer was prepared, including sequentially forming a stacked second transparent electrode layer 56 and a second metal electrode layer 57. The second transparent electrode layer 56 was prepared similarly to the preparation of the first transparent electrode layer 12. An IZO target was set, the power was controlled to 50 W, the run time was 1 hour, and the film thickness of the second transparent electrode layer 56 was 100 nm. Next, the second metal electrode layer 57 was prepared similarly to the preparation of the first metal electrode layer 11, using a different mask. The thickness of the second metal electrode layer 57 was 100 nm.

[0146] S7. Prepare an anti-reflection layer 58.

[0147] Specifically, similar to the method for preparing the second passivation layer, the evaporation rate is controlled at 2Å / S, and magnesium fluoride is evaporated onto the film. The thickness of the anti-reflection layer 58 is 100nm.

[0148] There is no single method for manufacturing the top cell perovskite absorption layer 52 .

[0149] Alternatively, in some embodiments, the top cell perovskite absorption layer 52 is prepared based on a binary evaporation method. Specifically, three comparative schemes are provided:

[0150] Solution 2: Use binary co-evaporation of lead bromide and cesium iodide powders. The maximum evaporation rate of lead bromide is 1.5A / s, and the maximum evaporation rate of cesium iodide is controlled at 1A / s. The total evaporation time is controlled at 1800s, and the thickness of the formed film is 1-450nm. The evaporation rate of lead bromide and cesium iodide is kept at a constant value throughout the coating process by controlling the rate ratio of lead iodide to cesium bromide, controlling the ratio of lead iodide to cesium bromide to be between 1.5:1, and the evaporation vacuum is controlled at 1×10 -4 Pa, the evaporation temperature is 400 ° C. The substrate temperature is controlled at 150 ° C during the evaporation process;

[0151] Option 3: Use binary co-evaporation of lead bromide and cesium iodide powder. The maximum evaporation rate of lead bromide is 1.25A / s, the maximum evaporation rate of cesium iodide is controlled at 1.25A / s, the total evaporation time is controlled at 1800s, and the thickness of the formed film is 450nm. The evaporation rate of lead bromide and cesium iodide is kept at a constant value throughout the coating process by controlling the rate ratio of lead iodide to cesium bromide, controlling the ratio of lead iodide to cesium bromide to be between 1:1, and the evaporation vacuum degree is 1×10 -4 Pa, the evaporation temperature is 400 ° C. The substrate temperature is controlled at 150 ° C during the evaporation process;

[0152] Option 4: Use binary co-evaporation of lead bromide and cesium iodide powders. The maximum evaporation rate of lead bromide is 1A / s, and the maximum evaporation rate of cesium iodide is controlled at 1.5A / s. The total evaporation time is controlled at 1800s, and the thickness of the formed film is 1-450nm. The evaporation rate of lead bromide and cesium iodide is kept at a constant value throughout the coating process by controlling the rate ratio of lead iodide to cesium bromide, controlling the ratio of lead iodide to cesium bromide to be between 1:1, and the evaporation vacuum is controlled at 1×10 -4 Pa, the evaporation temperature is 400 ° C. The substrate temperature is controlled at 150 ° C during the evaporation process.

[0153] A solar simulator is used to calibrate the solar cell 100 prepared based on the above schemes 1, 2, 3 and 4 to a standard sunlight intensity, and a solar simulator is used to calibrate the solar cell 100 with an area of ​​1.0 cm 2The test device was tested for a long period of time. The starting voltage was set to 1.95V, the cut-off voltage was set to 0V, the range was set to 100mA, and the result was rounded to two decimal places. The test results are shown in the table below.

[0154] Device Open circuit voltage (V) <![CDATA[Short-circuit current (mA / cm 2 ).]]> Fill Factor Photoelectric conversion efficiency (%) Option 1 2.88 11.30 0.75 24.41 Option 2 3.06 11.20 0.80 27.42 Option 3 3.10 11.30 0.81 28.37 Option 4 3.04 11.10 0.79 26.66

[0155] Comparing Scheme 1 with Schemes 2, 3, and 4, Scheme 1, which uses a solution method to prepare the top cell 50, exhibits significant structural damage to the middle cell 30, as evidenced by lower device open-circuit voltage and fill factor. This results in a low photoelectric conversion efficiency of only 24.41% for Scheme 1. In contrast, Schemes 2, 3, and 4 of this application, which utilize a binary co-evaporation method to prepare the top cell 50, significantly reduce damage to the middle cell 30, as evidenced by the open-circuit voltage exceeding 3V and fill factors of approximately 0.8 achieved by the devices of Schemes 2, 3, and 4.

[0156] This application also optimizes the preparation parameters of the top cell 50 binary evaporation method. The optimization results show that for this process, the best performance is achieved when the ratio of lead bromide to cesium iodide is 1:1. This is reflected in the device of Scheme 3 based on these optimized parameters, which has higher photoelectric conversion efficiency and open-circuit voltage than the examples of Schemes 2 and 4.

[0157] In summary, the solar tandem cell 100 provided in the present application comprises a bottom cell 10, a first tunneling layer 20, a middle cell 30, a second tunneling layer 40, and a top cell 50. Under the action of the first tunneling layer 20 and the second tunneling layer 40, the bottom cell 10, the middle cell 30, and the top cell 50 cooperate to expand the absorption range of the solar spectrum, achieve full absorption and utilization of sunlight, and effectively improve the photoelectric conversion efficiency and cell efficiency. In addition, the band gap of the top cell perovskite absorption layer 52 is greater than the band gap of the middle cell perovskite absorption layer 32. The band gap of the top cell perovskite absorption layer 52 is 1.9 eV-2.1 eV, which enables the top cell 50 to maximize the absorption of the higher energy portion of the solar spectrum, while allowing photons with energy below the band gap to pass through and be absorbed by the middle cell 30 or the bottom cell 10, thereby improving the energy conversion efficiency and stability of the entire tandem solar cell.

[0158] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A solar tandem cell, characterized in that: include: The bottom cell comprises a first electrode layer, a P-type base doping layer, a base passivation layer, a silicon substrate, a base surface passivation layer and an N-type base doping layer stacked in sequence; A first tunneling layer is provided on a side of the N-type base doping layer away from the silicon substrate; A middle battery is provided on a side of the first tunneling layer away from the bottom battery, wherein the middle battery comprises a middle battery hole transport layer, a middle battery perovskite absorption layer, and a middle battery electron transport layer stacked in sequence; A second tunneling layer is provided on a side of the middle cell away from the bottom cell; and A top cell is arranged on a side of the second tunneling layer away from the bottom cell. The top cell includes a top cell hole transport layer, a top cell perovskite absorption layer, a top cell electron transport layer, and a second electrode layer stacked in sequence. The band gap of the top cell perovskite absorption layer is greater than the band gap of the middle cell perovskite absorption layer, and the band gap of the top cell perovskite absorption layer is 1.9eV-2.1eV.

2. The solar cell stack according to claim 1, wherein: The band gap of the mid-cell perovskite absorption layer is 1.3 eV-1.6 eV.

3. The solar cell stack according to claim 1, wherein: The top cell further comprises a top cell buffer layer, wherein the top cell buffer layer is disposed between the top cell electron transport layer and the second electrode layer; and / or The intermediate battery further includes a intermediate battery buffer layer, and the intermediate battery buffer layer is disposed between the intermediate battery electron transport layer and the second tunneling layer.

4. The solar cell stack according to claim 3, wherein: The material of the top battery buffer layer is one of zinc oxide, tin dioxide and titanium dioxide, and the thickness of the top battery buffer layer is in the range of 0-30 nm; and / or The material of the intermediate battery buffer layer is one of zinc oxide, tin dioxide and titanium dioxide, and the thickness of the intermediate battery buffer layer is in the range of 0-30 nm.

5. The solar tandem cell according to any one of claims 1 to 4, characterized in that: The top cell further includes an anti-reflection layer, which is arranged on a side of the second electrode layer away from the top cell electron transport layer. The material of the anti-reflection layer is one of magnesium fluoride, lithium fluoride, sodium fluoride, and silicon oxide.

6. The solar cell stack according to claim 5, wherein: The thickness of the middle battery hole transport layer, the middle battery perovskite absorption layer, the middle battery electron transport layer, the top battery hole transport layer, the top battery perovskite absorption layer, the top battery electron transport layer, the second electrode layer, and the anti-reflection layer is 1nm-600nm.

7. The solar tandem cell according to any one of claims 1 to 4, characterized in that: The top cell further comprises a top cell passivation layer, wherein the top cell passivation layer is disposed between the top cell perovskite absorption layer and the top cell electron transport layer; and / or The middle battery further includes a middle battery passivation layer, and the middle battery passivation layer is disposed between the middle battery perovskite absorption layer and the middle battery electron transport layer.

8. The solar tandem cell according to any one of claims 1 to 4, characterized in that: The material of the top battery hole transport layer and the material of the middle battery hole transport layer are one of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine], poly-3-hexylthiophene, nickel oxide, molybdenum trioxide, cuprous iodide, and cuprous thiocyanate.

9. The solar tandem cell according to any one of claims 1 to 4, characterized in that: The material of the middle battery electron transport layer and the top battery electron transport layer is one of zinc oxide, tin dioxide, titanium dioxide, [6,6]-phenyl C61 butyric acid methyl ester, carbon 60, and 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline.

10. The solar tandem cell according to any one of claims 1 to 4, characterized in that: The material of the first tunneling layer and the second tunneling layer is one of indium tin oxide, indium zinc oxide, aluminum zinc oxide, indium zinc oxide, tin dioxide, zinc oxide, aluminum oxide, and conductive metal.