Double-transformer switch positive and negative voltage source device
Through the dual-transformer structure and ADC feedback adjustment method, the problems of inaccurate voltage output and high power consumption in the existing technology are solved, and precise control of voltage output and improvement of system efficiency are achieved to meet high load requirements.
Patent Information
- Application Number
- CN202422850147.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-21
- Publication Date
- 2025-10-03
- Estimated Expiration
- 2034-11-21
AI Technical Summary
Existing switching positive and negative voltage source devices have inaccurate output voltages when the load is unbalanced, and adding resistance to balance the load will lead to increased power consumption and heat generation. The output power is insufficient to meet high load requirements.
A dual-transformer structure is adopted. The first processing module and the second processing module drive the MOS tubes in the first transformation module and the second transformation module respectively. ADC data is used for feedback adjustment and digital filtering to accurately control the voltage of each channel and monitor the load conditions in real time to optimize system efficiency.
The accuracy of voltage output is improved, output power is increased, system efficiency is improved, heat generation is reduced, response time is shortened, and higher load requirements are met.
Smart Images

Figure CN223414795U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of electronic circuits, in particular to a dual-transformer switch positive and negative voltage source device. Background Art
[0002] Existing switching positive and negative voltage source devices typically use a single transformer to output two voltages. As a result, when the load is unbalanced, the output voltage is close to the main output, while the other output voltage may differ significantly from the target voltage. Furthermore, the resistors added to balance the load increase power consumption, reduce system efficiency, and cause severe heat generation. Furthermore, due to design limitations, the output power is also relatively low, making it unable to meet the demands of higher loads. Utility Model Content
[0003] The purpose of the utility model is to provide a dual-transformer switch positive and negative voltage source device to solve the problem of inaccurate voltage output in the prior art.
[0004] The utility model is achieved through the following technical solutions:
[0005] The utility model provides a dual-transformer switch positive and negative voltage source device, comprising a first processing module, a second processing module, a first voltage conversion module and a second voltage conversion module;
[0006] The first voltage transformation module and the second voltage transformation module are respectively connected to the second processing module;
[0007] The second processing module is connected to the first processing module;
[0008] The second processing module is used to drive the MOS tubes in the first transformation module and the second transformation module;
[0009] The first processing module is used to perform feedback adjustment based on the collected ADC data.
[0010] Preferably, the first voltage transformation module includes a first capacitor, a second capacitor, a third capacitor, a first voltage regulator diode, a second voltage regulator diode, a third voltage regulator diode, a fourth voltage regulator diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first MOS transistor and a first transformer;
[0011] The first capacitor, the second capacitor and the first resistor are respectively connected to the first transformer, one end of the first voltage stabilizing diode is connected to the second capacitor and the first resistor, and the other end is connected to the first transformer;
[0012] The second resistor and the second voltage stabilizing diode are connected in parallel, and both ends thereof are connected to the first MOS transistor and the second processing module respectively, and the other end of the first MOS transistor is connected to the first transformer;
[0013] One end of the third capacitor is connected to the first transformer, and the other end is connected to the third voltage stabilizing diode, and the other end of the third voltage stabilizing diode is connected to the first transformer;
[0014] Two ends of the fourth resistor are connected to the fourth voltage stabilizing diode and the third resistor respectively, two ends of the third resistor are connected to the third voltage stabilizing diode and the fifth resistor respectively, and the other end of the fifth resistor is connected to the sixth resistor.
[0015] Preferably, the second voltage transformation module includes a fourth capacitor, a fifth capacitor, a fifth voltage zener diode, a sixth voltage zener diode, a seventh voltage zener diode, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a second MOS transistor and a second transformer;
[0016] The fourth capacitor and the seventh resistor are respectively connected to the second transformer; one end of the fifth voltage stabilizing diode is respectively connected to the fourth capacitor and the seventh resistor, and the other end is respectively connected to the second transformer and the second MOS transistor;
[0017] The eighth resistor and the sixth voltage stabilizing diode are connected in parallel, and both ends thereof are connected to the second MOS transistor and the second processing module respectively, and the other end of the second MOS transistor is connected to the second transformer;
[0018] Two ends of the fifth capacitor are connected to the first transformer and a seventh zener diode respectively, and the other end of the seventh zener diode is connected to the first transformer;
[0019] Two ends of the ninth resistor are connected to the tenth resistor and the seventh voltage-stabilizing diode respectively, and two ends of the eleventh resistor are connected to the twelfth resistor and the seventh voltage-stabilizing diode respectively.
[0020] Preferably, the second processing module includes a first processor and a sixth capacitor, and the sixth capacitor is connected to the first processor.
[0021] Preferably, the first processing module includes a second processor, a seventh capacitor, an eighth capacitor, a thirteenth resistor, a fourteenth resistor, a crystal oscillator and a pin connector;
[0022] The seventh capacitor and the eighth capacitor are respectively connected to the second processor, the crystal oscillator is connected between the seventh capacitor and the eighth capacitor, the thirteenth resistor and the fourteenth resistor are connected to the same interface of the second processor, and the pin connector is connected to the crystal oscillator.
[0023] Preferably, it further includes an inverter, wherein the inverter includes a third processor, an eighth capacitor, a ninth capacitor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and an eighteenth resistor;
[0024] One end of the ninth capacitor and the tenth capacitor connected in parallel is connected to the third processor, one end of the fifteenth resistor is respectively connected to the sixteenth resistor and the third processor, and the other end of the sixteenth resistor is connected to the third processor, one end of the seventeenth resistor is respectively connected to the eighteenth resistor and the third processor, and the other end of the eighteenth resistor is connected to the third processor.
[0025] The technical solution of the embodiment of the utility model has at least the following advantages and beneficial effects:
[0026] The above-mentioned structure of the present invention mainly includes a first processing module, a second processing module, a first voltage conversion module, and a second voltage conversion module. The second processing module is connected to the first processing module and is used to drive the MOS transistors in the first and second voltage conversion modules. The first processing module is used to perform feedback regulation based on the collected ADC data. Through the above-mentioned device, a transformer is added, and each voltage channel uses two ADCs to collect voltage, so that each voltage channel can be precisely controlled, thereby ensuring the accuracy of the voltage output and improving the output power. The first processing module digitally filters the collected ADC data, changes the conduction time of the MOS transistor to change the output voltage, and can also monitor the load condition in real time through the ADC, so that the voltage output can be adjusted to optimize system efficiency and reduce heat generation. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.
[0028] Figure 1 This is a structural diagram of the first transformer module of the present utility model;
[0029] Figure 2 This is a structural diagram of the second voltage transformation module of the present utility model;
[0030] Figure 3 This is a schematic structural diagram of the first processing module and the second processing module of the present invention;
[0031] Figure 4 This is a schematic structural diagram of the inverter of the present utility model.
[0032] Icon: C95-first capacitor C95, C32-second capacitor, C97-third capacitor, C86-fourth capacitor, C96-fifth capacitor, C92-sixth capacitor, C73-seventh capacitor, C72-eighth capacitor, C91-ninth capacitor, tenth capacitor C90, D7-first Zener diode, D8-second Zener diode, D6-third Zener diode, D17-fourth Zener diode, D11-fifth Zener diode, D13-sixth Zener diode, D16-seventh Zener diode, R31-first resistor, R24-second resistor, R77-third resistor, R76-fourth resistor, R46-fifth resistor, R75-sixth resistor, R85-seventh resistor, R83-eighth resistor, R90-ninth resistor, R89-tenth resistor, R87-eleventh resistor, R88-twelfth resistor, R96-thirteenth resistor, R95-fourteenth resistor, R92-fifteenth resistor, R93-sixteenth resistor, R91-seventeenth resistor, R94-eighteenth resistor, Q7-first MOS tube, Q8-second MOS tube, U30.1-second transformer, X4-crystal oscillator, H15-pin header connector, U28-third processor. DETAILED DESCRIPTION
[0033] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.
[0034] Please refer to Figure 1-Figure 4 , the utility model provides a dual-transformer switch positive and negative voltage source device, comprising a first processing module, a second processing module, a first voltage transformation module and a second voltage transformation module;
[0035] The first voltage transformation module and the second voltage transformation module are respectively connected to the second processing module;
[0036] A second processing module is connected to the first processing module;
[0037] The second processing module is used to drive the MOS tubes in the first transformation module and the second transformation module;
[0038] The first processing module is used to perform feedback adjustment based on the collected ADC data.
[0039] The above structure of the present invention mainly includes a first processing module, a second processing module, a first voltage conversion module, and a second voltage conversion module. The second processing module is connected to the first processing module. The second processing module is used to drive the MOS tubes in the first voltage conversion module and the second voltage conversion module. The first processing module is used to perform feedback adjustment through the collected ADC data. Through the above device, a transformer is added, and two ADCs are used to collect voltage for each voltage, so that each voltage can be accurately controlled, thereby ensuring the accuracy of the voltage output and improving the output power. The first processing module digitally filters the collected ADC data, changes the conduction time of the MOS tube to change the size of the output voltage, and can also monitor the load condition in real time through the ADC, so that the voltage output can be adjusted to optimize system efficiency and reduce heat.
[0040] In an exemplary embodiment of the present invention, the first voltage transformation module includes a first capacitor, a second capacitor C32, a third capacitor C97, a first voltage zener diode D7, a second voltage zener diode D8, a third voltage zener diode D6, a fourth voltage zener diode D17, a first resistor R31, a second resistor R24, a third resistor R77, a fourth resistor R76, a fifth resistor R46, a sixth resistor R75, a first MOS transistor Q7, and a first transformer;
[0041] A first capacitor, a second capacitor C32, and a first resistor R31 are respectively connected to the first transformer; one end of the first voltage stabilizing diode D7 is connected to the second capacitor C32 and the first resistor R31, and the other end is connected to the first transformer;
[0042] The second resistor R24 and the second voltage stabilizing diode D8 are connected in parallel, and both ends are connected to the first MOS transistor Q7 and the second processing module respectively. The other end of the first MOS transistor Q7 is connected to the first transformer.
[0043] Two ends of a third capacitor C97 are connected to the first transformer and a third voltage stabilizing diode D6 respectively, and the other end of the third voltage stabilizing diode D6 is connected to the first transformer;
[0044] Two ends of the fourth resistor R76 are connected to the fourth voltage stabilizing diode D17 and the third resistor R77 respectively. Two ends of the third resistor R77 are connected to the third voltage stabilizing diode D6 and the fifth resistor R46 respectively. The other end of the fifth resistor R46 is connected to the sixth resistor R75.
[0045] In this embodiment, the model of the first MOS transistor Q7 is CJAC80SN10, the first capacitor is 100 uF, the second capacitor C32 is 470 nF, the third capacitor C97 is 220 uF, the first resistor R31 is 470 ohms, the second resistor R24 is 5.1 ohms, the third resistor R77 is 100 k ohms, the fourth resistor R76 is 10 k ohms, the fifth resistor R46 is 200 k ohms, and the sixth resistor R75 is 10 k ohms.
[0046] In an exemplary embodiment of the present invention, the second voltage transformation module includes a fourth capacitor C86, a fifth capacitor C96, a fifth voltage zener diode D11, a sixth voltage zener diode D13, a seventh voltage zener diode D16, a seventh resistor R85, an eighth resistor R83, a ninth resistor R90, a tenth resistor R89, an eleventh resistor R87, a twelfth resistor R88, a second MOS transistor Q8, and a second transformer U30.1;
[0047] The fourth capacitor C86 and the seventh resistor R85 are respectively connected to the second transformer. One end of the fifth voltage stabilizing diode D11 is respectively connected to the fourth capacitor C86 and the seventh resistor R85, and the other end is respectively connected to the second transformer U30.1 and the second MOS transistor.
[0048] The eighth resistor R83 and the sixth voltage stabilizing diode D13 are connected in parallel to the second MOS transistor Q8 and the second processing module respectively. The other end of the second MOS transistor Q8 is connected to the second transformer U30.1.
[0049] Two ends of the fifth capacitor C96 are connected to the first transformer and a seventh zener diode D16 respectively, and the other end of the seventh zener diode D16 is connected to the first transformer;
[0050] The nine resistors are connected to the tenth resistor R89 and the seventh voltage zener diode D16 respectively, and the eleventh resistor R87 is connected to the twelfth resistor R88 and the seventh voltage zener diode D16 respectively.
[0051] In this embodiment, the model of the second MOS transistor Q8 is CJAC80SN10, the fourth capacitor C86 is 470nF, the fifth capacitor C96 is 220uF, the seventh resistor R85 is 470 ohms, the eighth resistor R83 is 5.1 ohms, the ninth resistor R90 is 100k ohms, the tenth resistor R89 is 10k ohms, the eleventh resistor R87 is 200k ohms, and the twelfth resistor R88 is 10k ohms.
[0052] In an exemplary embodiment of the present invention, the second processing module includes a first processor and a sixth capacitor C92 , and the sixth capacitor C92 is connected to the first processor.
[0053] Among them, the model of the second processing module is I RS4427STRPBF, the second transformer module is connected to OUTA of the 7th interface, the first transformer module is connected to OUTB of the 5th interface, and the sixth capacitor C92 is connected to the 6th interface.
[0054] In an exemplary embodiment of the present invention, the first processing module includes a second processor, a seventh capacitor C73, an eighth capacitor C72, a thirteenth resistor R96, a fourteenth resistor R95, a crystal oscillator X4, and a pin header connector H15;
[0055] The seventh capacitor C73 and the eighth capacitor C72 are respectively connected to the second processor, the crystal oscillator X4 is connected between the seventh capacitor C73 and the eighth capacitor C72, the thirteenth resistor R96 and the fourteenth resistor R95 are connected to the same interface of the second processor, and the pin connector H15 is connected to the crystal oscillator X4.
[0056] Among them, the model of the second processor is STM32F103C8T6, the seventh capacitor C73 and the eighth capacitor C72 are connected to the 5th and 6th interfaces of the second processor respectively, the thirteenth resistor R96 and the fourteenth resistor R95 are connected to the 13th interface of the second processor, the pin connector H15 is connected to the 42nd and 43rd interfaces of the second processor, and the first processor is connected to the 29th and 30th interfaces of the second processor.
[0057] In this embodiment, an inverter is further included, and the inverter includes a third processor U28, an eighth capacitor C91, a ninth capacitor C92, a fifteenth resistor R92, a sixteenth resistor R93, a seventeenth resistor R91, and an eighteenth resistor R94;
[0058] One end of the ninth capacitor C91 and the tenth capacitor C90 connected in parallel is connected to the third processor, one end of the fifteenth resistor R92 is respectively connected to the sixteenth resistor R93 and the third processor U28, the other end of the sixteenth resistor R93 is connected to the third processor U28, one end of the seventeenth resistor R91 is respectively connected to the eighteenth resistor R94 and the third processor U28, and the other end of the eighteenth resistor R94 is connected to the third processor U28.
[0059] The inverter is connected to the second voltage transformation module and is used to convert the -ADC voltage into a positive voltage.
[0060] Through the above solution provided by the present invention, the voltage output accuracy is improved: the voltage output error is reduced to within ±1%, ensuring stable operation of the equipment.
[0061] Increased output power: The system's maximum output power is increased by 100%, capable of meeting higher load requirements.
[0062] Improved energy conversion efficiency: System efficiency is increased to over 80%, significantly reducing energy loss.
[0063] Reduced heat generation: Under the same load conditions, heat generation is reduced by more than 80%, improving system reliability and safety.
[0064] Shortened response time: The response time to load changes is shortened to within 50 milliseconds, improving the dynamic performance of the system.
[0065] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Those skilled in the art will readily appreciate that the present invention is susceptible to various modifications and variations. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.
Claims
1. A dual-transformer switch positive and negative voltage source device, characterized in that: It includes a first processing module, a second processing module, a first voltage transformation module and a second voltage transformation module; The first voltage transformation module and the second voltage transformation module are respectively connected to the second processing module; The second processing module is connected to the first processing module; The second processing module is used to drive the MOS tubes in the first transformation module and the second transformation module; The first processing module is used to perform feedback adjustment based on the collected ADC data.
2. A dual-transformer switching positive and negative voltage source device according to claim 1, characterized in that: The first voltage transformation module includes a first capacitor, a second capacitor, a third capacitor, a first voltage regulator diode, a second voltage regulator diode, a third voltage regulator diode, a fourth voltage regulator diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first MOS transistor and a first transformer; The first capacitor, the second capacitor and the first resistor are respectively connected to the first transformer, one end of the first voltage stabilizing diode is connected to the second capacitor and the first resistor, and the other end is connected to the first transformer; The second resistor and the second voltage stabilizing diode are connected in parallel, and both ends thereof are connected to the first MOS transistor and the second processing module respectively, and the other end of the first MOS transistor is connected to the first transformer; One end of the third capacitor is connected to the first transformer, and the other end is connected to the third voltage stabilizing diode, and the other end of the third voltage stabilizing diode is connected to the first transformer; Two ends of the fourth resistor are connected to the fourth voltage stabilizing diode and the third resistor respectively, two ends of the third resistor are connected to the third voltage stabilizing diode and the fifth resistor respectively, and the other end of the fifth resistor is connected to the sixth resistor.
3. A dual-transformer switch positive and negative voltage source device according to claim 2, characterized in that: The second voltage transformation module includes a fourth capacitor, a fifth capacitor, a fifth voltage stabilizing diode, a sixth voltage stabilizing diode, a seventh voltage stabilizing diode, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a second MOS transistor and a second transformer; The fourth capacitor and the seventh resistor are respectively connected to the second transformer; one end of the fifth voltage stabilizing diode is respectively connected to the fourth capacitor and the seventh resistor, and the other end is respectively connected to the second transformer and the second MOS transistor; The eighth resistor and the sixth voltage stabilizing diode are connected in parallel, and both ends thereof are connected to the second MOS transistor and the second processing module respectively, and the other end of the second MOS transistor is connected to the second transformer; Two ends of the fifth capacitor are connected to the first transformer and a seventh zener diode respectively, and the other end of the seventh zener diode is connected to the first transformer; Two ends of the ninth resistor are connected to the tenth resistor and the seventh voltage-stabilizing diode respectively, and two ends of the eleventh resistor are connected to the twelfth resistor and the seventh voltage-stabilizing diode respectively.
4. A dual-transformer switching positive and negative voltage source device according to claim 3, characterized in that: The second processing module includes a first processor and a sixth capacitor, and the sixth capacitor is connected to the first processor.
5. The dual-transformer switch positive and negative voltage source device according to claim 4, characterized in that: The first processing module includes a second processor, a seventh capacitor, an eighth capacitor, a thirteenth resistor, a fourteenth resistor, a crystal oscillator and a pin connector; The seventh capacitor and the eighth capacitor are respectively connected to the second processor, the crystal oscillator is connected between the seventh capacitor and the eighth capacitor, the thirteenth resistor and the fourteenth resistor are connected to the same interface of the second processor, and the pin connector is connected to the crystal oscillator.
6. A dual-transformer switching positive and negative voltage source device according to claim 5, characterized in that: Also included is an inverter, the inverter including a third processor, a ninth capacitor, a tenth capacitor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and an eighteenth resistor; One end of the ninth capacitor and the tenth capacitor connected in parallel is connected to the third processor, one end of the fifteenth resistor is respectively connected to the sixteenth resistor and the third processor, and the other end of the sixteenth resistor is connected to the third processor, one end of the seventeenth resistor is respectively connected to the eighteenth resistor and the third processor, and the other end of the eighteenth resistor is connected to the third processor.