Back contact solar cell, cell module and photovoltaic system

Abstract

The utility model is suitable for the technical field of solar cells, and provides a back contact solar cell, a cell assembly and a photovoltaic system, the back contact solar cell comprises a silicon wafer, the silicon wafer is provided with a first surface and a second surface opposite to each other, and the first surface comprises a P area, an N area and an isolation area; the P-type doped layer is arranged in the P region; the N-type doped layer is arranged in the N region; the passivation layer covers the P-type doping layer, the N-type doping layer and the isolation region; the passivation layer on at least partial region of the P-type doping layer has a first thickness, the passivation layer on at least partial region of the N-type doping layer has a second thickness, the passivation layer on at least partial region of the isolation region has a third thickness, the first thickness is greater than the second thickness, and the first thickness is greater than the third thickness. According to the back contact solar cell, the thickness of the passivation layer of the P-type doping layer is increased, the thickness optimization design of the passivation layer is realized, the passivation effect of the P region is improved, and the cell efficiency is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of solar cells, in particular to a back-contact solar cell, a battery assembly and a photovoltaic system. Background Art

[0002] Solar cells convert sunlight into electricity using the photovoltaic effect of semiconductors. They primarily include double-sided contact solar cells and back-contact solar cells. Back-contact solar cells, with their positive and negative electrodes located on the back of the cell, offer a significant improvement in conversion efficiency compared to double-sided contact solar cells, as the front surface of the cell is shielded by metal grid lines, eliminating the optical loss caused by such obstructions.

[0003] In the prior art, the backside of a back-contact solar cell typically includes a P-region and an N-region spaced apart in sequence, with an isolation region disposed between adjacent P and N regions. The P-region is provided with a P-type doped layer, and the N-region is provided with an N-type doped layer, and both the P-type doped layer and the N-type doped layer are covered with a passivation layer. However, the passivation layer thicknesses on the P-type and N-type doped layers are typically set to be the same, without sufficient consideration for optimizing the coordination between the passivation layers on the P-type and N-type doped layers. This results in poor passivation performance in the P-region and suboptimal cell efficiency. Utility Model Content

[0004] The utility model provides a back-contact solar cell, aiming to solve the problems of poor passivation performance of the P region and poor cell efficiency in the back-contact solar cell of the prior art.

[0005] The utility model is implemented by providing a back contact solar cell, comprising:

[0006] A silicon wafer having a first surface and a second surface opposite to each other, wherein the first surface includes a P region, an N region, and an isolation region provided between the P region and the N region;

[0007] A P-type doped layer provided in the P region;

[0008] an N-type doped layer provided in the N region;

[0009] a passivation layer, the passivation layer covering the P-type doped layer, the N-type doped layer and the isolation region;

[0010] In which, the passivation layer on at least a portion of the P-type doped layer has a first thickness, the passivation layer on at least a portion of the N-type doped layer has a second thickness, and the passivation layer on at least a portion of the isolation region has a third thickness, the first thickness is greater than the second thickness, and the first thickness is greater than the third thickness.

[0011] Preferably, the second thickness is greater than or equal to the third thickness.

[0012] Preferably, the ratio of the first thickness to the second thickness is greater than 1 and less than or equal to 2.2.

[0013] Preferably, the ratio of the first thickness to the second thickness is 1.02 to 1.8.

[0014] Preferably, the difference between the first thickness and the second thickness is 2.5 nm to 52 nm.

[0015] Preferably, the first thickness is 55 nm to 260 nm, and the second thickness is 50 nm to 220 nm.

[0016] Preferably, the first surface includes a first edge region and a first middle region, the first middle region is located inside the first edge region, and the first edge region is closer to the edge of the first surface than the first middle region;

[0017] The passivation layer located in the first middle region on the P-type doping layer has the first thickness, and the passivation layer located in the first middle region on the N-type doping layer has the second thickness.

[0018] Preferably, the passivation layer located in the first edge region on the P-type doped layer has a fourth thickness, the passivation layer located in the first edge region on the N-type doped layer has a fifth thickness, the fourth thickness is greater than the first thickness, the fifth thickness is greater than the second thickness, and the fourth thickness is greater than the fifth thickness.

[0019] Preferably, the ratio of the fourth thickness to the first thickness is greater than 1.2 and less than or equal to 3.2.

[0020] Preferably, the ratio of the fifth thickness to the second thickness is greater than 1 and less than or equal to 3.

[0021] Preferably, the silicon wafer also includes multiple side surfaces connecting the first surface and the second surface; the passivation layer covers at least part of the side surface, and the passivation layer in at least part of the side surface has a sixth thickness, and the sixth thickness is greater than the first thickness.

[0022] Preferably, the second surface includes a second edge region and a second middle region, and the second middle region is located inside the second edge region;

[0023] The passivation layer also covers the second surface. The passivation layer on the second edge region has a seventh thickness. The passivation layer on the second middle region has an eighth thickness. The seventh thickness is greater than the eighth thickness.

[0024] Preferably, the isolation region is a trench formed on the first surface, and the passivation layer covers the side surfaces and bottom surface of the trench.

[0025] Preferably, it also includes:

[0026] The tunneling layer is provided between the P-type doping layer and the silicon wafer and between the N-type doping layer and the silicon wafer.

[0027] Preferably, the distance from the back side of the passivation layer at the P region position on the first surface to the second surface is greater than the distance from the back side of the passivation layer at the N region on the first surface to the second surface, and the distance from the back side of the passivation layer at the N region on the first surface to the second surface is greater than the distance from the back side of the passivation layer at the isolation region on the first surface to the second surface.

[0028] Preferably, the passivation layer is a stack of one or at least two of an aluminum oxide film layer, a silicon oxide film layer, a silicon oxynitride film layer, and a silicon nitride film layer.

[0029] The utility model also provides a battery assembly, comprising the above-mentioned back-contact solar cell.

[0030] The utility model also provides a photovoltaic system, comprising the above-mentioned battery assembly.

[0031] The utility model provides a back-contact solar cell, by setting the thickness of at least a portion of the passivation layer on the P-type doping layer to be greater than the thickness of at least a portion of the passivation layer on the N-type doping layer, and setting the thickness of at least a portion of the passivation layer on the P-type doping layer to be greater than the thickness of at least a portion of the passivation layer on the isolation region. In this way, by thickening the thickness of the passivation layer on the P-type doping layer, the passivation layer on the P-type doping layer is made thicker than the passivation layer on the N-type doping layer and the isolation region, thereby achieving an optimized design of the thickness of the passivation layer on the P-type doping layer, the N-type doping layer and the isolation region, which can improve the passivation effect of the P region, thereby improving the cell efficiency of the back-contact solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic structural diagram of a back-contact solar cell provided by an embodiment of the present utility model;

[0033] Figure 2 A schematic structural diagram of another back-contact solar cell provided in an embodiment of the present utility model. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0035] An embodiment of the present invention provides a back-contact solar cell by setting the thickness of at least a portion of the passivation layer on the P-type doping layer to be greater than the thickness of at least a portion of the passivation layer on the N-type doping layer, and setting the thickness of at least a portion of the passivation layer on the P-type doping layer to be greater than the thickness of at least a portion of the passivation layer on the isolation region. In this way, by thickening the thickness of the passivation layer of the P-type doping layer, the passivation layer on the P-type doping layer is made thicker than the passivation layers on the N region and the isolation region, thereby achieving an optimized design of the thickness of the passivation layer on the P-type doping layer, the N-type doping layer and the isolation region, which can enhance the passivation effect of the P region, thereby enhancing the cell efficiency of the back-contact solar cell.

[0036] Please refer to Figure 1 The present invention provides a back-contact solar cell, comprising:

[0037] A silicon wafer 1 having a first surface 11 and a second surface 12 opposite to each other, wherein the first surface 11 includes a P region 111, an N region 112, and an isolation region 113 disposed between the P region 111 and the N region 112;

[0038] A P-type doped layer 2 provided in the P region 111;

[0039] an N-type doped layer 3 provided in the N region 112;

[0040] A passivation layer 4, the passivation layer 4 covers the P-type doped layer 2, the N-type doped layer 3 and the isolation region 113;

[0041] Among them, the passivation layer 4 on at least a portion of the P-type doped layer 2 has a first thickness D1, the passivation layer 4 on at least a portion of the N-type doped layer 3 has a second thickness D2, and the passivation layer 4 on at least a portion of the isolation region 113 has a third thickness D3. The first thickness D1 is greater than the second thickness D2, and the first thickness D1 is greater than the third thickness D3.

[0042] Because the P-type doped layer 2 of the back-contact solar cell has a poorer passivation effect than the N-type doped layer 3, and the passivation layer 4 on the P-type doped layer 2 in the related art has the same thickness as the passivation layer 4 on the N-type doped layer 3 and the isolation region 113, the passivation effect of the P region 111 is poor, affecting the cell efficiency. In the back-contact solar cell provided by the embodiment of the present invention, the thickness of at least a portion of the passivation layer 4 on the P-type doped layer 2 is greater than the thickness of at least a portion of the passivation layer 4 on the N-type doped layer 3, and the thickness of at least a portion of the passivation layer 4 on the P-type doped layer 2 is greater than the thickness of at least a portion of the passivation layer 4 on the isolation region 113, that is, the first thickness D1 is greater than the second thickness D2, and the first thickness D1 is greater than the third thickness D3. In this way, by thickening the thickness of the passivation layer 4 of the P-type doped layer 2, the passivation layer 4 on the P-type doped layer 2 is made thicker than the passivation layer 4 on the N region 112 and the passivation layer 4 of the isolation region 113, thereby achieving an optimized design of the thickness of the passivation layer 4 of the P-type doped layer 2, the N-type doped layer 3 and the isolation region 113, thereby improving the passivation effect of the P region 111, thereby improving the cell efficiency of the back-contact solar cell.

[0043] Specifically, in the embodiments of the present application, the first surface 11 may be the back side of the silicon wafer 1, and the second surface 12 may be the front side of the silicon wafer 1. The silicon wafer 1 may be a P-type silicon wafer or an N-type silicon wafer, without limitation thereto. The P-type doped layer 2 may be a P-type doped polycrystalline silicon layer, a P-type doped microcrystalline silicon layer, or the like, and the N-type doped layer 3 may be an N-type doped polycrystalline silicon layer, an N-type doped microcrystalline silicon layer, or the like. The P-type doped layer 2 and the N-type doped layer 3 may be prepared by diffusion, deposition, or the like, without limitation thereto.

[0044] It should be noted that, in the embodiment of the present invention, the thickness of the passivation layer 4 on the P-type doped layer 2 may be greater than the thickness of the passivation layer 4 on the N-type doped layer 3 in only some areas, or the thickness of the passivation layer 4 on the P-type doped layer 2 may be greater than the thickness of the passivation layer 4 on the N-type doped layer 3 in all areas; similarly, the thickness of the passivation layer 4 on the N-type doped layer 3 may be greater than the thickness of the passivation layer 4 on the isolation region 113 in only some areas, or the thickness of the passivation layer 4 on the N-type doped layer 3 may be greater than the thickness of the passivation layer 4 on the isolation region 113 in all areas.

[0045] It can be understood that in the back-contact solar cell, the first surface 11 has a plurality of P-type doped layers 2 and a plurality of N-type doped layers 3 , and the plurality of P-type doped layers 2 and the plurality of N-type doped layers 3 are alternately arranged in sequence.

[0046] As an embodiment of the present invention, the P-type doped layer 2 and the N-type doped layer 3 are one or a combination of at least two of doped polycrystalline silicon, doped microcrystalline silicon, doped nanocrystalline silicon, and doped amorphous silicon. Preferably, the P-type doped layer 2 and the N-type doped layer 3 are doped polycrystalline silicon.

[0047] In this embodiment, the P-type doping layer 2 is doped with a P-type dopant, and the N-type doping layer 3 is doped with an N-type dopant. The P-type dopant is a Group IIIA element dopant, and the N-type dopant is a Group VA element dopant. For example, the P-type dopant may be a boron dopant, and the N-type dopant may be a phosphorus dopant.

[0048] In the embodiment of the present invention, the P-type doping layer 2 and the N-type doping layer 3 may be single-layer doping layers, or may include two, three or more layers of doping layers to further enhance the battery passivation effect.

[0049] As an embodiment of the present invention, a ratio of the first thickness D1 to the second thickness D2 is greater than 1 and less than or equal to 2.2.

[0050] Specifically, in such an embodiment, the ratio of the first thickness D1 to the second thickness D2 can be any value of 1.01, 1.05, 1.1, 1.16, 1.2, 1.28, 1.3, 1.36, 1.4, 1.42, 1.5, 1.55, 1.6, 1.65, 1.7, 1.75, 1.8, 1.85, 1.9, 1.95, 2, 2.05, 2.1, 2.15, and 2.2, and is not limited thereto.

[0051] The ratio of the first thickness D1 to the second thickness D2 is preferably 1 and less than or equal to 2.2. The inventors of this application have found through repeated research and verification that setting the ratio of the first thickness D1 to the second thickness D2 within this preferred range can significantly improve the passivation effect in the area corresponding to the P region 111, thereby improving battery efficiency.

[0052] As an embodiment of the present invention, the ratio of the first thickness D1 to the second thickness D2 is 1.02-1.8.

[0053] Specifically, in such an embodiment, the ratio of the first thickness D1 to the second thickness D2 can be any value among 1.02, 1.05, 1.1, 1.16, 1.2, 1.28, 1.3, 1.36, 1.4, 1.42, 1.5, 1.55, 1.6, 1.65, 1.7, 1.75, and 1.8, and is not limited here.

[0054] The ratio of the first thickness D1 to the second thickness D2 is preferably 1.02 to 1.8. The inventors of this application have found through repeated research and verification that setting the ratio of the first thickness D1 to the second thickness D2 within this preferred range can further enhance the passivation effect of the area corresponding to the P region 111, thereby improving battery efficiency while maintaining a low cost.

[0055] As an embodiment of the present invention, the first thickness D1 is 55 nm to 260 nm, and the second thickness D2 is 50 nm to 220 nm.

[0056] Specifically, in such an embodiment, the first thickness D1 can be any value selected from the group consisting of 52 nm, 60 nm, 80 nm, 95 nm, 100 nm, 110 nm, 125 nm, 130 nm, 140 nm, 150 nm, 165 nm, 170 nm, 180 nm, 185 nm, 190 nm, 200 nm, 210 nm, 220 nm, 230 nm, 240 nm, 250 nm, and 260 nm, without limitation thereto. The second thickness D2 can be any value selected from the group consisting of 50 nm, 55 nm, 90 nm, 95 nm, 100 nm, 110 nm, 125 nm, 130 nm, 140 nm, 150 nm, 165 nm, 170 nm, 180 nm, 185 nm, 190 nm, 200 nm, 210 nm, and 220 nm, without limitation thereto.

[0057] As an embodiment of the present invention, the difference between the first thickness D1 and the second thickness D2 is 2.5 nm to 52 nm.

[0058] Specifically, in such an embodiment, the difference between the first thickness D1 and the second thickness D2 can be any value of 2.5nm, 3nm, 5nm, 8nm, 10nm, 12nm, 14nm, 15nm, 18nm, 20nm, 25nm, 28nm, 30nm, 35nm, 36nm, 39nm, 40nm, 42nm, 45nm, 48nm, 50nm, 51nm, and 52nm, and is not limited here.

[0059] As an embodiment of the present invention, the second thickness D2 is greater than or equal to the third thickness D3.

[0060] In this embodiment, the thickness of at least a portion of the passivation layer 4 on the N-type doped layer 3 is greater than or equal to the thickness of at least a portion of the passivation layer 4 on the isolation region 113, that is, the second thickness D2 is greater than or equal to the third thickness D3. In the present application, the thickness of only a portion of the passivation layer 4 on the N-type doped layer 3 may be greater than or equal to the thickness of the portion of the passivation layer 4 on the isolation region 113, or the thickness of the entire passivation layer 4 on the N-type doped layer 3 may be greater than or equal to the thickness of the entire passivation layer 4 on the isolation region 113.

[0061] In this way, the passivation layer 4 on the N-type doped layer 3 is thicker than the passivation layer 4 on the isolation region 113, or the passivation layer 4 on the N-type doped layer 3 is equal in thickness to the passivation layer 4 on the isolation region 113, which is beneficial to improving the passivation effect of the N region 112, thereby improving the battery efficiency, and can reduce the material usage of the passivation layer 4 on the isolation region 113, thereby reducing production costs.

[0062] As an embodiment of the present invention, the first surface 11 includes a first edge region A and a first middle region B. The first middle region B is located inside the first edge region A. The first edge region A is closer to the edge of the first surface 11 than the first middle region B.

[0063] The passivation layer 4 of the P-type doped layer 2 located in the first middle region B has a first thickness D1 , and the passivation layer 4 of the N-type doped layer 3 located in the first middle region B has a second thickness D2 .

[0064] In this way, the thickness of the passivation layer 4 in the middle area of ​​the P-type doped layer 2 can be made greater than the thickness of the passivation layer 4 in the middle area of ​​the N-type doped layer 3, thereby improving the passivation effect of the passivation layer 4 in the P region 111 in the middle area, thereby improving the performance of the solar cell.

[0065] As an embodiment of the present invention, the passivation layer 4 located in the first edge area A on the P-type doped layer 2 has a fourth thickness D4, and the passivation layer 4 located in the first edge area A on the N-type doped layer 3 has a fifth thickness D5. The fourth thickness D4 is greater than the first thickness D1, the fifth thickness D5 is greater than the second thickness D2, and the fourth thickness D4 is greater than the fifth thickness D5.

[0066] In this way, the thickness of the passivation layer 4 at the edge region of the P-type doped layer 2 can also be greater than the thickness of the passivation layer 4 at the edge region of the N-type doped layer 3, that is, the fourth thickness D4 is greater than the fifth thickness D5, further enhancing the passivation effect of the P region 111 in the edge region, thereby improving the performance of the back-contact solar cell. Moreover, the fourth thickness D4 is greater than the first thickness D1, so that the thickness of the passivation layer 4 at the edge region of the P-type doped layer 2 is greater than the thickness of the passivation layer 4 at the middle region of the P-type doped layer 2, thereby enhancing the passivation effect at the edge of the P region 111; the fifth thickness D5 is greater than the second thickness D2, so that the thickness of the passivation layer 4 at the edge region of the N-type doped layer 3 is greater than the thickness of the passivation layer 4 at the middle region of the N-type doped layer 3, thereby enhancing the passivation effect at the edge of the N region 112.

[0067] As an embodiment of the present invention, a ratio of the fourth thickness D4 to the first thickness D1 is greater than 1.2 and less than or equal to 3.2.

[0068] The ratio of the fourth thickness D4 to the first thickness D1 may be any value among 1.2, 1.3, 1.5, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, and 3.2.

[0069] Among them, the ratio of the fourth thickness D4 to the first thickness D1 is greater than 1.2 and less than or equal to 3.2. Setting the ratio of the first thickness D1 to the second thickness D2 within this preferred range can significantly improve the passivation effect of the edge area of ​​the P region 111, which is beneficial to improving battery efficiency.

[0070] As an embodiment of the present invention, a ratio of the fifth thickness D5 to the second thickness D2 is greater than 1 and less than or equal to 3.

[0071] Among them, the ratio of the fifth thickness D5 to the second thickness D2 can be any value among 1.01, 1.2, 1.5, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, and 3.0.

[0072] The ratio of the fifth thickness D5 to the second thickness D2 is greater than 1 and less than or equal to 3, which can significantly improve the passivation effect of the edge area of ​​the N region 112, thereby improving battery efficiency.

[0073] Please refer to Figure 2As an embodiment of the present invention, the silicon wafer 1 further includes a plurality of side surfaces 13 connecting the first surface 11 and the second surface 12; the passivation layer 4 covers at least a portion of the side surface 13, and the passivation layer 4 in at least a portion of the side surface 13 has a sixth thickness D6, and the sixth thickness D6 is greater than the first thickness D1.

[0074] In this embodiment, the passivation layer 4 covers at least a portion of the side surface 13, which can passivate the side surface 13 of the silicon wafer 1, reduce edge recombination, and at the same time achieve a better matching state of the passivation effect in various regions of the silicon wafer 1, thereby further improving the battery efficiency.

[0075] As an embodiment of the present invention, the second surface 12 has a second edge region C and a second middle region D, and the second middle region D is located inside the second edge region C;

[0076] The passivation layer 4 also covers the second surface 12 . The passivation layer 4 on the second edge region C has a seventh thickness D7 . The passivation layer 4 on the second middle region D has an eighth thickness D8 . The seventh thickness D7 is greater than the eighth thickness D8 .

[0077] In this embodiment, the second edge region C is located at the junction of the second surface 12 and the side surface 13. The passivation layer 4 covers the second surface 12 of the silicon wafer 1, which can passivate the second surface 12 of the silicon wafer 1, thereby further improving the cell efficiency. The thickness of the passivation layer 4 in the second edge region C is greater than the thickness of the passivation layer 4 in the second intermediate region D, that is, the seventh thickness D7 is greater than the eighth thickness D8. This can enhance the passivation effect of the edge region of the second surface 12 and reduce edge recombination.

[0078] As an embodiment of the present invention, the isolation region 113 is a trench formed on the first surface 11, and the passivation layer 4 covers the side and bottom surfaces of the trench. The thickness of the passivation layer 4 on the side and bottom surfaces of the trench may be equal or unequal.

[0079] In this embodiment, a trench is formed on the back side of the silicon wafer 1, and the P-type doped layer 2 and the N-type doped layer 3 are isolated by the trench, thereby improving the isolation effect between the P-type doped layer 2 and the N-type doped layer 3. The passivation layer 4 covers the side and bottom surfaces of the trench 121, thereby improving the passivation matching effect at the trench 121, thereby improving the overall passivation performance and enhancing the performance of the solar cell.

[0080] As an embodiment of the present invention, it also includes:

[0081] The tunneling layer 5 is disposed between the P-type doped layer 2 and the silicon wafer 1 and between the N-type doped layer 3 and the silicon wafer 1 .

[0082] In this embodiment, the tunneling layer 5 is one or a stack of at least two of a silicon oxide layer, a silicon oxynitride layer, and a silicon nitride layer.

[0083] In this embodiment, tunneling layer 5 performs tunneling and passivation functions on the surface of silicon wafer 1, thereby improving solar cell efficiency. The thickness of tunneling layer 5 in P region 111 and N region 112 can be set according to actual conditions. For example, the thickness of tunneling layer 5 can be 0.5 to 5 nanometers.

[0084] As an embodiment of the present invention, the distance from the back surface of the passivation layer 4 at the P region 111 on the first surface 11 to the second surface 12 is greater than the distance from the back surface of the passivation layer 4 at the N region 112 on the first surface 11 to the second surface 12, and the distance from the back surface of the passivation layer 4 at the N region 112 on the first surface 11 to the second surface 12 is greater than the distance from the back surface of the passivation layer 4 at the isolation region 113 on the first surface 11 to the second surface 12. The back surface of the passivation layer 4 is the side of the passivation layer 4 facing away from the silicon wafer 1.

[0085] In this embodiment, the sum of the thicknesses of the silicon wafer 1, the tunneling layer 5, the P-type doped layer 2, and the passivation layer 4 on the back side of the P-type doped layer 2 in the P region 111 is greater than the sum of the thicknesses of the silicon wafer 1, the tunneling layer 5, the N-type doped layer 3, and the passivation layer 4 on the back side of the N-type doped layer 3 in the N region 112, and the sum of the thicknesses of the silicon wafer 1, the tunneling layer 5, the N-type doped layer 3, and the passivation layer 4 on the back side of the N-type doped layer 3 in the N region 112 is greater than the sum of the thicknesses of the silicon wafer 1 and the passivation layer 4 in the isolation region 113.

[0086] In this embodiment, since the passivation layer 4 of the P region 111 is thicker than the passivation layer 4 of the N region 112 and the isolation region 113, the passivation layer 4 of the P region 111 has an anti-scratch effect on the P-type doped layer 2, and the P region 111 is not easily scratched during battery transmission. Therefore, the distance from the back of the passivation layer 4 at the position of the P region 111 on the first surface 11 to the second surface 12 is greater than the distance from the back of the passivation layer 4 of the N region 112 on the first surface 11 to the second surface 12, and the distance from the back of the passivation layer 4 of the N region 112 on the first surface 11 to the second surface 12 is greater than the distance from the back of the passivation layer 4 of the N region 112 on the first surface 11 to the second surface 12. The distance from the back side of the passivation layer 4 of the isolation area 113 on the first surface 11 to the second surface 12 is greater than that of the isolation area 113, so that the height of the P area 111 is higher than that of the N area 112 and the isolation area 113, so that during the transmission of the solar cell, only the passivation layer 4 of the P area 111 is in contact with the conveyor belt, while there is a certain gap between the N area 112 and the isolation area 113 and the conveyor belt, so that they are suspended in the air. Therefore, the N area 112 and the isolation area 113 are prevented from being scratched by the conveyor belt during transmission, thereby solving the problem of scratches caused by the conveyor belt during the battery preparation process.

[0087] As an embodiment of the present invention, the passivation layer 4 is a stack of one or at least two of an aluminum oxide film layer, a silicon oxide film layer, a silicon oxynitride film layer, and a silicon nitride film layer.

[0088] The passivation layer 4 may be a single layer or a stack of two or more layers. The materials of the passivation layer 4 in the P region 111, the N region 112, and the isolation region 113 may be the same or different. For example, the passivation layer 4 may include an aluminum oxide layer and a silicon nitride layer sequentially disposed from the first surface 11 away from the silicon wafer 1.

[0089] In this embodiment, the passivation layer 4 can be a split-processing structure, that is, deposited in steps, to facilitate controlling the thickness difference of the passivation layer 4 in different areas of the P region 111, the N region 112 and the isolation region 113. Of course, the passivation layer 4 can also be an integrated processing structure.

[0090] In addition, it can also be understood that in the back-contact solar cell, a P-type electrode and an N-type electrode (not shown in the figure) are also provided. The P-type electrode penetrates the passivation layer 4 and contacts the P-type doped layer 2, and the N-type electrode penetrates the passivation layer 4 and contacts the N-type doped layer 3.

[0091] The present invention also provides a battery assembly comprising the back-contact solar cell of the aforementioned embodiment. It should be noted that the battery assembly and the back-contact solar cell have the same or similar beneficial effects, and the relevant aspects between the two can be referenced to each other. To avoid repetition, they will not be described here.

[0092] In this embodiment, multiple back-contact solar cells in the battery assembly can be connected in series in sequence to form a battery string, thereby realizing the series bus output of the current. For example, the series connection of the battery cells can be realized by setting welding strips (bus bars, interconnecting bars), conductive back plates, etc.

[0093] It is understood that in such an embodiment, the battery assembly may further include a metal frame, a backsheet, photovoltaic glass, and an adhesive film. The adhesive film may be filled between the front and back surfaces of the back-contact solar cell, the photovoltaic glass, adjacent cells, etc., and may be a transparent colloid with good light transmittance and aging resistance. For example, the adhesive film may be EVA film or POE film. The specific choice can be made according to actual conditions and is not limited here.

[0094] Photovoltaic glass can be applied to the adhesive film on the front surface of the back-contact solar cell. The photovoltaic glass can be ultra-clear glass, which offers high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can have a light transmittance exceeding 92%, protecting the back-contact solar cell while minimizing its efficiency. The adhesive film also bonds the photovoltaic glass to the back-contact solar cell, providing sealing, insulation, and waterproofing.

[0095] A backsheet can be attached to the film on the back of the back-contact solar cell. The backsheet provides protection and support for the back-contact solar cell, offering reliable insulation, water resistance, and aging resistance. Multiple backsheet options are available, typically including tempered glass, organic glass, and aluminum alloy TPT composite film. The specific backsheet material can be configured based on specific circumstances and is not limited here. The backsheet, back-contact solar cell, film, and photovoltaic glass assembly can be mounted on a metal frame. The metal frame serves as the primary external support structure for the entire solar cell assembly and provides stable support and mounting for the assembly. For example, the metal frame allows the solar cell assembly to be mounted in the desired location.

[0096] The present invention also provides a photovoltaic system comprising the battery assembly of the above embodiment. It should be noted that the photovoltaic system has the same or similar beneficial effects as the above-mentioned back-contact solar cell, and the relevant aspects between the two can be referenced to each other. To avoid repetition, they will not be described here.

[0097] In this embodiment, the photovoltaic system can be applied to photovoltaic power stations, such as ground power stations, rooftop power stations, water surface power stations, etc., and can also be applied to equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array can be an array combination of multiple solar cell modules. For example, multiple solar cell modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter to be converted into the alternating current required by the mains power grid and then connected to the mains power network to achieve solar power supply.

[0098] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A back contact solar cell, characterized in that: include: A silicon wafer having a first surface and a second surface opposite to each other, wherein the first surface includes a P region, an N region, and an isolation region provided between the P region and the N region; A P-type doped layer provided in the P region; an N-type doped layer provided in the N region; a passivation layer, the passivation layer covering the P-type doped layer, the N-type doped layer and the isolation region; In which, the passivation layer on at least a portion of the P-type doped layer has a first thickness, the passivation layer on at least a portion of the N-type doped layer has a second thickness, and the passivation layer on at least a portion of the isolation region has a third thickness, the first thickness is greater than the second thickness, and the first thickness is greater than the third thickness.

2. The back contact solar cell according to claim 1, wherein: The second thickness is greater than or equal to the third thickness.

3. The back contact solar cell according to claim 1, wherein: A ratio of the first thickness to the second thickness is greater than 1 and less than or equal to 2.

2.

4. The back contact solar cell according to claim 1, wherein: The ratio of the first thickness to the second thickness is 1.02 to 1.

8.

5. The back contact solar cell according to claim 1, wherein: The difference between the first thickness and the second thickness is 2.5 nm to 52 nm.

6. The back contact solar cell according to claim 1, wherein: The first thickness is 55 nm to 260 nm, and the second thickness is 50 nm to 220 nm.

7. The back contact solar cell according to claim 1, wherein: The first surface includes a first edge region and a first middle region, the first middle region is located inside the first edge region, and the first edge region is closer to the edge of the first surface than the first middle region; The passivation layer located in the first middle region on the P-type doping layer has the first thickness, and the passivation layer located in the first middle region on the N-type doping layer has the second thickness.

8. The back contact solar cell according to claim 7, characterized in that The passivation layer located in the first edge area on the P-type doped layer has a fourth thickness, the passivation layer located in the first edge area on the N-type doped layer has a fifth thickness, the fourth thickness is greater than the first thickness, the fifth thickness is greater than the second thickness, and the fourth thickness is greater than the fifth thickness.

9. The back contact solar cell according to claim 8, characterized in that A ratio of the fourth thickness to the first thickness is greater than 1.2 and less than or equal to 3.

2.

10. The back contact solar cell according to claim 8, characterized in that A ratio of the fifth thickness to the second thickness is greater than 1 and less than or equal to 3.

11. The back contact solar cell according to claim 1, wherein: The silicon wafer also includes multiple side surfaces connecting the first surface and the second surface; the passivation layer covers at least part of the side surfaces, and the passivation layer on at least part of the side surfaces has a sixth thickness, and the sixth thickness is greater than the first thickness.

12. The back contact solar cell according to claim 11, characterized in that The second surface includes a second edge region and a second middle region, and the second middle region is located inside the second edge region; The passivation layer also covers the second surface. The passivation layer on the second edge region has a seventh thickness. The passivation layer on the second middle region has an eighth thickness. The seventh thickness is greater than the eighth thickness.

13. The back contact solar cell according to claim 1, wherein: The isolation region is a trench formed on the first surface, and the passivation layer covers the side surfaces and bottom surface of the trench.

14. The back contact solar cell according to claim 1, wherein: Also includes: The tunneling layer is provided between the P-type doping layer and the silicon wafer and between the N-type doping layer and the silicon wafer.

15. The back contact solar cell according to claim 1, wherein The distance from the back side of the passivation layer at the P region position on the first surface to the second surface is greater than the distance from the back side of the passivation layer at the N region on the first surface to the second surface, and the distance from the back side of the passivation layer at the N region on the first surface to the second surface is greater than the distance from the back side of the passivation layer at the isolation region on the first surface to the second surface.

16. The back contact solar cell according to claim 1, wherein: The passivation layer is a stack of one or at least two of an aluminum oxide film layer, a silicon oxide film layer, a silicon oxynitride film layer, and a silicon nitride film layer.

17. A battery assembly, characterized in that: The invention comprises a back-contact solar cell according to any one of claims 1 to 16.

18. A photovoltaic system, characterized in that: Comprising the battery assembly as claimed in claim 17.

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