Circuit for driving high-power electromagnetic valve based on NMOS (N-channel Metal Oxide Semiconductor) tube

Abstract

The utility model belongs to the technical field of electromagnetic valve control, and particularly discloses a circuit for driving a high-power electromagnetic valve based on an NMOS (N-channel Metal Oxide Semiconductor) tube, which comprises an NMOS driving unit, a main control unit and a power supply unit, and is characterized in that the NMOS driving unit comprises four groups of NMOS switching circuits used for connecting ADC (Analog to Digital Converter) sampling output signals; the NMOS driving unit comprises four groups of NMOS switching circuits, the main control unit comprises a control circuit and a filter circuit used for filtering the control circuit, one end of each NMOS switching circuit is connected with the control circuit, the NMOS driving unit, the main control unit and the power supply unit are matched, the four groups of NMOS switching circuits are connected with an ADC sampling output signal, and the ADC sampling output signal is connected with the power supply unit. An NMOS tube is adopted to drive a high-power electromagnetic valve, so that the controller is small in overall size and high in stability, no mechanical structure exists in the MOS tube, the function does not lose efficacy after long-time vibration, vibration resistance is achieved, and the control effect on the electromagnetic valve is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of electromagnetic valve control, in particular to a circuit for driving a high-power electromagnetic valve based on an NMOS tube. Background Art

[0002] Solenoid valves are industrial equipment controlled by electromagnetics. They are basic automation components used to control fluids. They are actuators and are not limited to hydraulic and pneumatic systems. Currently, solenoid valve control methods usually use relays to drive them. The contacts of relays are divided into two states: normally open and normally closed. When the relay is not powered, the normally closed contact is closed and the normally open contact is open. When the relay is powered, the normally open contact is closed and the normally closed contact is open. This switching of contacts realizes the connection or disconnection of the circuit.

[0003] However, since the solenoid valve contains one or more electromagnetic coils, when power is applied, a magnetic field is generated, which attracts the chip to move to change the flow direction or flow of the fluid. In order to ensure that the solenoid valve can respond quickly and work stably, the driving power of the solenoid valve needs to be increased, which causes the relay used to be large in appearance and the controller to be large in size. In addition, due to the large size of the controller, its stability is poor. Due to the internal structure of the relay, it will not be able to close after a long period of vibration, thereby affecting the control effect of the solenoid valve. Therefore, we need to propose a circuit based on NMOS tube to drive high-power solenoid valve to solve the above problems, so that it can use NMOS tube to drive high-power solenoid valve, make the overall size of the controller small, vibration-resistant, and improve the control effect of the solenoid valve. Utility Model Content

[0004] The purpose of the utility model is to provide a circuit based on NMOS tube driving a high-power solenoid valve. By using NMOS tube to drive the high-power solenoid valve, the controller has a small overall size and is resistant to vibration, thereby improving the control effect of the solenoid valve and solving the problems raised in the background technology.

[0005] To achieve the above objectives, the present invention provides the following technical solutions: a circuit for driving a high-power solenoid valve based on an NMOS tube, comprising an NMOS drive unit, a main control unit, and a power supply unit. The NMOS drive unit comprises four groups of NMOS switch circuits for connecting to ADC sampling output signals;

[0006] The main control unit includes a control circuit and a filter circuit for filtering the control circuit, and one end of each of the four groups of NMOS switch circuits is connected to the control circuit;

[0007] The power supply unit includes a step-down circuit, an interface circuit with a voltage stabilization effect, and an on-off switch circuit. The interface circuit is connected to the other end of the NMOS switch circuit, the step-down circuit is connected to the interface circuit, and the on-off switch circuit is connected to the control circuit.

[0008] Preferably, the NMOS switch circuit includes an NPN-type transistor Y2 and a MOS transistor U5. The gate of the MOS transistor U5 is connected to a resistor R42, one end of the resistor R42 is connected to the collector of the transistor Y2, and the connecting end of the transistor Y2 and the resistor R42 is connected to a resistor R10 for connecting to a 5V voltage. The emitter of the transistor Y2 and the source of the MOS transistor U5 are both grounded. The base of the transistor Y2 is connected to a resistor R6, one end of the resistor R6 is connected to the main control circuit, and the connecting end of the resistor R6 and the main control circuit is connected to a resistor R37 for connecting to a 3.3V voltage. The drain of the MOS transistor U5 is connected to a resistor R22 for connecting to the main control circuit and a diode Ln3 for connecting to a step-down circuit. The connecting end of the drain of the MOS transistor U5 and the diode Ln3 is provided with a pin YV for connecting to an interface circuit.

[0009] Preferably, the step-down circuit includes a step-down chip U4 and a voltage regulator U8, wherein capacitors C17, C18, C33, C38, C39 and C40 are connected in parallel between the input terminal and the ground terminal of the step-down chip U4, and one end of the capacitor C33 is connected to a diode Ln12, and one end of the diode Ln12 is connected to a fuse Fusel for connecting to the VIN input power supply, and a diode Ln2, a capacitor C10, a capacitor C10 and a fuse Fusel are connected in parallel between the output terminal and the ground terminal of the step-down chip U4. 25, capacitor C14, capacitor C15 and capacitor C16, and the connection end of the diode Ln2 and the buck chip U4 is connected to the inductor L3, one end of the inductor L3 is connected to one end of the capacitor C10 and the FB end of the buck chip U4, the connection end of the capacitor C15 and the capacitor C16 is connected to a 5V connection end for connecting to the input end of the voltage regulator chip U8, a capacitor C13 is connected between the input end and the ground end of the voltage regulator chip U8, and a capacitor C24 is connected between the output end of the voltage regulator chip U8 and the ground end.

[0010] Preferably, the interface circuit includes a connection terminal J4, pins 3 to 6 of the connection terminal J4 are respectively connected to four groups of NMOS switch circuits, pin 2 of the connection terminal J4 is connected to a resistor R47, one end of the resistor R47 is connected to a transistor Q2, the emitter and base terminals of the transistor Q2 are connected in parallel with a capacitor C30 and a resistor R48, the connection end of the resistor R47 and the connection terminal J4 is connected to VIN for connecting to an input power supply, the collector of the transistor Q2 is connected to a resistor R35 for connecting to a 3.3V voltage, and the connection end of the resistor R35 and the transistor Q2 is connected to a connection terminal J.imit for connecting to a main control circuit.

[0011] Preferably, the on-off switch circuit comprises a MOS tube U9 and a triode Y5, a gate of the MOS tube U9 is connected with a resistor R46, one end of the resistor R46 is connected with a collector of the triode Y5, a base of the triode Y5 is connected with a resistor R17 for connecting with a master control circuit, the resistor R17 is connected with a resistor R4 for connecting with a 3.3V voltage on a connection end of the master control circuit, the triode Y5 is connected with a resistor R27 for connecting with a 5V voltage on a connection end of the resistor R46, an emitter of the triode Y5 and a source of the MOS tube U9 are both grounded, and a drain of the MOS tube U9 is connected with a resistor R200 for connecting with the master control circuit.

[0012] Preferably, the master control circuit comprises an MCU chip U1A, a 5th pin and a 6th pin of the MCU chip U1A are connected with a crystal oscillator X1, one end of the crystal oscillator X1 is connected with a capacitor C11, the other end of the crystal oscillator X1 is connected with a capacitor C12, the other end of the capacitor C11 and the other end of the capacitor C12 are both grounded, and a 44th pin of the MCU chip U1A is connected with a resistor R9.

[0013] Preferably, the filter circuit comprises a connection terminal J1 and an MCU chip U1B connected with the MCU chip U1A, a 34th pin and a 37th pin of the MCU chip U1A are connected with a 34th pin and a 37th pin of the connection terminal J1 respectively, a VDD end and a VSS end of the MCU chip U1B are connected with a 1st pin and a 4th pin of the connection terminal J1 respectively, the VDD end and the VSS end of the MCU chip U1B are connected in parallel with a diode Ln6, a capacitor C9, a capacitor C3, a capacitor C8, a capacitor C37, a capacitor C7, a capacitor C6, a capacitor C5, a capacitor C4 and a capacitor C2, a resistor R1 and a ground capacitor C1 are connected on an NRST pin of the MCU chip U1A, and the other end of the resistor R1 is connected to the 1st pin of the connection terminal J1.

[0014] Compared with the prior art, the utility model has the advantages that:

[0015] 1、 the utility model discloses a NMOS drive unit, master control unit and power unit cooperate, connect ADC sampling output signal with four NMOS switch circuit, to monitor whether each output point is normal, adopt NMOS pipe drive high -power solenoid valve, make controller whole volume is small, stability is high, and MOS pipe inside is no mechanical structure, long -time vibration function also can not be invalid, shock resistance, improve the control effect to solenoid valve.

[0016] 2、 the utility model discloses the cooperation of voltage reduction circuit, interface circuit and on-off switch circuit can provide stable voltage signal for master control unit and NMOS drive unit, make NMOS drive unit and master control unit work stably. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 This is a circuit block diagram of the utility model;

[0018] Figure 2 This is a circuit diagram of the main control circuit of the utility model;

[0019] Figure 3 This is a circuit diagram of the filter circuit of the utility model;

[0020] Figure 4 This is a circuit diagram of the NMOS tube switch circuit of the utility model;

[0021] Figure 5 This is a circuit diagram of the power supply unit of the utility model. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0023] See also Figure 1-5 The utility model provides a technical solution: a circuit for driving a high-power solenoid valve based on an NMOS tube, comprising an NMOS drive unit, a main control unit and a power supply unit. The NMOS drive unit comprises four groups of NMOS switch circuits for connecting to ADC sampling output signals;

[0024] The NMOS switch circuit includes an NPN-type transistor Y2 and a MOS transistor U5. The gate of the MOS transistor U5 is connected to a resistor R42. One end of the resistor R42 is connected to the collector of the transistor Y2, and the connection end between the transistor Y2 and the resistor R42 is connected to a resistor R10 for connecting to a 5V voltage. The emitter of the transistor Y2 and the source of the MOS transistor U5 are both grounded. The base of the transistor Y2 is connected to a resistor R6. One end of the resistor R6 is connected to the main control circuit, and the connection end between the resistor R6 and the main control circuit is connected to a resistor R37 for connecting to a 3.3V voltage. The drain of the MOS transistor U5 is connected to a resistor R22 for connecting to the main control circuit and a diode Ln3 for connecting to a step-down circuit. The connection end between the drain of the MOS transistor U5 and the diode Ln3 is provided with a pin YV for connecting to an interface circuit, as shown in FIG. Figure 5 In FIG. 1 , YV1, YV2, YV3, and YV4 marked on the connection terminal J4 are pins for connecting four groups of NMOS switch circuits, such as Figure 4As shown, ADC sampling is performed through the ADC_IN1 pin to monitor the normal status of each output point of the MCU chip U1A.

[0025] The main control unit includes a control circuit and a filter circuit for filtering the control circuit. One end of each of the four groups of NMOS switch circuits is connected to the control circuit.

[0026] The main control circuit includes an MCU chip U1A. A crystal oscillator X1 is connected between pins 5 and 6 of the MCU chip U1A. One end of the crystal oscillator X1 is connected to a capacitor C11, and the other end of the crystal oscillator X1 is connected to a capacitor C12. The other ends of the capacitors C11 and C12 are both grounded. Pin 44 of the MCU chip U1A is connected to a ground resistor R9. The crystal oscillator X1 provides a clock signal to the MCU chip U1A, which is then filtered by capacitors C11 and C12 to provide a time reference and operation timing for the MCU chip U1A, ensuring the normal operation of the system and accurate data processing.

[0027] The filtering circuit includes a connection terminal J1 connected to the MCU chip U1A and an MCU chip U1B. Pins 34 and 37 of the MCU chip U1A are respectively connected to pins 34 and 37 of the connection terminal J1. The VDD and VSS ends of the MCU chip U1B are respectively connected to pins 1 and 4 of the connection terminal J1. A diode Ln6, capacitor C9, capacitor C3, capacitor C8, capacitor C37, capacitor C7, capacitor C6, capacitor C5, capacitor C4 and capacitor C2 are connected in parallel between the VDD and VSS ends of the MCU chip U1B. A resistor R1 and a capacitor C1 to ground are connected to the NRST pin of the MCU chip U1A. The other end of the resistor R1 is connected to pin 1 of the connection terminal J1. The parallel capacitors are used to effectively filter out the AC component in the output voltage of the rectifier circuit, retaining the DC component, thereby obtaining a smooth DC voltage output.

[0028] The power supply unit includes a step-down circuit, an interface circuit with a voltage stabilization effect, and an on-off switch circuit, wherein the interface circuit is connected to the other end of the NMOS switch circuit, the step-down circuit is connected to the interface circuit, and the on-off switch circuit is connected to the control circuit;

[0029] The voltage reduction circuit comprises a voltage reduction chip U4 and a voltage stabilizer U8, the input end and the ground end of the voltage reduction chip U4 are connected in parallel with a capacitor C17, a capacitor C18, a capacitor C33, a capacitor C38, a capacitor C39 and a capacitor C40, one end of the capacitor C33 is connected with a diode Ln12, one end of the diode Ln12 is connected with a fuse Fusel for connecting with a VIN input power supply, the output end and the ground end of the voltage reduction chip U4 are connected in parallel with a diode Ln2, a capacitor C10, a capacitor C25, a capacitor C14, a capacitor C15 and a capacitor C16, the diode Ln2 and the connection end of the voltage reduction chip U4 are connected with a 5V connection end for connecting with the input end of the voltage stabilizer U8, the input end and the ground end of the voltage stabilizer U8 are connected with a capacitor C13, the output end and the ground end of the voltage stabilizer U8 are connected with a capacitor C24, the voltage of 12V or 24V is reduced to 5V through the voltage reduction chip U4, and then a stable 3.3V voltage is output through the voltage stabilizer U8, the capacitor C17, the capacitor C18, the capacitor C33, the capacitor C38, the capacitor C39 and the capacitor C40 are used for filtering the input signal of the voltage reduction chip U4, the diode Ln2, the capacitor C10, the capacitor C25, the capacitor C14, the capacitor C15 and the capacitor C16 are used for removing the interference signal output by the voltage reduction chip U4, so as to provide a stable voltage signal for the main control unit and the NMOS driving unit, and make the NMOS driving unit and the main control unit work stably.

[0030] The interface circuit comprises a connection terminal J4, the 3th to 6th pins of the connection terminal J4 are connected with four groups of NMOS switch circuits respectively, the 2nd pin of the connection terminal J4 is connected with a resistor R47, one end of the resistor R47 is connected with a triode Q2, the emitter end and the base end of the triode Q2 are connected in parallel with a capacitor C30 and a resistor R48, the resistor R47 and the connection end of the connection terminal J4 are connected with a VIN for connecting with an input power supply, the collector of the triode Q2 is connected with a resistor R35 for connecting with a 3.3V voltage, and the connection end of the resistor R35 and the triode Q2 is connected with a connection terminal Jimit for connecting with a main control circuit.

[0031] The on-off switch circuit includes a MOS tube U9 and a transistor Y5. The gate of the MOS tube U9 is connected to a resistor R46. One end of the resistor R46 is connected to the collector of the transistor Y5. The base of the transistor Y5 is connected to a resistor R17 for connecting to the main control circuit. The connection end of the resistor R17 and the main control circuit is connected to a resistor R4 for connecting to a 3.3V voltage. The connection end of the transistor Y5 and the resistor R46 is connected to a resistor R27 for connecting to a 5V voltage. The emitter of the transistor Y5 and the source of the MOS tube U9 are both grounded. The drain of the MOS tube U9 is connected to A resistor R200 is provided for connecting to the main control circuit. Resistor R46 is used to limit the gate current of MOS tube U9 to prevent overcurrent from damaging the MOS tube. Transistor Y5 acts as a switch. Its base is connected to resistor R17 and is used to connect to the main control circuit. When the main control circuit outputs a high-level signal, transistor Y5 is turned on, otherwise it is cut off. The collector of transistor Y5 is connected to resistor R27 for connecting to a 5V voltage. Diode Ln6 and capacitor C9 form part of a protection circuit to protect MOS tube U9 from damage such as overvoltage and overcurrent.

[0032] The ADC sampling output signal is connected through four groups of NMOS switch circuits to monitor whether each output point is normal. The use of NMOS tubes to drive high-power solenoid valves makes the controller small in size and high in stability. There is no mechanical structure inside the MOS tube, so the vibration function will not fail even after a long period of vibration, which is vibration-resistant and improves the control effect of the solenoid valve.

[0033] Although the embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and variations may be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A circuit based on an NMOS transistor to drive a high-power solenoid valve, characterized by: It includes an NMOS driving unit, a main control unit and a power supply unit. The NMOS driving unit includes four groups of NMOS switch circuits for connecting ADC sampling output signals; The main control unit includes a control circuit and a filter circuit for filtering the control circuit, and one end of each of the four groups of NMOS switch circuits is connected to the control circuit; The power supply unit includes a step-down circuit, an interface circuit with a voltage stabilization effect, and an on-off switch circuit. The interface circuit is connected to the other end of the NMOS switch circuit, the step-down circuit is connected to the interface circuit, and the on-off switch circuit is connected to the control circuit.

2. The circuit for driving a high-power solenoid valve based on an NMOS transistor according to claim 1, characterized in that: The NMOS switch circuit includes an NPN-type transistor Y2 and a MOS transistor U5. The gate of the MOS transistor U5 is connected to a resistor R42. One end of the resistor R42 is connected to the collector of the transistor Y2. The connection end between the transistor Y2 and the resistor R42 is connected to a resistor R10 for connecting to a 5V voltage. The emitter of the transistor Y2 and the source of the MOS transistor U5 are both grounded. The base of the transistor Y2 is connected to a resistor R6. One end of the resistor R6 is connected to the main control circuit. The connection end between the resistor R6 and the main control circuit is connected to a resistor R37 for connecting to a 3.3V voltage. The drain of the MOS transistor U5 is connected to a resistor R22 for connecting to the main control circuit and a diode Ln3 for connecting to a step-down circuit. A pin YV for connecting to an interface circuit is provided at the connection end between the drain of the MOS transistor U5 and the diode Ln3.

3. The circuit for driving a high-power solenoid valve based on an NMOS transistor according to claim 2, characterized in that: The step-down circuit includes a step-down chip U4 and a voltage regulator U8. A capacitor C17, a capacitor C18, a capacitor C33, a capacitor C38, a capacitor C39 and a capacitor C40 are connected in parallel between the input end and the ground end of the step-down chip U4. One end of the capacitor C33 is connected to a diode Ln12. One end of the diode Ln12 is connected to a fuse Fusel for connecting to the VIN input power supply. A diode Ln2, a capacitor C10, a capacitor C25 are connected in parallel between the output end and the ground end of the step-down chip U4. , capacitor C14, capacitor C15 and capacitor C16, and the connection end of the diode Ln2 and the buck chip U4 is connected with an inductor L3, one end of the inductor L3 is connected with one end of the capacitor C10 and the FB end of the buck chip U4, the connection end of the capacitor C15 and the capacitor C16 is connected with a 5V connection end for connecting to the input end of the voltage stabilizing chip U8, a capacitor C13 is connected between the input end and the ground end of the voltage stabilizing chip U8, and a capacitor C24 is connected between the output end and the ground end of the voltage stabilizing chip U8.

4. The circuit for driving a high-power solenoid valve based on an NMOS transistor according to claim 3, characterized in that: The interface circuit includes a connection terminal J4, and pins 3 to 6 of the connection terminal J4 are respectively connected to four groups of NMOS switch circuits. Pin 2 of the connection terminal J4 is connected to a resistor R47, one end of the resistor R47 is connected to a transistor Q2, and the emitter and base terminals of the transistor Q2 are connected in parallel with a capacitor C30 and a resistor R48. The connection end of the resistor R47 and the connection terminal J4 is connected to VIN for connecting to an input power supply, and the collector of the transistor Q2 is connected to a resistor R35 for connecting to a 3.3V voltage. The connection end of the resistor R35 and the transistor Q2 is connected to a connection terminal J.imit for connecting to a main control circuit.

5. The circuit for driving a high-power solenoid valve based on an NMOS transistor according to claim 4, characterized in that: The on-off switch circuit includes a MOS transistor U9 and a transistor Y5. The gate of the MOS transistor U9 is connected to a resistor R46. One end of the resistor R46 is connected to the collector of the transistor Y5. The base of the transistor Y5 is connected to a resistor R17 for connecting to a main control circuit. The connection end of the resistor R17 and the main control circuit is connected to a resistor R4 for connecting to a 3.3V voltage. The connection end of the transistor Y5 and the resistor R46 is connected to a resistor R27 for connecting to a 5V voltage. The emitter of the transistor Y5 and the source of the MOS transistor U9 are both grounded. The drain of the MOS transistor U9 is connected to a resistor R200 for connecting to the main control circuit.

6. The circuit for driving a high-power solenoid valve based on an NMOS transistor according to claim 5, characterized in that: The main control circuit includes an MCU chip U1A, a crystal oscillator X1 is connected between pins 5 and 6 of the MCU chip U1A, one end of the crystal oscillator X1 is connected to a capacitor C11, the other end of the crystal oscillator X1 is connected to a capacitor C12, and the other ends of the capacitors C11 and C12 are both grounded, and pin 44 of the MCU chip U1A is connected to a ground resistor R9.

7. The circuit for driving a high-power solenoid valve based on an NMOS transistor according to claim 6, characterized in that: The filtering circuit includes a connection terminal J1 connected to the MCU chip U1A and an MCU chip U1B. Pins 34 and 37 of the MCU chip U1A are respectively connected to pins 34 and 37 of the connection terminal J1. The VDD and VSS ends of the MCU chip U1B are respectively connected to pins 1 and 4 of the connection terminal J1. A diode Ln6, a capacitor C9, a capacitor C3, a capacitor C8, a capacitor C37, a capacitor C7, a capacitor C6, a capacitor C5, a capacitor C4 and a capacitor C2 are connected in parallel between the VDD and VSS ends of the MCU chip U1B. A resistor R1 and a ground capacitor C1 are connected to the NRST pin of the MCU chip U1A. The other end of the resistor R1 is connected to pin 1 of the connection terminal J1.

Images