Signal isolation structure for preventing electric leakage, chip and PCB

Abstract

The utility model provides a signal isolation structure for preventing electric leakage, a chip and a PCB, and belongs to the technical field of signal isolation. According to the technical scheme, the circuit comprises a high-voltage signal end and a low-voltage signal end; a gaseous capacitor is arranged on a line between the high-voltage signal end and the low-voltage signal end, so that current from the high-voltage signal end to the low-voltage signal end can pass through, and current from the low-voltage signal end to the high-voltage signal end cannot pass through. The beneficial effects of the utility model are that by introducing the gaseous capacitor, the leakage phenomenon of a high-voltage signal end to a low-voltage signal end can be effectively prevented, the stable transmission of signals can be maintained, and the circuit isolation device is suitable for circuit isolation requirements in various electronic devices, especially isolation among a power supply, a functional circuit and a ground signal end; the reliability and the stability of the circuit can be obviously improved; furthermore, according to the chip and the PCB of the utility model, the electrical performance and the anti-interference capability of the product can be significantly improved.

Description

Technical Field

[0001] The utility model relates to the technical field of signal isolation, in particular to a signal isolation structure for preventing leakage, a chip and a PCB. Background Art

[0002] Short circuits and leakages often occur in electronic devices. With the emergence of PCBs, electronic devices have become increasingly miniaturized and integrated, and their electrical performance has also been continuously enhanced. In particular, with the development of surface mount technology, multi-layer boards, and high-speed interconnect boards, PCB structures have become more stable, reducing the occurrence of leakage problems to a certain extent, but it cannot be completely eliminated.

[0003] Electrical signal isolation enables safe and reliable isolation between signals in different circuit domains, preventing high voltage, noise, and surges from affecting low-voltage or sensitive circuits while ensuring effective signal transmission. Electrical signals are represented by different voltage values, and isolating these signals prevents leakage and isolates circuits. Currently, electrical signal isolation primarily involves MOSFET isolation or chip isolation. For example, MOSFET isolation precisely controls the gate voltage to rapidly switch the conduction and control of the MOSFET. While achieving some degree of isolation between circuit domains, it has numerous limitations. For example, MOSFET isolation can cause voltage level variations during voltage conversion, requiring a dual MOSFET structure for complete signal isolation. This not only increases cost but also takes up more space in dense PCB designs. Chip isolation also presents challenges such as high cost and complex design. Furthermore, it is difficult to isolate all signals, potentially leading to leakage and difficult-to-solve timing issues. Summary of the Invention

[0004] In view of the limitations of current electrical signal isolation methods, high costs, large space occupation, and difficulty in isolating all signals, the utility model provides a signal isolation structure that prevents leakage.

[0005] In order to solve the above problems, the technical solution adopted by the present utility model is:

[0006] In the first aspect, a signal isolation structure to prevent leakage,

[0007] Including high voltage signal end and low voltage signal end;

[0008] A gas capacitor is installed in the line between the high-voltage signal terminal and the low-voltage signal terminal, allowing current to pass from the high-voltage signal terminal to the low-voltage signal terminal, but preventing current from passing from the low-voltage signal terminal to the high-voltage signal terminal. By introducing the gas capacitor and utilizing its characteristics, a new isolation mechanism is formed between the high-voltage signal terminal and the low-voltage signal terminal, which can prevent leakage to a certain extent while maintaining signal transmission.

[0009] Preferably, the breakdown voltage of the gas capacitor is less than the operating voltage of the high-voltage signal terminal;

[0010] The breakdown voltage of the gas capacitor is greater than the leakage voltage of the low-voltage signal terminal. In this preferred embodiment, the gas capacitor is ensured to break down and conduct at the operating voltage, but not at the leakage voltage of the low-voltage signal terminal, thereby effectively preventing leakage at the low-voltage signal terminal and enhancing the reliability of the signal isolation structure.

[0011] Preferably, the high-voltage signal terminal is a power signal terminal;

[0012] The low-voltage signal terminal is a functional signal terminal. In this preferred embodiment, the high-voltage signal terminal is a power signal terminal, and the low-voltage signal terminal is a functional signal terminal. This makes the signal isolation structure more suitable for isolating the power supply from the functional circuit, effectively preventing the functional circuit from being damaged by leakage, ensuring the stability and reliability of the functional signal, and improving the efficiency of power management.

[0013] Preferably, the high-voltage signal terminal is a power signal terminal;

[0014] In this preferred embodiment, when the low-voltage signal terminal is the ground signal terminal, the structure can prevent the ground signal terminal from affecting the stability of the entire circuit due to leakage, thereby improving the anti-interference ability of the circuit.

[0015] Preferably, an energy dissipation element is provided between the high-voltage signal terminal and the low-voltage signal terminal. In this preferred embodiment, the addition of the energy dissipation element further dissipates any leakage current that may be generated, thereby enhancing the leakage protection capability of the signal isolation structure. Furthermore, the energy dissipation element ensures that the low-voltage signal terminal safely draws power from the high-voltage signal terminal.

[0016] Preferably, the gas capacitor is disposed between the high-voltage signal terminal and the energy dissipation element, or between the energy dissipation element and the low-voltage signal terminal. In this preferred embodiment, the gas capacitor's placement is restricted, allowing for effective leakage protection regardless of whether it is disposed between the high-voltage signal terminal and the energy dissipation element or between the energy dissipation element and the low-voltage signal terminal, thereby enhancing design flexibility.

[0017] In a second aspect, the present invention further provides a chip, comprising a power signal terminal and a function signal terminal;

[0018] A gas capacitor is provided on the line between the power signal terminal and the functional signal terminal. This chip adopts the advantage of providing a gas capacitor between the power signal terminal and the functional signal terminal to protect the circuit inside the chip from leakage, thereby improving the reliability and stability of the chip.

[0019] Preferably, a gas capacitor is also provided between the connected functional signal terminals. In this preferred solution, in addition to preventing the leakage functional signal terminals from affecting the power signal terminals, it is also necessary to ensure that the connected functional signal terminals do not leak.

[0020] Preferably, the functional signal terminals include an I / O signal terminal, an enable signal terminal, a clock signal terminal, a reset signal terminal, a control signal terminal, an address signal terminal, and an interrupt signal terminal. In this preferred embodiment, the types of functional signal terminals are determined, so that the chip can better meet various needs in practical applications, thereby improving the versatility and practicality of the chip.

[0021] In a third aspect, the present invention further provides a PCB, on which the signal isolation structure for preventing leakage as described in the first aspect is provided;

[0022] The PCB is further provided with a plurality of chips, all of which are the chips described in the second aspect;

[0023] Gas capacitors are placed between connected chips. This PCB utilizes the aforementioned chips and a signal isolation structure to prevent leakage, and also places gas capacitors between connected chips. This not only protects the internal circuits of the chips from leakage, but also protects signal transmission between the chips, thereby enhancing the reliability and stability of the entire PCB.

[0024] It can be seen from the above technical solutions that the advantages of the present invention are: this solution provides a signal isolation structure that prevents leakage. By introducing gaseous capacitors, it can not only effectively prevent leakage from the high-voltage signal end to the low-voltage signal end, but also maintain stable signal transmission. This structure is suitable for circuit isolation needs in various electronic devices, especially the isolation between the power supply and functional circuit and the ground signal end, which can significantly improve the reliability and stability of the circuit; furthermore, the chip and PCB of the present invention can significantly improve the electrical performance and anti-interference ability of the product, which is the miniaturization and integration performance of electronic equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solution of the present invention, the following is a brief introduction to the drawings required for the description. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0026] Figure 1 This is a schematic diagram of a signal isolation structure for preventing leakage according to a first embodiment of the present invention.

[0027] Figure 2This is a schematic diagram of a signal isolation structure for preventing leakage in the second embodiment of the present invention.

[0028] Figure 3 This is a schematic diagram of the structure of the chip in the third and fourth embodiments of the present invention.

[0029] Figure 4 This is a schematic diagram of the connection structure between chips in Example 5 of the present utility model.

[0030] Description of main reference numerals

[0031] 1. High-voltage signal terminal, 2. Low-voltage signal terminal, 3. Gas capacitor, 4. First chip, 5. Second chip, VCC-power signal terminal, P-function signal terminal, R-resistance. DETAILED DESCRIPTION

[0032] In order to make the purpose, features, and advantages of the present invention more obvious and easy to understand, the technical solutions of the present invention will be clearly and completely described below in conjunction with the drawings in the specific embodiments. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of them. Based on the embodiments in this patent, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this patent.

[0033] In the following embodiments, the terms involved are explained as follows:

[0034] PCB is the abbreviation of Printed Circuit Board.

[0035] MOS is the abbreviation of MOSFET, which is Metal-Oxide-Semiconductor Field-Effect Transistor.

[0036] Example 1

[0037] like Figure 1 Schematic diagram of a signal isolation structure for preventing leakage, comprising a high-voltage signal terminal 1 and a low-voltage signal terminal 2;

[0038] A gas capacitor 3 is provided on the line between the high-voltage signal terminal 1 and the low-voltage signal terminal 2, so that the current from the high-voltage signal terminal 1 to the low-voltage signal terminal 2 can pass through, but the current from the low-voltage signal terminal 2 to the high-voltage signal terminal 1 cannot pass;

[0039] It should be noted that the high-voltage signal terminal 1 connected to the gas capacitor 3 is also connected to at least another low-voltage signal terminal;

[0040] The reason for protecting the high-voltage signal end 1 is that the high-voltage signal end 1 is also connected with other low-voltage signal ends, and once the electric leakage occurs, the high-voltage signal end 1 will supply power to other low-voltage signal ends, and the gaseous capacitor 3 can effectively protect other low-voltage signal ends;

[0041] The low-voltage signal end 2 connected with the gaseous capacitor 3 is at least connected with another low-voltage signal end or high-voltage signal end;

[0042] The low-voltage signal end 2 connected with the gaseous capacitor 3 is at least connected with another low-voltage signal end or high-voltage signal end;

[0043] The low-voltage signal end 2 connected with the gaseous capacitor 3 is at least connected with another low-voltage signal end or high-voltage signal end;

[0044] Embodiment Two

[0045] As shown in Figure 1 A signal isolation structure for preventing electric leakage, comprising a high-voltage signal end 1 and a low-voltage signal end 2;

[0046] A gaseous capacitor 3 is arranged on a line between the high-voltage signal end 1 and the low-voltage signal end 2, so that the current from the high-voltage signal end 1 to the low-voltage signal end 2 can pass through, and the current from the low-voltage signal end 2 to the high-voltage signal end 1 cannot pass through;

[0047] The breakdown voltage of the gaseous capacitor 3 is less than the working voltage of the high-voltage signal end 1;

[0048] The breakdown voltage of the gaseous capacitor 3 is greater than the electric leakage voltage of the low-voltage signal end 2;

[0049] The high-voltage signal end is a power signal end;

[0050] The low-voltage signal end is a functional signal end;

[0051] As shown in Figure 2 The high-voltage signal end is a power signal end VCC, and the low-voltage signal end is a functional signal end P, and a power consumption element is further arranged between the power signal end VCC and the functional signal end I / O;

[0052] It should be noted that the high-voltage signal terminal is the power signal terminal VCC, making the signal isolation structure more suitable for isolating the power supply from the functional circuit, thereby improving the efficiency of power management. When the low-voltage signal terminal is the functional signal terminal P, this structure can effectively prevent the functional circuit from being damaged by leakage, thereby ensuring the stability and reliability of the functional signal.

[0053] The gas capacitor 3 is arranged between the power signal terminal VCC and the energy consuming element; the energy consuming element may be a resistor R;

[0054] It should be noted that by adding energy-consuming elements, the possible leakage current can be further consumed, thereby enhancing the leakage protection capability of the signal isolation structure; at the same time, the energy-consuming elements ensure the safety of the low-voltage signal end drawing power from the high-voltage signal end.

[0055] The gas capacitor 3 in the second embodiment may also be provided between the energy consumption element R and the functional signal terminal P;

[0056] It should be noted that, whether it is set between the high-voltage signal terminal and the energy-consuming element or between the energy-consuming element and the low-voltage signal terminal, it can effectively play the role of leakage protection and improve the flexibility of design.

[0057] The low-voltage signal terminal 2 in the second embodiment can also be a ground signal terminal. When the low-voltage signal terminal is a ground signal terminal, this structure can prevent the ground signal terminal from affecting the stability of the entire circuit due to leakage, thereby improving the anti-interference ability of the circuit.

[0058] Example 3

[0059] like Figure 3 As shown, this embodiment provides a chip, including a power signal terminal VCC and a function signal terminal P;

[0060] A gas capacitor 3 is provided on the line between the power signal terminal VCC and the functional signal terminal P.

[0061] The chip in this embodiment.

[0062] Example 4

[0063] like Figure 3 As shown, a chip of this embodiment includes a power signal terminal VCC and a function signal terminal P;

[0064] A gas capacitor 3 is provided on the line between the power signal terminal VCC and the functional signal terminal P;

[0065] A gas capacitor 3 is also provided between each functional signal terminal P having a connection relationship;

[0066] It should be noted that in addition to preventing the influence of leakage on the power signal terminal, it is also necessary to ensure that the connected functional signal terminal does not leak.

[0067] The functional signal terminal may be an I / O signal terminal, an enable signal terminal, a clock signal terminal, a reset signal terminal, a control signal terminal, an address signal terminal, and an interrupt signal terminal;

[0068] By determining the type of the functional signal terminal, the chip can better meet various needs in practical applications, thereby improving the versatility and practicality of the chip.

[0069] Example 5

[0070] like Figure 4 As shown, this embodiment provides a PCB, on which the signal isolation structure for preventing leakage as described in the first or second embodiment is provided;

[0071] The PCB is further provided with a plurality of chips, all of which are the chips described in the third embodiment or the fourth embodiment;

[0072] A gas capacitor 3 is provided between the connected chips;

[0073] Take two chips as an example, namely a first chip 4 and a second chip 5;

[0074] Both chips are the chips described in Example 3 or Example 4;

[0075] A gas capacitor 3 is also provided on the connection line between the first chip 4 and the second chip 5. The PCB of this embodiment utilizes the aforementioned chips and signal isolation structure to prevent leakage, and further provides gas capacitors between the interconnected chips. This not only protects the internal circuits of the chips from leakage, but also protects signal transmission between the chips from leakage, thereby enhancing the reliability and stability of the entire PCB.

[0076] The utility model can modify the circuit design inside the chip, mainly by adding a gas capacitor 3 at the power signal terminal VCC of the chip, and utilizing the breakdown characteristic of the gas capacitor 3 to ensure that the voltage reaches a certain value and completes the breakdown. The other capacitors after the breakdown are equivalent to the path, thereby realizing the normal operation of the chip; when the chip stops working, utilizing the recoverable characteristic of the gas capacitor 3, the circuit is in an open-circuit state before the next power-on, thereby ensuring that the power supply of its power signal terminal VCC has no electrical signal input when it is in an inactive state.

[0077] Taking the relationship between the I / O signal terminal and the power signal terminal VCC of a certain chip as an example, when adding a gas capacitor 3, when the I / O signal terminal input is at a high level and the power signal terminal VCC is not yet powered on, leakage will occur from the I / O signal terminal to the power signal terminal VCC, thereby disrupting the normal power-on sequence and causing the device to fail to power on or operate properly, resulting in malfunction. However, after adding the gas capacitor 3, the line isolation is completed, and the connection between the I / O signal terminal and the power signal terminal VCC can only be achieved after the voltage value reaches the breakdown voltage. According to the setting of the gas capacitor, it can be guaranteed that the chip will not operate before the voltage value reaches the specified value, that is, the breakdown voltage value of the gas capacitor.

[0078] The utility model can ensure that when the non-power signal terminal of the chip (i.e., the I / O signal terminal) is connected to a high level, current cannot flow to the power signal terminal VCC, thereby avoiding timing leakage and reducing design difficulty. In addition, under certain circumstances, it can replace MOS isolation or chip isolation to reduce design costs.

[0079] On the other hand, due to the recoverability of the gas capacitor and the setting of the breakdown voltage value, the voltage between the high-voltage signal end and the low-voltage signal end (the power signal end VCC and the I / O signal end) can be limited according to the reverse effect after the gas capacitor breaks down and its recoverable characteristics.

[0080] The above description of the disclosed embodiments will enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A signal isolation structure for preventing leakage, characterized in that: Including high voltage signal end and low voltage signal end; A gas capacitor is provided on the line between the high-voltage signal end and the low-voltage signal end, so that current can pass from the high-voltage signal end to the low-voltage signal end, but current cannot pass from the low-voltage signal end to the high-voltage signal end.

2. The signal isolation structure for preventing leakage according to claim 1, wherein: The breakdown voltage of the gas capacitor is lower than the operating voltage of the high-voltage signal terminal; The breakdown voltage of the gas capacitor is greater than the leakage voltage of the low-voltage signal terminal.

3. The signal isolation structure for preventing leakage according to claim 1, wherein: The high-voltage signal terminal is a power signal terminal; The low-voltage signal terminal is a functional signal terminal.

4. The signal isolation structure for preventing leakage according to claim 1, wherein: The high-voltage signal terminal is a power signal terminal; The low-voltage signal terminal is a ground signal terminal.

5. The signal isolation structure for preventing leakage according to claim 1, wherein: An energy-consuming element is further provided between the high-voltage signal terminal and the low-voltage signal terminal.

6. The signal isolation structure for preventing leakage according to claim 5, wherein: The gas capacitor is arranged between the high-voltage signal terminal and the energy-consuming element or between the energy-consuming element and the low-voltage signal terminal.

7. A chip, characterized in that: Including power signal terminal and function signal terminal; A gas capacitor is provided on the line between the power signal terminal and the function signal terminal.

8. The chip according to claim 7, wherein: A gas capacitor is also provided between each functional signal terminal that has a connection relationship.

9. The chip according to claim 7, wherein: The functional signal terminals include an I / O signal terminal, an enable signal terminal, a clock signal terminal, a reset signal terminal, a control signal terminal, an address signal terminal and an interrupt signal terminal.

10. A PCB, characterized in that: The PCB is provided with a signal isolation structure for preventing leakage according to any one of claims 1 to 6; The PCB is further provided with a plurality of chips, each of which is a chip according to any one of claims 7 to 9; Gas capacitors are provided between the connected chips.

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