Clock circuit and electronic equipment

Abstract

The utility model discloses a clock circuit and electronic equipment. The clock circuit comprises a clock chip, a first power supply branch, a second power supply branch and a third power supply branch. The first power supply branch, the second power supply branch, the third power supply branch and the power end of the clock chip are connected to a first node, and the second power supply branch is connected with the battery. The first power supply branch outputs a first voltage based on the voltage of the first power supply when receiving the first power supply, the first voltage is input to the first node, and the voltage of the first node is the power supply voltage of the clock chip. The second power supply branch outputs a second voltage based on the voltage of the battery. The third power supply branch stores electric energy based on the first power supply when receiving the first power supply and outputs a third voltage, and when the first power supply branch does not output the first voltage, the maximum value of the second voltage and the third voltage is input to the first node. By means of the mode, continuous power supply of the real-time clock chip can be effectively achieved, and the accuracy and stability of time recording are improved.

Description

TECHNICAL FIELD

[0001] The embodiment of the present application relates to the technical field of electronic circuit, in particular to a clock circuit and electronic equipment. BACKGROUND

[0002] A real-time clock chip (RTC) is a kind of special integrated circuit, which is used to maintain accurate time and date information. Such chips are widely used in various electronic devices, such as personal computers, servers, mobile devices, automotive electronic systems, household appliances, etc., to ensure that the device can accurately record time, which is very critical for many applications. And the real-time clock chip needs external power supply to supply power, so how to maintain the power supply of the real-time clock chip in different application scenarios to keep the real-time clock chip running and thus keep accurate record of time is particularly important. CONTENT OF THE UTILITY MODEL

[0003] The embodiment of the present application provides a clock circuit and electronic equipment, which can effectively realize the continuous power supply of the real-time clock chip, so as to improve the accuracy and stability of recording time.

[0004] In a first aspect, the embodiment of the present application provides a clock circuit, comprising:

[0005] a clock chip, a first power supply branch, a second power supply branch and a third power supply branch;

[0006] The first power supply branch, the second power supply branch and the third power supply branch are connected with a power supply end of the clock chip and connected to a first node, and the second power supply branch is further connected with a battery;

[0007] The first power supply branch is configured to output a first voltage based on a voltage of a first power supply when receiving the first power supply, wherein the first voltage is input to the first node, and a voltage of the first node is a power supply voltage of the clock chip;

[0008] The second power supply branch is configured to output a second voltage based on a voltage of the battery;

[0009] The third power supply branch is configured to store electric energy based on the first power supply when receiving the first power supply, and output a third voltage based on the stored electric energy, wherein when the first power supply branch does not output the first voltage, the maximum value of the second voltage and the third voltage is input to the first node.

[0010] In one or more embodiments, the clock circuit further comprises a voltage detection branch and a controller;

[0011] The voltage detection branch is connected with the battery and the controller respectively, and is configured to output a detection signal to the controller based on the voltage of the battery, so that the controller determines the voltage of the battery based on the detection signal.

[0012] In one or more embodiments, the clock circuit further comprises a switch branch and a power conversion branch;

[0013] The switch branch is connected with an interrupt output end of the clock chip, the power conversion branch and a second power source respectively, and is configured to be turned on in response to an interrupt signal output by the interrupt output end, so as to establish a connection between the second power source and the power conversion branch.

[0014] The power conversion branch is configured to convert the second power source into the first power source when the power conversion branch is connected with the second power source.

[0015] In one or more embodiments, the first power supply branch comprises a first diode;

[0016] The anode of the first diode is used for inputting the first power source, and the cathode of the first diode is connected to the first node.

[0017] In one or more embodiments, the second power supply branch comprises a second diode and a first resistor;

[0018] The anode of the second diode is connected with the positive pole of the battery through the first resistor, the negative pole of the battery is grounded, and the cathode of the second diode is connected to the first node.

[0019] In one or more embodiments, the third power supply branch comprises a third diode, a fourth diode and a first capacitor;

[0020] The anode of the third diode is used for connecting the first power source, the cathode of the third diode is connected with the first end of the first capacitor and the anode of the fourth diode respectively, and the cathode of the fourth diode is connected to the first node.

[0021] In one or more embodiments, the voltage detection branch comprises a second resistor, a third resistor, a fourth resistor, an operational amplifier and a second capacitor;

[0022] The first end of the second resistor is connected with the controller, the first end of the second capacitor and the first end of the third resistor respectively, the second end of the second resistor and the second end of the second capacitor are both grounded, the second end of the third resistor is connected with the output end and the inverting input end of the operational amplifier respectively, and the non-inverting input end of the operational amplifier is connected with the positive pole of the battery through the fourth resistor.

[0023] In one or more embodiments, the switch branch includes a switch tube, a fifth resistor and a sixth resistor;

[0024] A first end of the switch tube is connected with a first end of the fifth resistor and a first end of the sixth resistor respectively, a second end of the fifth resistor is connected with the interrupt output end, a second end of the sixth resistor and a second end of the switch tube are both connected with the second power supply, a third end of the switch tube is connected with an input end of the power conversion branch, and an output end of the power conversion branch outputs the second power supply.

[0025] In one or more embodiments, the clock circuit further includes a third capacitor, a fourth capacitor, a fifth capacitor, a crystal oscillator, a seventh resistor and an eighth resistor;

[0026] The third capacitor is connected between a power supply end and a ground of the clock chip, the fourth capacitor is connected between an oscillator input end and the ground of the clock chip, the fifth capacitor is connected between an oscillator output end and the ground of the clock chip, the crystal oscillator is connected between the oscillator input end of the clock chip and the oscillator output end of the clock chip, the seventh resistor is connected between a serial data end of the clock chip and the second power supply, and the eighth resistor is connected between a serial clock end of the clock chip and the second power supply.

[0027] In a second aspect, the embodiments of the present application provide an electronic device including the clock circuit as described above.

[0028] The beneficial effects of the present application are: the clock circuit of the embodiments of the present application comprises a clock chip, a first power supply branch, a second power supply branch and a third power supply branch. The first power supply branch, the second power supply branch and the third power supply branch are connected with the power supply end of the clock chip and connected to the first node, and the second power supply branch is also connected with the battery. Among them, the first power supply branch is configured to output a first voltage based on the voltage of the first power supply when receiving the first power supply, wherein the first voltage is input to the first node, and the voltage of the first node is the power supply voltage of the clock chip. The second power supply branch is configured to output a second voltage based on the voltage of the battery. The third power supply branch is configured to store electrical energy based on the first power supply when receiving the first power supply, and output a third voltage based on the stored electrical energy, wherein when the first power supply branch does not output the first voltage, the maximum value of the second voltage and the third voltage is input to the first node. Thus, when the clock circuit receives the first power supply, the clock chip can be powered by the first voltage; when the clock circuit does not receive the first power supply, the clock chip can be powered by the second voltage provided by the battery or the third voltage provided by the electrical energy stored by the third power supply branch, to realize real-time continuous power supply for the clock chip; when the battery needs to be replaced, the connection between the first power supply and the clock circuit usually needs to be disconnected, at this time there is no first voltage and second voltage, and the clock chip is powered by the third voltage, thereby, the real-time continuous power supply for the clock chip can be effectively realized to improve the accuracy and stability of recording time. BRIEF DESCRIPTION OF DRAWINGS

[0029] One or more embodiments are illustrated by way of example in the drawings in which like reference numerals indicate similar elements, and as such, continuities of descriptions are not repeated unless otherwise noted. It should be noted that these drawings are given for illustrative purposes only and therefore are not to be considered to be to scale.

[0030] Figure 1 is a schematic diagram of a component block diagram of a clock circuit provided by the embodiments of the present application Figure 1 ;

[0031] Figure 2 is a schematic diagram of a component block diagram of a clock circuit provided by the embodiments of the present application Figure 2 ;

[0032] Figure 3 is a schematic diagram of a component block diagram of a clock circuit provided by the embodiments of the present application Figure 3 ;

[0033] Figure 4 is a schematic diagram of a circuit structure corresponding to the component block diagram shown in Figure 3 . DETAILED DESCRIPTION

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of them. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0035] It should be noted that, when an element is described as being “connected to” another element, it may be directly connected to the other element, or one or more intervening elements may exist therebetween.

[0036] In addition, the technical features involved in the various embodiments of the present application described below can be combined with each other as long as there is no structural conflict between them.

[0037] Please refer to Figure 1 , Figure 1 Schematic diagram of the composition block diagram of the clock circuit provided in the embodiment of the present application. Figure 1 As shown, the clock circuit 100 includes a first power supply branch 10, a second power supply branch 20, a third power supply branch 30, and a clock chip 40. The first power supply branch 10, the second power supply branch 20, and the third power supply branch 30 are all connected to the power supply terminal of the clock chip 40 and to the first node P1. The second power supply branch 20 is also connected to the battery BAT1.

[0038] The clock chip 40 is used to provide a precise clock signal, ensuring that various components of the electronic device can coordinate and operate according to a predetermined time sequence. In some embodiments, the clock chip 40 is configured as a real-time clock chip. In some embodiments, the clock chip 40 is configured as a real-time clock chip such as a PCF8563T or DS1302.

[0039] Specifically, the first power supply branch 10 is configured to output a first voltage V1 based on the voltage of the first power supply VC1 when receiving the first power supply VC1 (i.e., the first power supply VC1 is normally supplying power to the first power supply branch 10). The first voltage V1 is input to a first node P1, which serves as the supply voltage for the clock chip 40. The second power supply branch 20 is configured to output a second voltage V2 based on the voltage of the battery BAT1. The third power supply branch 30 is configured to store electrical energy based on the first power supply VC1 when receiving the first power supply VC1, and to output a third voltage V3 based on the stored electrical energy. When the first power supply branch 10 is not outputting the first voltage V1, the maximum of the second voltage V2 and the third voltage V3 is input to the first node P1.

[0040] In practical applications, when the clock circuit 100 receives the first power supply VCl, that is, when the first power supply VCl can normally supply power to the clock circuit 100, the first power supply branch 10 outputs the first voltage VI, and at this time, the clock chip 40 is supplied with power by the first voltage VI; when the clock circuit 100 does not receive the first power supply, that is, when the first power supply VCl is powered off and cannot supply power to the clock circuit 100, the clock chip 40 can be supplied with power by the second voltage V2 provided by the battery BAT1 or the third voltage V3 provided by the power stored in the third power supply branch 30, so as to realize continuous power supply for the clock chip 40 in real time; when the battery BAT1 needs to be replaced, the connection between the first power supply VCl and the clock circuit 100 usually needs to be disconnected to protect personal safety, at this time, there is no first voltage VI and second voltage V3, and the clock chip can be supplied with power by the third voltage V3. In summary, in various application scenarios (including the application scenario of normal power supply of the first power supply VCl, the application scenario of power-off of the first power supply VCl, and the application scenario of replacing the battery BAT1), continuous power supply for the clock chip 40 in real time can be effectively realized, so as to improve the accuracy and stability of recording time.

[0041] In some embodiments, as shown in Figure 2 The clock circuit 100 further includes a voltage detection branch 50 and a controller 60. The voltage detection branch 50 is connected to the battery BAT1 and the controller 60, respectively.

[0042] Specifically, the voltage detection branch 50 is configured to output a detection signal to the controller 60 based on the voltage of the battery BAT1, so that the controller 60 determines the voltage of the battery BAT1 based on the detection signal.

[0043] Then, in some specific embodiments, when the voltage of the battery BAT1 decreases to a smaller value, the controller 60 can output warning information to remind the user to replace the battery BAT1 in time.

[0044] In some embodiments, as shown in Figure 3 The clock circuit 100 further includes a switch branch 70 and a power conversion branch 80. The switch branch 70 is connected to the interrupt output end of the clock chip 40, the power conversion branch 80, and the second power supply Vc2, respectively. The power conversion branch 80 is further connected to the controller 60.

[0045] Specifically, the switch branch 70 is configured to be turned on in response to the interrupt signal output by the interrupt output end, so as to establish the connection between the second power supply Vc2 and the power conversion branch 80. The power conversion branch 80 is configured to convert the second power supply Vc2 into the first power supply VCl when the power conversion branch 80 is connected to the second power supply Vc2.

[0046] Then, in some embodiments, when the electronic device including the clock circuit 100 is powered off or in sleep mode, a power-on time can be set. When the set power-on time is reached, the interrupt output of the clock chip 40 outputs an interrupt signal to the switch branch 70, so that the switch branch 70 is turned on. The connection between the second power supply VC2 and the power conversion branch 80 is established, and the power conversion branch 80 converts and outputs the second power supply VC2 to the first power supply VC1 to supply power to the controller 60. The controller 60 starts to run, and the electronic device also starts to run.

[0047] Please refer to Figure 4 , Figure 4 An exemplary circuit structure corresponding to the block diagram shown in Figure 3 is shown. As shown in Figure 4 , the first power supply branch 10 includes a first diode D1.

[0048] The anode of the first diode D1 is used to input the first power supply VC1, and the cathode of the first diode D1 is connected to the first node P1. When the first power supply VC1 is normally powered, the first voltage V1 is the difference between the voltage of the first power supply VC1 and the forward conduction voltage drop (denoted as VD1) of the first diode D1, i.e. V1 = VC1- VD1.

[0049] In some embodiments, the second power supply branch 20 includes a second diode D2 and a first resistor R1.

[0050] The anode of the second diode D2 is connected to the positive electrode of the battery BAT1 through the first resistor R1, the negative electrode of the battery BAT1 is grounded GND, and the cathode of the second diode D2 is connected to the first node P1. The first resistor R1 is used for current limiting to reduce the working current of the clock chip 40, thereby reducing the working power of the clock chip 40. The voltage of the battery BAT1 is denoted as VBAT, and the second voltage V2 is the difference between the voltage VBAT of the battery BAT1 and the forward conduction voltage drop (denoted as VD2) of the second diode D2, i.e. V2 = VBAT- VD2.

[0051] In some embodiments, the third power supply branch 30 includes a third diode D3, a fourth diode D4, and a first capacitor C1.

[0052] The anode of the third diode D3 is connected to the first power supply VC1, the cathode of the third diode D3 is connected to the first end of the first capacitor C1 and the anode of the fourth diode D4, and the cathode of the fourth diode D4 is connected to the first node P1. When the first power supply VC1 is normally powered, the first power supply VC1 charges the first capacitor C1 through the third diode D3. After the first capacitor C1 is fully charged, the voltage of the first capacitor C1 is the difference between the voltage of the first power supply VC1 and the forward voltage drop (denoted as VD3) of the third diode D3. The third voltage V3 is the difference between the voltage of the first capacitor C1 and the forward voltage drop (denoted as VD4) of the fourth diode D4. Therefore, V3 = VC1 - VD3 - VD4.

[0053] In some embodiments, the voltage detection branch 50 includes a second resistor R2, a third resistor R3, a fourth resistor R4, an operational amplifier U1, and a second capacitor C2.

[0054] The first end of the second resistor R2 is connected to the controller 60, the first end of the second capacitor C2, and the first end of the third resistor R3. The second end of the second resistor R2 and the second end of the second capacitor C2 are both grounded GND. The second end of the third resistor R3 is connected to the output terminal and the inverting input terminal of the operational amplifier U1. The non-inverting input terminal of the operational amplifier U1 is connected to the positive electrode of the battery BAT1 through the fourth resistor R4.

[0055] Specifically, the second capacitor C2 is used for filtering, the second resistor R2 and the third resistor R3 are used for voltage division, and the fourth resistor R4 is used for current limiting. The fourth resistor R4 and the operational amplifier U1 form a voltage follower, so the voltage output by the output terminal of the operational amplifier U1 is equal to the voltage of the battery BAT1. Then, the voltage output by the output terminal of the operational amplifier U1 is divided by the second resistor R2 and the third resistor R3 to obtain a detection signal, which is input to the controller 60 to determine the voltage of the battery BAT1 according to the detection signal. Thus, in some embodiments, when the voltage of the battery BAT1 decreases to a small value, the controller 60 can output warning information to remind the user to replace the battery BAT1 in time. In some embodiments, the resistance value of the fourth resistor R4 can be set to a large value to make the current flowing through the fourth resistor R4 small, thereby reducing power consumption.

[0056] In some embodiments, the switch branch 70 includes a switch tube Q1, a fifth resistor R5, and a sixth resistor R6.

[0057] The first end of the switch tube Q1 is connected to the first end of the fifth resistor R5 and the first end of the sixth resistor R6. The second end of the fifth resistor R5 is connected to the interrupt output terminal (i.e., the clock chip 40 The second end of the sixth resistor R6 and the second end of the switch tube Q1 are both connected to the second power supply VC2. The third end of the switch tube Q1 is connected to the input end of the power conversion branch 80. The output end of the power conversion branch 80 outputs the second power supply VC2.

[0058] Specifically, when the interrupt output terminal outputs an interrupt signal (a low-level signal in this embodiment), the fifth resistor R5 and the sixth resistor R6 divide the voltage of the second power supply VC2. The voltage division of the second power supply VC2 across the sixth resistor R6 drives the switch Q1 to conduct. The sixth resistor R6 also serves to discharge the discharge when the switch Q1 is turned off, ensuring that the switch Q1 is reliably turned off.

[0059] In some embodiments, the clock circuit 100 further includes a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a crystal oscillator RX, a seventh resistor R7, and an eighth resistor R8.

[0060] Among them, the third capacitor C3 is connected between the power supply terminal (i.e., the VDD terminal) of the clock chip 40 and the ground GND, the fourth capacitor C4 is connected between the oscillator input terminal (i.e., the OSCI terminal) of the clock chip 40 and the ground GND, the fifth capacitor C5 is connected between the oscillator output terminal (i.e., the OSCO terminal) of the clock chip 40 and the ground GND, the crystal oscillator RX is connected between the oscillator input terminal of the clock chip 40 and the oscillator output terminal of the clock chip 40, the seventh resistor R7 is connected between the serial data terminal (i.e., the SCL terminal) of the clock chip 40 and the second power supply VC2, and the eighth resistor R8 is connected between the serial clock terminal (i.e., the SDA terminal) of the clock chip 40 and the second power supply VC2.

[0061] Specifically, the seventh resistor R7 and the eighth resistor R8 are pull-up resistors. The third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 are used for filtering.

[0062] The following Figure 4 The principle of the circuit structure shown in FIG. 1 is further explained. For ease of explanation, the following example assumes that the voltage of the first power supply VC1 is 3.3V; the maximum voltage output by the battery BAT1 is 3.0V; the first diode D1 and the second diode D2 are switching diodes with a forward voltage drop of 0.2V; and the third diode D3 and the fourth diode D4 are Schottky diodes with a forward voltage drop of 0.4V.

[0063] Specifically, when the first power supply VC1 can normally supply power, after the first capacitor C1 is fully charged, the voltage of the first capacitor C1 is VC1-VD3=3.3V-0.4V=2.9V, after passing through the fourth diode D4, the third voltage V3 is 2.9V-0.4V=2.5V; after the battery BAT1 passes through the first resistor R1 and the second diode D2, the second voltage V2 is VBAT-VD2=3V-0.2V=2.8V; after the first power supply VC1 passes through the first diode D1, the first voltage V1 is VC1-VD1=3.3V-0.2V=3.1V. Since 3.1V>2.8V>2.5V, at this time the second diode D2 and the fourth diode D4 are both reverse-biased and cut off, and the first voltage V1 is input to the first node P1 to supply power to the clock chip 40.

[0064] When the first power supply VC1 is powered off and cannot supply power to the clock circuit 100, the first voltage V1 is 0, the second voltage V2 is 2.8V, and the third voltage V3 is 2.5V. 2.8V>2.5V, at this time the first diode D1 and the fourth diode D4 are both reverse-biased and cut off, and the second voltage V2 is input to the first node P1 to supply power to the clock chip 40. With the power supply of the battery BAT1, the voltage of the battery BAT1 gradually decreases, and when the voltage of the battery BAT1 decreases to make the second voltage V2 2.5V, the second voltage V2 and the third voltage V3 are input to the first node P1 to supply power to the clock chip 40. When the voltage of the battery BAT1 decreases to make the second voltage V2 less than 2.5V, the third voltage V3 is input to the first node P1 to supply power to the clock chip 40.

[0065] When the battery BAT1 needs to be replaced, the first power supply VC1 also needs to be turned off (i.e. the first power supply VC1 is powered off), at this time the first voltage V1 and the second voltage V2 are both 0, and the third voltage V3 is input to the first node P1 to supply power to the clock chip 40. In some embodiments, the first capacitor C1 can be set to a larger value to provide sufficient time to replace the battery BAT1. For example, in some embodiments, the capacitance of the first capacitor C1 is 1.0F; the change value between the voltage of the first node P1 when the first capacitor C1 starts to discharge (i.e. 2.5V) and the voltage of the first node P1 when it decreases to the minimum voltage (assuming 1.0V) for the normal operation of the clock chip 40 is 2.5V-1.0V=1.5V; assuming that the minimum working current of the clock chip 40 is 250nA; then the working time of the clock chip 40 maintained by the voltage provided by the first capacitor C1 is C*V / I, and C is 1.0F, V is 1.5V, and I is 250nA, which are substituted into the above formula, the working time of the clock chip 40 maintained by the voltage provided by the first capacitor C1 is about 1666 hours, which is sufficient for the user to purchase and replace the battery BAT1.

[0066] In summary, whether the first power supply VC1 is powered off or the user replaces the battery, the real-time clock chip can be continuously powered to improve the accuracy and stability of recording time.

[0067] In some embodiments, when the electronic device including the clock circuit 100 enters sleep or shutdown, the boot time can be set. When the set boot time is reached, the interrupt output end of the clock chip 40 outputs an interrupt signal (i.e. a low-level signal) to the switch tube Q1, so that the switch tube Q1 is turned on. The connection between the second power supply VC2 and the power conversion branch 80 is established, and the power conversion branch 80 converts and outputs the second power supply VC2 to the first power supply VC1 to supply power to the controller 60. The controller 60 starts to run, and the electronic device also starts to run.

[0068] The embodiments of the present application also provide an electronic device, which includes the clock circuit 100 as in any of the embodiments of the present application.

[0069] The above only describes the embodiments of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation using the content of the present application specification and drawings, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

[0070] The above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; under the idea of the present application, the above embodiments or the technical features between different embodiments can also be combined, and the steps can be implemented in any order. Those skilled in the art should understand that the technical solutions recorded in the above embodiments can still be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A clock circuit, characterized in that: include: A clock chip, a first power supply branch, a second power supply branch, and a third power supply branch; The first power supply branch, the second power supply branch, and the third power supply branch are all connected to the power supply terminal of the clock chip and connected to the first node, and the second power supply branch is also connected to the battery; The first power supply branch is configured to output a first voltage based on a voltage of the first power supply when receiving the first power supply, wherein the first voltage is input to the first node, and the voltage of the first node is the power supply voltage of the clock chip; The second power supply branch is configured to output a second voltage based on the voltage of the battery; The third power supply branch is configured to store electrical energy based on the first power supply when receiving the first power supply, and output a third voltage based on the stored electrical energy, wherein when the first power supply branch does not output the first voltage, the maximum value of the second voltage and the third voltage is input to the first node.

2. The clock circuit according to claim 1, wherein: The clock circuit also includes a voltage detection branch and a controller; The voltage detection branch is connected to the battery and the controller respectively. The voltage detection branch is configured to output a detection signal to the controller based on the voltage of the battery, so that the controller determines the voltage of the battery based on the detection signal.

3. The clock circuit according to claim 1, wherein: The clock circuit further includes a switch branch and a power conversion branch; The switch branch is connected to the interrupt output terminal of the clock chip, the power conversion branch and the second power supply respectively, and the switch branch is configured to be turned on in response to an interrupt signal output by the interrupt output terminal to establish a connection between the second power supply and the power conversion branch; The power conversion branch is configured to convert the second power source into the first power source when the power conversion branch is connected to the second power source.

4. The clock circuit according to claim 1, wherein: The first power supply branch includes a first diode; An anode of the first diode is used to input the first power supply, and a cathode of the first diode is connected to the first node.

5. The clock circuit according to claim 1, wherein: The second power supply branch includes a second diode and a first resistor; An anode of the second diode is connected to the positive electrode of the battery through the first resistor, a negative electrode of the battery is grounded, and a cathode of the second diode is connected to the first node.

6. The clock circuit according to claim 1, wherein: The third power supply branch includes a third diode, a fourth diode and a first capacitor; The anode of the third diode is used to connect to the first power supply, the cathode of the third diode is respectively connected to the first end of the first capacitor and the anode of the fourth diode, and the cathode of the fourth diode is connected to the first node.

7. The clock circuit according to claim 2, wherein: The voltage detection branch includes a second resistor, a third resistor, a fourth resistor, an operational amplifier and a second capacitor; The first end of the second resistor is respectively connected to the controller, the first end of the second capacitor and the first end of the third resistor, the second end of the second resistor and the second end of the second capacitor are both grounded, the second end of the third resistor is respectively connected to the output terminal and the inverting input terminal of the operational amplifier, and the non-inverting input terminal of the operational amplifier is connected to the positive electrode of the battery through the fourth resistor.

8. The clock circuit according to claim 3, wherein: The switch branch includes a switch tube, a fifth resistor and a sixth resistor; The first end of the switching tube is respectively connected to the first end of the fifth resistor and the first end of the sixth resistor, the second end of the fifth resistor is connected to the interrupt output end, the second end of the sixth resistor and the second end of the switching tube are both connected to the second power supply, the third end of the switching tube is connected to the input end of the power conversion branch, and the output end of the power conversion branch outputs the second power supply.

9. The clock circuit according to any one of claims 1 to 8, wherein: The clock circuit further includes a third capacitor, a fourth capacitor, a fifth capacitor, a crystal oscillator, a seventh resistor and an eighth resistor; The third capacitor is connected between the power supply terminal of the clock chip and the ground, the fourth capacitor is connected between the oscillator input terminal of the clock chip and the ground, the fifth capacitor is connected between the oscillator output terminal of the clock chip and the ground, the crystal oscillator is connected between the oscillator input terminal of the clock chip and the oscillator output terminal of the clock chip, the seventh resistor is connected between the serial data terminal of the clock chip and the second power supply, and the eighth resistor is connected between the serial clock terminal of the clock chip and the second power supply.

10. An electronic device, characterized in that: The method comprises the clock circuit according to any one of claims 1 to 9.

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