Surge protection circuit and electronic device

Abstract

The embodiment of the utility model relates to the technical field of power supplies, and discloses a surge protection circuit and electronic equipment. The surge protection circuit comprises a pressure-sensitive circuit, a voltage stabilizing circuit, a switching circuit, an anti-interference circuit and a reverse clamping circuit. When the first node receives surge energy, the voltage stabilizing circuit is in a breakdown state and outputs starting current to the switching circuit through the third node, then the switching circuit enters a conducting state, and a loop among the first node, the voltage-sensitive circuit, the switching circuit and the fourth node is conducted, so that the surge energy is discharged through the voltage-sensitive circuit and the switching circuit. And surge absorption is realized.

Description

TECHNICAL FIELD

[0001] The embodiment of the present application relates to the technical field of power supply, in particular to a surge protection circuit and electronic equipment. BACKGROUND

[0002] In outdoor environment, natural phenomena such as lightning occur frequently, and the intense discharge activity can seriously interfere with the voltage stability of the power supply network, and then cause very strong surge pulse voltage and pulse current interference. For single-phase or three-phase power supply system, surge interference mainly presents two forms: differential mode interference and common mode interference. Specifically, the differential mode interference is the interference phenomenon occurring between the phase lines (such as L1 and L2, or L line and N line) of the power supply network; and the common mode interference refers to the interference generated by the power supply network relative to the protective earth (PE), such as the interference between L line / N line and PE line.

[0003] At present, the industry mainly relies on the combination of gas discharge tubes or solid discharge tubes to clamp and absorb the common mode surge energy. However, so far, there is no specially designed protection circuit that can effectively absorb and suppress the differential mode surge energy. As a common form of electromagnetic interference in the power supply network, the burstiness and high energy characteristics of the differential mode surge interference pose a potential threat to the stable operation of the power system, which may cause equipment failure or even system paralysis. CONTENT OF THE UTILITY MODEL

[0004] In order to solve the above technical problems, the embodiment of the present application provides a surge protection circuit and electronic equipment, which can absorb the differential mode surge energy.

[0005] In the first aspect, the embodiment of the present application provides a surge protection circuit, comprising: a pressure sensitive circuit, a voltage stabilizing circuit, a switching circuit, an anti-interference circuit and a reverse clamping circuit. The pressure sensitive circuit comprises a first node and a second node; the voltage stabilizing circuit is electrically connected to the first node, and the voltage stabilizing circuit comprises a third node, and is used for entering a breakdown state in response to the surge energy received by the first node, and outputs a starting current based on the third node in the breakdown state; the switching circuit is electrically connected between the second node and the third node, and the switching circuit comprises a fourth node, and is used for entering a conduction state in response to the starting current, so that the surge energy is released to the fourth node through the pressure sensitive circuit and the switching circuit; the anti-interference circuit is electrically connected between the third node and the fourth node, and is used for releasing an abnormal signal to the fourth node; and the reverse clamping circuit is electrically connected between the third node and the fourth node, and is used for clamping the voltage between the fourth node and the third node in a safe voltage range in response to a high voltage signal applied to the fourth node.

[0006] In some embodiments, the anti-interference circuit includes a first resistor electrically connected between the third node and the fourth node.

[0007] In some embodiments, the pressure-sensitive circuit is a pressure-sensitive resistor including a first node and a second node, the pressure-sensitive resistor being electrically connected to the voltage stabilizing circuit at the first node and electrically connected to the switch circuit at the second node; or, the pressure-sensitive circuit includes at least two pressure-sensitive resistors connected in parallel between the first node and the second node.

[0008] In some embodiments, the voltage stabilizing circuit includes a current limiting circuit electrically connected at the first node and a voltage stabilizing unit electrically connected between the current limiting circuit and the third node, for outputting the starting current based on the third node in a breakdown state in response to the surge energy transmitted by the current limiting circuit.

[0009] In some embodiments, the voltage stabilizing unit is a transient suppression diode or a voltage stabilizing diode, a cathode of the transient suppression diode or a cathode of the voltage stabilizing diode being electrically connected to the current limiting circuit, and an anode of the transient suppression diode or an anode of the voltage stabilizing diode being electrically connected to the third node; or, the voltage stabilizing circuit includes at least two transient suppression diodes or at least two voltage stabilizing diodes connected in series between the current limiting circuit and the third node; or, the voltage stabilizing circuit includes a first bidirectional transient suppression diode or a first bidirectional voltage stabilizing diode electrically connected between the current limiting circuit and the third node.

[0010] In some embodiments, the switch circuit is a thyristor, an anode of the thyristor being electrically connected to the second node, a cathode of the thyristor being electrically connected to the fourth node, and a control electrode of the thyristor being electrically connected to the third node; or, the switch circuit is a bidirectional thyristor, an anode of the bidirectional thyristor being electrically connected to the second node, a cathode of the bidirectional thyristor being electrically connected to the fourth node, and a control electrode of the bidirectional thyristor being electrically connected to the third node.

[0011] In some embodiments, the reverse clamping circuit is a first diode, a positive electrode of the first diode being electrically connected to the fourth node, and a negative electrode of the first diode being electrically connected to the third node; or, the reverse clamping circuit is a second bidirectional transient suppression diode or a second bidirectional voltage stabilizing diode electrically connected between the third node and the fourth node.

[0012] In some embodiments, the switch circuit comprises: a first switch unit and a second switch unit. The first switch unit is electrically connected between the first node and the fourth node and is also electrically connected to the third node, and the first switch unit comprises a fifth node for entering an on state in response to the start current input by the third node and outputting a target current through the fifth node in the on state; the second switch unit is electrically connected between the voltage-sensitive circuit and the fourth node and is also electrically connected to the fifth node for entering an on state in response to the target current.

[0013] In some embodiments, the first switch unit comprises a second resistor, a first switch tube and a third resistor, one end of the second resistor is electrically connected to the first node, the other end of the second resistor is electrically connected to the collector of the first switch tube, the base of the first switch tube is electrically connected to the third node, the emitter of the first switch tube is electrically connected to the fifth node, one end of the third resistor is electrically connected to the fifth node, and the other end of the third resistor is electrically connected to the fourth node; and / or, the second switch unit comprises a second switch tube and a second diode, the collector of the second switch tube is electrically connected to the voltage-sensitive circuit, the base of the second switch tube is electrically connected to the fifth node, the emitter of the second switch tube is electrically connected to the fourth node, and the second diode is electrically connected between the fourth node and the fifth node.

[0014] In a second aspect, the embodiments of the present application provide an electronic device comprising the surge protection circuit according to any one of the embodiments of the first aspect.

[0015] The surge protection circuit provided by the embodiments of the present application has the following beneficial effects: when the first node receives surge energy, the surge protection circuit provided by the embodiments of the present application can output a start current to the switch circuit through the voltage stabilizing circuit to make the switch circuit conductive, establish a loop between the first node, the voltage-sensitive circuit, the switch circuit and the fourth node, and enable the voltage-sensitive circuit to absorb the surge energy, thereby realizing surge absorption. At the same time, the anti-interference circuit in the surge protection circuit can release abnormal signals of the third node, reduce the situation of false triggering of the switch circuit, and improve the reliability of the circuit operation. In addition, when the fourth node receives a high-voltage signal, the reverse clamping circuit can clamp the voltage between the fourth node and the third node within a safe voltage range, prevent the high-voltage signal from damaging the devices in the circuit, and ensure that the circuit can operate stably. BRIEF DESCRIPTION OF DRAWINGS

[0016] One or more embodiments are illustrated by way of example in the drawings and are described herein in connection with the embodiments presented. The embodiments disclosed herein are not intended to be exhaustive or to limit the claims to the precise form disclosed. The drawings are not necessarily to scale, and the embodiments disclosed herein can be used as a basis for designing or manufacturing a variety of structures. Stated dimensions are approximate. Values stated for material properties are approximate. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0017] Figure 1 A structural block diagram of a surge protection circuit provided for an embodiment of the present application;

[0018] Figure 2 A circuit structure schematic diagram of a surge protection circuit provided for an embodiment of the present application;

[0019] Figure 3 A circuit structure schematic diagram of another surge protection circuit provided for an embodiment of the present application;

[0020] Figure 4 A structural block diagram of another surge protection circuit provided for an embodiment of the present application;

[0021] Figure 5 A circuit structure schematic diagram of another surge protection circuit provided for an embodiment of the present application;

[0022] Figure 6 A structural block diagram of another surge protection circuit provided for an embodiment of the present application;

[0023] Figure 7 A circuit structure schematic diagram of another surge protection circuit provided for an embodiment of the present application. DETAILED DESCRIPTION

[0024] In order to facilitate the understanding of the present application, the present application will be described in more detail below in conjunction with the drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on the other element or one or more intervening elements can be present therebetween. When an element is described as "electrically connected to" another element, it can be directly connected to the other element or one or more intervening elements can be present therebetween. The terms "upper", "lower", "inner", "outer", "bottom", etc. used in the specification indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", "third", etc. are only for the purpose of description and cannot be understood as indicating or implying relative importance.

[0025] Unless otherwise defined, all technical and scientific terms used in the present disclosure have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. All publications, patent applications, patents, and other references mentioned in this specification are herein incorporated by reference. In case of a conflict in terminology, the present specification controls. In addition, features of different embodiments of the application described below can be combined unless otherwise indicated.

[0026] For differential mode interference, according to the circuit structure and input voltage level, the following three ways can be used for surge absorption. The first way is to add a large capacity electrolytic capacitor on the input side, or to connect the bus capacitor in the later stage of the boost circuit through the bypass diode, and to absorb the surge energy by the capacitor. This way is simple in structure, and the absorption effect can be improved by increasing the capacitance value. However, in the step-down circuit, a large capacity electrolytic capacitor needs to be configured at the input end, and in the high voltage input situation, the selection of suitable devices becomes particularly difficult. The second way is to use a varistor combined with a special semiconductor discharge tube to absorb surge energy. In this way, the semiconductor discharge tube is blocked in normal working voltage, and the varistor is connected and conducts only when the input surge peak exceeds the breakdown voltage of the semiconductor discharge tube, thereby absorbing energy. Although fewer components are required, the power capacity of the semiconductor discharge tube is limited, making it difficult to meet the device selection requirements of different application environments, especially in high surge levels, the selection difficulty increases significantly. The third way is to use a varistor combined with a control switch to realize the absorption of surge energy. A special overvoltage signal acquisition circuit is used to detect whether the surge overvoltage condition is met, and the control switch is opened to connect the varistor to absorb pulse energy when the overvoltage occurs. However, this way has a relatively complex circuit structure, and if the signal judgment delay is too long, it will affect the absorption effect, and the system reliability is limited.

[0027] To solve the above technical problems, the embodiments of the present application provide a surge protection circuit and an electronic device. When the first node receives surge energy, the starting current can be output to the switch circuit through the voltage stabilizing circuit, so that the switch circuit is turned on, a loop between the first node, the varistor circuit, the switch circuit and the fourth node is established, and the varistor circuit can absorb the surge energy, so that the differential mode surge energy can be absorbed. At the same time, the anti-interference circuit in the surge protection circuit can release the abnormal signal of the third node, reduce the mis-triggering of the switch circuit, and improve the reliability of the circuit operation. In addition, when the fourth node receives a high voltage signal, the reverse clamping circuit can clamp the voltage between the fourth node and the third node within a safe voltage range, prevent the high voltage signal from damaging the devices in the circuit, and ensure the stable operation of the circuit.

[0028] In a first aspect, the embodiments of the present application provide a surge protection circuit, as shown inFigure 1 The surge protection circuit 100 comprises a voltage-sensitive circuit 10, a voltage stabilizing circuit 20, a switch circuit 30, an anti-interference circuit 40 and a reverse clamping circuit 50.

[0029] The voltage-sensitive circuit 10 comprises a first node A and a second node B. The voltage stabilizing circuit 20 is electrically connected to the first node A, and comprises a third node C. The voltage stabilizing circuit 20 is configured to enter a breakdown state in response to a surge energy received by the first node A, and output a start current based on the third node C in the breakdown state. The switch circuit 30 is electrically connected between the second node B and the third node C, and comprises a fourth node D. The switch circuit 30 is configured to enter a conduction state in response to the start current, so that the surge energy is released to the fourth node D through the voltage-sensitive circuit 10 and the switch circuit 30. The anti-interference circuit 40 is electrically connected between the third node C and the fourth node D, and is configured to release an abnormal signal to the fourth node D. The reverse clamping circuit 50 is electrically connected between the third node C and the fourth node D, and is configured to clamp a voltage between the fourth node D and the third node C to a safe voltage range in response to a high-voltage signal applied to the fourth node D.

[0030] The surge energy refers to an energy peak value that appears instantaneously and exceeds a normal working range, and exists in the form of a surge voltage and a surge current, has extremely high intensity and extremely short duration, and is a pulse energy with only microsecond level of time.

[0031] The voltage-sensitive circuit 10 refers to a circuit whose resistance value changes with a voltage between the first node A and the second node B, has a nonlinear characteristic, and can rapidly change the resistance value when the voltage between the two ends is in a specific voltage range. The voltage stabilizing circuit 20 refers to a circuit that can provide a stable voltage when breakdown occurs. The switch circuit 30 refers to a circuit that can control the conduction or turn-off of the circuit, and can be turned on after receiving the start current. The anti-interference circuit 40 is a circuit that can absorb abnormal signals, thereby reducing or eliminating the influence of external interference signals on the surge protection circuit 100. The reverse clamping circuit 50 refers to a circuit that can limit the voltage to a safe voltage range, and can limit the voltage between the third node C and the fourth node D to a predetermined safe value when the voltage between the third node C and the fourth node D exceeds the safe voltage range.

[0032] The first node A and the fourth node D are used to connect the input side of a power supply system, for example, the first node A and the fourth node D are connected to a live wire L and a neutral wire N, or are connected between the lines of a three-phase power supply circuit, such as the first node A connected to a phase wire L1 and the fourth node D connected to a phase wire L2, so that the surge protection circuit 100 absorbs a differential mode surge.

[0033] In the surge protection circuit 100, when the first node A receives a surge energy, the voltage stabilizing circuit 20 is in a breakdown state and outputs a starting current to the switching circuit 30 through the third node C, then the switching circuit 30 will enter a conducting state, so that the circuit between the first node A, the pressure sensitive circuit 10, the switching circuit 30 and the fourth node D is conducted, thus the surge energy can be discharged through the pressure sensitive circuit 10 and the switching circuit 30, and meanwhile the reverse clamping circuit 50 can make the voltage of the third node C in a safe voltage range. With the gradual decrease of the surge energy, the switching circuit 30 will enter a disconnection state, so that the circuit between the first node A, the pressure sensitive circuit 10, the switching circuit 30 and the fourth node D is disconnected. In addition, when there is an abnormal signal in the third node C, the anti-interference circuit 40 can absorb the abnormal signal to avoid the switching circuit 30 from being mistakenly conducted, thus improving the anti-interference ability of the surge protection circuit 100.

[0034] It can be seen that in the circuit, the surge absorption can be realized by using the pressure sensitive circuit 10 and the switching circuit 30. Meanwhile, the anti-interference circuit 40 in the surge protection circuit 100 can release the abnormal signal of the third node C to reduce the situation of the switching circuit 10 being mistakenly triggered to conduct, thus improving the reliability of the circuit operation. In addition, when the fourth node D receives a high voltage signal, the reverse clamping circuit can clamp the voltage between the fourth node D and the third node C in a safe voltage range, thus preventing the high voltage signal from damaging the devices in the circuit and ensuring the stable operation of the circuit. Moreover, the circuit does not need a special overvoltage signal collecting circuit, thus reducing the complexity of the circuit structure and the cost.

[0035] In some embodiments, referring to Figure 2 , the anti-interference circuit 40 comprises a first resistor R1, which is electrically connected between the third node C and the fourth node D. When the first resistor R1 receives an abnormal signal, i.e. an unstable current signal, the first resistor R1 will absorb the unstable current signal. It can be understood that if the anti-interference circuit 40 is not arranged in the surge protection circuit 100, the switching circuit 30 may be conducted when the third node C receives an abnormal signal, while in the present embodiment, the anti-interference circuit 40 is arranged to avoid the abnormal signal from mistakenly triggering the switching circuit 30 to conduct, thus improving the anti-interference ability and the reliability of the surge protection circuit 100.

[0036] In some embodiments, referring to Figure 1 and Figure 2 , the pressure sensitive circuit 10 is a pressure sensitive resistor RV1, which comprises the first node A and the second node B, and is electrically connected with the voltage stabilizing circuit 20 at the first node A and with the switching circuit 30 at the second node B. Alternatively, the pressure sensitive circuit 10 comprises at least two pressure sensitive resistors, which are connected in parallel between the first node A and the second node B. For example, referring toFigure 3 The voltage-sensitive circuit 10 comprises a voltage-sensitive resistor RV2 and a voltage-sensitive resistor RV3, which are connected in parallel between the first node A and the second node B.

[0037] A voltage-sensitive resistor is a resistor device with nonlinear volt-ampere characteristics, which can withstand and flow through tens to hundreds of ampere pulse current when the terminal voltage is too high. When the voltage between the first node A and the second node B is too large, the current flowing through the voltage-sensitive resistor in the voltage-sensitive circuit 10 surges, and the voltage-sensitive resistor in the voltage-sensitive circuit 10 is equivalent to a resistor with a smaller resistance, thereby quickly dissipating the surge energy. In practical applications, the selection of the voltage-sensitive resistor needs to meet the reverse repeat voltage under normal working conditions, and at the same time, the clamping voltage during energy absorption should not be too high.

[0038] In this embodiment, by setting the voltage-sensitive resistor, the surge energy can be absorbed to achieve surge protection. Moreover, in application, according to the actual surge absorption demand, the number of voltage-sensitive resistors in the voltage-sensitive circuit 10 can be increased to enhance the surge absorption effect.

[0039] In some embodiments, referring to Figure 1 and Figure 4 The voltage stabilizing circuit 20 comprises a current-limiting circuit 21 and a voltage stabilizing unit 22. The current-limiting circuit 21 is electrically connected to the first node A. The voltage stabilizing unit 22 is electrically connected between the current-limiting circuit 21 and the third node C, and is used to enter a breakdown state in response to the surge energy transmitted by the current-limiting circuit 21, and output a starting current based on the third node C in the breakdown state.

[0040] The current-limiting circuit 21 refers to a circuit capable of limiting the size of the current. In some embodiments, referring to Figure 2 , the current-limiting circuit 21 comprises a fourth resistor R4 connected between the first node A and the voltage stabilizing unit 22. The fourth resistor R4 can play a role in limiting the current, which can avoid the current transmitted to the voltage stabilizing unit 22 being too large. The number of resistors provided in the current-limiting circuit 21 can be set according to actual needs.

[0041] The voltage stabilizing unit 22 refers to a device capable of providing a stable voltage. In the surge protection circuit 100, when the first node A receives the surge energy, the current-limiting circuit 21 can limit the size of the current when the surge energy is transmitted through the current-limiting circuit 21, thereby protecting the subsequent circuit devices and improving the reliability of the circuit operation. At the same time, the voltage stabilizing unit 22 enters a breakdown state, so that the voltage stabilizing unit 22 clamps the voltage across the two ends and outputs a starting current to the third node C to turn on the switching circuit 30 to achieve surge protection.

[0042] In some embodiments, referring to Figure 2 , the voltage stabilizing unit 22 is a transient suppression diode D TVS1or a zener diode, a transient voltage suppression diode D TVS1 The cathode of the diode or the cathode of the zener diode is electrically connected to the current limiting circuit 21, the transient voltage suppression diode D TVS1 The anode of the diode or the anode of the zener diode is electrically connected to the third node C. The transient voltage suppression diode D TVS1 The diode or the zener diode is capable of changing the high impedance between its two poles to a low impedance, allowing a large current to pass, and clamping the voltage between its two poles to a predetermined value, once the voltage between its two poles exceeds the breakdown voltage, the transient voltage suppression diode D TVS1 The predetermined value is related to the model of the diode or the zener diode, and once the overvoltage disappears, the transient voltage suppression diode D TVS1 The diode or the zener diode will return to the high impedance state, preventing normal current from passing. In this circuit, once the surge energy is received at the first node A, the transient voltage suppression diode D TVS1 (or the zener diode) will conduct, and the surge energy will pass through the fourth resistor R4 and the transient voltage suppression diode D TVS1 (or the zener diode) to output a start-up current to the switching circuit 30, and at the same time, the transient voltage suppression diode D TVS1 (or the zener diode) clamps the voltage between the fourth resistor R4 and the third node C to a predetermined voltage value, protecting the components in the circuit.

[0043] Alternatively, the voltage stabilizing circuit 20 includes at least two transient voltage suppression diodes or at least two zener diodes, and the at least two transient voltage suppression diodes or the at least two zener diodes are connected in series between the current limiting circuit 21 and the third node C. For example, referring to Figure 3 The voltage stabilizing circuit 20 includes the transient voltage suppression diode D TVS2 and the transient voltage suppression diode D TVS3 The cathode of the transient voltage suppression diode D TVS2 is connected to the current limiting circuit 21 (e.g., connected to the fourth resistor R4), the anode of the transient voltage suppression diode D TVS2 is connected to the cathode of the transient voltage suppression diode D TVS3 , and the anode of the transient voltage suppression diode D TVS3 is connected to the third node C. In the same way, once the surge energy is received at the first node A, the transient voltage suppression diode D TVS2 and the transient voltage suppression diode D TVS3 will conduct, and the surge energy will pass through the fourth resistor R4, the transient voltage suppression diode D TVS2 and the transient voltage suppression diode D TVS3 to output a start-up current to the switching circuit 30, and at the same time, the transient voltage suppression diode D TVS2 and the transient voltage suppression diode D TVS3The fourth resistor R4 and the third node C are clamped at a predetermined voltage value under the joint action. Since the withstand range of the transient suppression diode or the voltage stabilizing diode is limited, when the surge energy demand is high, a plurality of transient suppression diodes or voltage stabilizing diodes are connected in series in the circuit to increase the breakdown voltage, so as to meet the higher surge energy demand.

[0044] Alternatively, referring to Figure 5 , the voltage stabilizing circuit 20 includes a first bidirectional transient suppression diode D TVS4 or a first bidirectional voltage stabilizing diode, and the first bidirectional transient suppression diode D TVS4 or the first bidirectional voltage stabilizing diode is electrically connected between the current limiting circuit 21 and the third node C. The first bidirectional transient suppression diode D TVS4 and the first bidirectional voltage stabilizing diode can be in a breakdown state when an overvoltage is received in two directions, so that when the first node A or the fourth node D receives a surge energy, the first bidirectional transient suppression diode D TVS4 and the first bidirectional voltage stabilizing diode are both turned on, so that the surge energy is output to the switching circuit 30 through the first bidirectional transient suppression diode D TVS4 and the first bidirectional voltage stabilizing diode, so as to realize the absorption of surge energy in two directions and improve the application scenarios of the surge protection circuit. Moreover, in the bidirectional protection scenario, compared with the protection using unidirectional devices, the bidirectional devices are used to realize bidirectional protection in the embodiment, so that the number of devices can be reduced and the circuit cost can be reduced.

[0045] In some embodiments, referring to Figure 2 , the switching circuit 30 is a thyristor Q SCR1 , the anode of the thyristor Q SCR1 is electrically connected to the second node B, the cathode of the thyristor Q SCR1 is electrically connected to the fourth node D, and the control electrode of the thyristor Q SCR1 is electrically connected to the third node C; or, referring to Figure 5 , the switching circuit 30 is a bidirectional thyristor Q SCR2 , the anode of the bidirectional thyristor Q SCR2 is electrically connected to the second node B, the cathode of the bidirectional thyristor Q SCR2 is electrically connected to the fourth node D, and the control electrode of the bidirectional thyristor Q SCR2 is electrically connected to the third node C.

[0046] The thyristor Q SCR1 is also called a thyristor, and the thyristor Q SCR1 can be turned on from a blocking state to a conducting state when the control electrode receives a starting current, allowing current to flow from the anode to the cathode. The bidirectional thyristor Q SCR2When the control electrode receives the starting current, it can also be converted from the blocking state to the conducting state, and the current direction can flow from the anode to the cathode or from the cathode to the anode, depending on the direction of the external voltage.

[0047] Q SCR1 (or bidirectional thyristor Q SCR2 ) will be turned on after receiving the starting current of the third node C, and the surge energy will flow through the first node A, the pressure-sensitive circuit 10, the thyristor Q SCR1 (or bidirectional thyristor Q SCR2 ) and the fourth node D in turn, so that the surge energy can be discharged. As the surge energy gradually decreases, the current flowing through the pressure-sensitive circuit 10 and the thyristor Q SCR1 (or bidirectional thyristor Q SCR2 ) also gradually decreases. Once it is lower than the holding current that maintains the thyristor Q SCR1 (or bidirectional thyristor Q SCR2 ) in the on state, the thyristor Q SCR1 (or bidirectional thyristor Q SCR2 ) will be turned off, and the discharge path will be disconnected.

[0048] In this embodiment, the control circuit of the thyristor is relatively simple, and only needs to apply a starting current to the control electrode to be in the on state, which reduces the complexity of the circuit structure and has a fast response speed. When a bidirectional surge energy appears, the bidirectional thyristor Q SCR2 can be used as the switching circuit 10, which improves the application scenarios of the surge protection circuit.

[0049] In some embodiments, referring to Figure 2 , the reverse clamping circuit 50 is a first diode D1, the positive electrode of the first diode D1 is electrically connected to the fourth node D, and the negative electrode of the first diode D1 is electrically connected to the third node C. Alternatively, referring to Figure 5 , the reverse clamping circuit 50 is a second bidirectional transient suppression diode D TVS5 or a second bidirectional voltage stabilizing diode, which is electrically connected between the third node C and the fourth node D. TVS5

[0050] When the third node C receives the starting current, the first diode D1 provides reverse clamping to prevent the third node C from appearing a high reverse voltage, ensuring the safety of the circuit operation. The second bidirectional transient suppression diode D TVS5 or the second bidirectional voltage stabilizing diode can clamp in both directions.

[0051] ​In the embodiment, by setting the diode as the reverse clamping circuit 50, when the over-high reverse voltage occurs, the diode can quickly clamp the voltage, effectively suppress the voltage rise, avoid the high voltage from damaging the circuit components, and improve the reliability of the circuit operation. In addition, when the bidirectional transient suppression diode or the bidirectional voltage stabilizing diode is used, the reliability of the surge protection circuit applied to the bidirectional surge energy absorption scene can be improved.

[0052] In some embodiments, referring to Figure 6 The switching circuit 30 includes a first switching unit 31 and a second switching unit 32. The first switching unit 31 is electrically connected between the first node A and the fourth node D and also electrically connected to the third node C. The first switching unit 31 includes a fifth node E for entering the conduction state in response to the start current input from the third node C and outputting the target current through the fifth node E in the conduction state. The second switching unit 32 is electrically connected between the voltage stabilizing circuit 20 and the fourth node D and also electrically connected to the fifth node E for entering the conduction state in response to the target current.

[0053] In the surge protection circuit 100, after the first node A receives the surge energy, the voltage stabilizing circuit 20 outputs the start current to the third node C, the first switching unit 31 is in the conduction state, and outputs the target current to the fifth node E, so that the second switching unit 32 is in the conduction state, and the loop between the first node A, the voltage stabilizing circuit 20, the second switching unit 32 and the fourth node D is in the conduction state. In this way, the surge energy can be discharged through the voltage stabilizing circuit 20 and the second switching unit 32. As the surge energy gradually decreases, the first switching unit 31 enters the off state, and the second switching unit 32 is turned off, so that the loop between the first node A, the voltage stabilizing circuit 20, the second switching unit 32 and the fourth node D is turned off.

[0054] It can be seen that in the circuit, by setting two switching units, the discharge path of the surge energy can be established when the start current is received, and the surge energy absorption is realized.

[0055] In some embodiments, referring to Figure 7The first switch unit 31 comprises a second resistor R2, a first switch tube Q1 and a third resistor R3. One end of the second resistor R2 is electrically connected to the first node A, and the other end of the second resistor R2 is electrically connected to the collector of the first switch tube Q1. The base of the first switch tube Q1 is electrically connected to the third node C, and the emitter of the first switch tube Q1 is electrically connected to the fifth node E. One end of the third resistor R3 is electrically connected to the fifth node E, and the other end of the third resistor R3 is electrically connected to the fourth node D. And / or, the second switch unit 32 comprises a second switch tube Q2 and a second diode D2. The collector of the second switch tube Q2 is electrically connected to the voltage-sensitive circuit 10. The base of the second switch tube Q2 is electrically connected to the fifth node E, and the emitter of the second switch tube Q2 is electrically connected to the fourth node D. The second diode D2 is electrically connected between the fourth node D and the fifth node E.

[0056] The first switch tube Q1 and the second switch tube Q2 can be NPN triodes, and in practical applications, NMOS tubes or other suitable switch devices can also be used. In the surge protection circuit 100, after the first node A receives the surge energy, the voltage stabilizing circuit 20 outputs a starting current to the third node C. The first switch tube Q1 is in a conducting state. The surge energy outputs a target current to the fifth node E through the second resistor R2 and the first switch tube Q1. The base of the second switch tube Q2 receives the target current and is in a conducting state. The circuit between the first node A, the voltage-sensitive circuit 10, the second switch tube Q2 and the fourth node D is turned on. In this way, the surge energy can be discharged through the voltage-sensitive circuit 10 and the second switch tube Q2, and the surge energy absorption is realized. At the same time, the second diode D2 can clamp the voltage of the fifth node E, so as to avoid the overvoltage of the base of the second switch tube Q2 and protect the devices in the circuit. With the gradual decrease of the surge energy, the first switch tube Q1 and the second switch tube Q2 will enter the off state, so as to disconnect the circuit between the first node A, the voltage-sensitive circuit 10, the second switch tube Q2 and the fourth node D.

[0057] The specific working process of the surge protection circuit 100 provided by the present application will be described in detail below with reference to the embodiment shown in Figure 2 .

[0058] In the circuit shown in Figure 2 , when the surge energy on the first node A is greater than the breakdown voltage of the transient voltage suppression diode D TVS1 , the transient voltage suppression diode D TVS1 is broken down and turned on. The surge energy outputs a starting current to the control electrode of the thyristor Q TVS1 through the fourth resistor R4 and the transient voltage suppression diode D SCR1 . The thyristor Q SCR1 is turned on, so that the first node A, the voltage-sensitive resistor RV1 and the thyristor Q SCR1The loop between the first node A, the pressure sensitive resistor RV1, the thyristor Q SCR1 is conducted, so that the surge energy can be absorbed. Meanwhile, the first diode D1 can make the voltage of the third node C in a safe voltage range. With the gradual decrease of the surge energy, the current flowing through the thyristor Q SCR1 is gradually reduced. When the current is less than the maintaining current for maintaining the thyristor Q SCR1 conduction, the thyristor Q SCR1 is turned off, so that the loop between the first node A, the pressure sensitive resistor RV1, the thyristor Q SCR1 and the fourth node D is disconnected. In addition, when there is an abnormal signal at the third node C, the abnormal signal will be released through the first resistor R1, avoiding the thyristor Q SCR1 from being turned on by mistake, and improving the anti-interference ability of the surge protection circuit 100.

[0059] In a second aspect, the embodiments of the present application further provide an electronic device, which comprises the surge protection circuit according to any one of the first aspect. In the embodiments, the surge protection circuit has the same structure and function as the surge protection circuit according to any one of the first aspect, which will not be described here. The electronic device can be a power supply device.

[0060] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes of different aspects of the present application as described above, which are not provided in details for simplicity; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A surge protection circuit, characterized in that: include: A pressure-sensitive circuit includes a first node and a second node; a voltage stabilizing circuit electrically connected to the first node, the voltage stabilizing circuit including a third node, configured to enter a breakdown state in response to surge energy received by the first node, and output a startup current based on the third node in the breakdown state; a switch circuit electrically connected between the second node and the third node, the switch circuit including a fourth node, configured to enter a conducting state in response to the starting current, so that the surge energy is released to the fourth node through the varistor circuit and the switch circuit; an anti-interference circuit, electrically connected between the third node and the fourth node, and configured to release an abnormal signal to the fourth node; The reverse clamping circuit is electrically connected between the third node and the fourth node, and is used for clamping the voltage between the fourth node and the third node within a safe voltage range in response to a high voltage signal applied to the fourth node.

2. The surge protection circuit according to claim 1, wherein: The anti-interference circuit includes a first resistor electrically connected between the third node and the fourth node.

3. The surge protection circuit according to claim 1, wherein: The pressure-sensitive circuit is a pressure-sensitive resistor, the pressure-sensitive resistor includes a first node and a second node, the pressure-sensitive resistor is electrically connected to the voltage stabilizing circuit at the first node, and the pressure-sensitive resistor is also electrically connected to the switch circuit at the second node; or, The pressure-sensitive circuit includes at least two pressure-sensitive resistors, and the at least two pressure-sensitive resistors are connected in parallel between the first node and the second node.

4. The surge protection circuit according to claim 1, wherein: The voltage stabilizing circuit comprises: a current limiting circuit electrically connected to the first node; A voltage stabilizing unit is electrically connected between the current limiting circuit and the third node, and is configured to enter a breakdown state in response to surge energy transmitted by the current limiting circuit, and output the startup current based on the third node in the breakdown state.

5. The surge protection circuit according to claim 4, characterized in that: The voltage stabilizing unit is a transient suppression diode or a voltage stabilizing diode, the cathode of the transient suppression diode or the cathode of the voltage stabilizing diode is electrically connected to the current limiting circuit, and the anode of the transient suppression diode or the anode of the voltage stabilizing diode is electrically connected to the third node; or, The voltage stabilizing circuit includes at least two transient suppression diodes or at least two voltage stabilizing diodes, and the at least two transient suppression diodes or at least two voltage stabilizing diodes are connected in series between the current limiting circuit and the third node; or, The voltage stabilizing circuit includes a first bidirectional transient suppression diode or a first bidirectional voltage regulator diode, and the first bidirectional transient suppression diode or the first bidirectional voltage regulator diode is electrically connected between the current limiting circuit and the third node.

6. The surge protection circuit according to any one of claims 1 to 5, characterized in that: The switching circuit is a thyristor, the anode of the thyristor is electrically connected to the second node, the cathode of the thyristor is electrically connected to the fourth node, and the control electrode of the thyristor is electrically connected to the third node; or, The switching circuit is a bidirectional thyristor, the anode of the bidirectional thyristor is electrically connected to the second node, the cathode of the bidirectional thyristor is electrically connected to the fourth node, and the control electrode of the bidirectional thyristor is electrically connected to the third node.

7. The surge protection circuit according to any one of claims 1 to 5, characterized in that: The reverse clamp circuit is a first diode, the anode of the first diode is electrically connected to the fourth node, and the cathode of the first diode is electrically connected to the third node; or, The reverse clamp circuit is a second bidirectional transient suppression diode or a second bidirectional voltage regulator diode, and the second bidirectional transient suppression diode or the second bidirectional voltage regulator diode is electrically connected between the third node and the fourth node.

8. The surge protection circuit according to any one of claims 1 to 5, characterized in that: The switching circuit comprises: a first switching unit electrically connected between the first node and the fourth node and also electrically connected to the third node, the first switching unit including a fifth node, configured to enter a conducting state in response to a startup current input from the third node, and output a target current through the fifth node in the conducting state; The second switch unit is electrically connected between the voltage-sensitive circuit and the fourth node and is also electrically connected to the fifth node, and is configured to enter a conducting state in response to the target current.

9. The surge protection circuit according to claim 8, characterized in that: The first switching unit includes a second resistor, a first switching transistor, and a third resistor, one end of the second resistor is electrically connected to the first node, the other end of the second resistor is electrically connected to the collector of the first switching transistor, the base of the first switching transistor is electrically connected to the third node, the emitter of the first switching transistor is electrically connected to the fifth node, one end of the third resistor is electrically connected to the fifth node, and the other end of the third resistor is electrically connected to the fourth node; and / or, The second switching unit includes a second switching tube and a second diode, the collector of the second switching tube is electrically connected to the voltage-sensitive circuit, the base of the second switching tube is electrically connected to the fifth node, the emitter of the second switching tube is electrically connected to the fourth node, and the second diode is electrically connected between the fourth node and the fifth node.

10. An electronic device, characterized in that: The method comprises the surge protection circuit according to any one of claims 1 to 9.

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