Reference source circuit of eight-channel short wave receiver
By designing a reference source circuit for an eight-channel shortwave receiver, and employing external standard frequency detection, switching, internal crystal oscillator, and phase-locked loop circuits, the problems of complexity, high cost, and poor stability of existing reference source circuits are solved, achieving high-performance frequency signal switching and stability, making it suitable for modern wireless communication systems.
Patent Information
- Application Number
- CN202422684693.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-05
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2034-11-05
AI Technical Summary
The reference source circuits in existing wireless communications are complex, costly, and have poor stability and frequency purity, which cannot meet the needs of the modern market.
A reference source circuit for an eight-channel shortwave receiver is designed. It adopts an external standard frequency detection circuit, a switching circuit, an internal crystal oscillator circuit, an external standard frequency phase-locked loop circuit, and a switching and branching circuit to achieve the switching of dual frequency sources without mutual interference. The purity and stability of the frequency signal are guaranteed by using cheap components.
It achieves interference-free dual-frequency source switching in different situations, improves the stability and purity of frequency signals, is suitable for single-unit and cluster systems, and meets the high-performance requirements of modern communication systems.
Smart Images

Figure CN223451958U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to wireless communication technical field especially relates to a reference source circuit of eight channel short wave receiver. BACKGROUND
[0002] In modern wireless communication, reference source system is widely used in mobile communication, frequency hopping broadcast, navigation and radar service, provides a unified standard frequency for single whole machine system or fleet, provides required stable clock for signal sampling and signal reconstruction, provides the most basic reference signal for local oscillator circuit required by mixing, can be said that it is the most basic heart pulse of system, so high stability, high quality reference source is particularly important. However, the original circuit is more complex, the use occasion is single, the cost of the adopted component is higher, and the stability and frequency purity are poor, which has been unable to meet the market demand at present. UTILITARY MODEL CONTENT
[0003] In view of the deficiency in the prior art, the utility model provides a reference source circuit of eight channel short wave receiver, and the cost does not need to adopt larger, too expensive component, and the double frequency source of mutual interference under the condition of single machine and fleet in different occasions can be switched at any time in function, and the high performance, large dynamic component and integrated circuit guarantee the purity and stability of the standard frequency signal.
[0004] The utility model is realized through the following technical schemes:
[0005] A reference source circuit of eight channel short wave receiver, comprising
[0006] External standard frequency detection circuit is used for detecting whether there is a certain amplitude 10MHz external standard frequency signal;
[0007] Switching circuit is connected with external standard frequency detection circuit, and is used for deciding the opening and closing of internal and external standard frequency according to the signal of 10MHz external standard frequency;
[0008] Internal crystal oscillator circuit is connected with switching circuit, and provides 100MHz frequency source for the internal machine;
[0009] External standard frequency phase-locked loop circuit is connected with external standard frequency and switching circuit respectively, and is used for phase discrimination and voltage control output 100MHz frequency signal under the condition of external standard frequency input;
[0010] Switching and branching circuit, with internal crystal circuit, external frequency phase-locked loop circuit connected, controlled by switching circuit, used in two-way signal switching selected a signal and filter amplification, then power division two-way respectively, one into eight-way power divider output eight 100MHz frequency, provide eight channel local oscillator synthesizer unit as reference signal, another to direct digital synthesizer DDS, by DDS generated A / D and D / A required 9.6MHz sampling clock signal.
[0011] Wherein, the external frequency detection circuit includes power detector, first filter circuit, comparison circuit and current limiting protection circuit, the first filter circuit is connected with power detector, the comparison circuit is connected with first filter circuit, the first filter circuit and comparison circuit are connected between the bias resistor, the current limiting protection circuit is connected with power detector; Power detector can accurately convert 10MHz frequency signal into a direct current voltage proportional to its signal level, which is convenient for subsequent comparison; The first filter circuit can filter out the corresponding AC and DC components; The bias resistor provides the input point voltage value of the comparison circuit; The current limiting protection circuit can prevent input from being too high; The comparison circuit can adjust according to the input voltage size, so as to determine the high and low level of output.
[0012] Wherein, the switching circuit includes two triodes, four field effect tubes, decoder, linear voltage stabilizer and second filter circuit, the field effect tubes are connected with the triodes, the decoder and linear voltage stabilizer are connected with the field effect tubes respectively, and the second filter circuit is connected with the field effect tubes; The triode determines the high and low of the gate of the field tube according to the high and low of the base voltage; The field effect tube determines the on-off of 12V and 5V voltage; The decoder outputs low and high of A and B according to the high and low of the level of 1 pin, so as to affect the subsequent switching circuit; The linear voltage stabilizer determines whether to stabilize 5V at 3.3V to supply VOC of the subsequent circuit according to the state of the field effect tube.
[0013] Wherein, the internal crystal circuit includes third filter circuit, thermostat control circuit, crystal oscillator and attenuator, the third filter circuit is connected with the thermostat control circuit, the thermostat control circuit is connected with the crystal oscillator, and the crystal oscillator is connected with the attenuator; The third filter circuit filters out the AC component in 12V; The thermostat control circuit ensures constant temperature; The crystal oscillator can be excited by power supply, and is affected by temperature, cooperates with the thermostat control circuit to output stable 100MHz frequency; The attenuator can adjust the frequency amplitude of the crystal oscillator output.
[0014] The external reference frequency phase-locked loop circuit comprises a phase discriminator, a voltage-controlled oscillator, a loop low-pass filter and an amplifier, the loop low-pass filter is connected with the phase discriminator, the voltage-controlled oscillator is connected with the loop low-pass filter, and the amplifier is connected with the voltage-controlled oscillator; the phase discriminator compares the phase of the 10MHz external reference frequency and the feedback frequency after frequency division, and outputs corresponding voltage; the greater the phase difference, the farther the output voltage deviates from the reference voltage.
[0015] The switching and branching circuit comprises a single-pole double-throw switch, a fourth filter circuit and a two-way power divider, the fourth filter circuit is connected with the single-pole double-throw switch, and the two-way power divider is connected with the fourth filter circuit; the single-pole double-throw switch switches the input RF1 or RF2 according to the low and high of A and B; the attenuator can adjust or reduce the frequency amplitude of the output; the fourth filter circuit filters out the AC and DC components; the two-way power divider divides one 100MHz frequency into two paths, one path enters the eight-way power divider to output eight 100MHz frequencies, and the other path provides a 9.6MHz sampling clock signal required by the DDS for A / D and D / A.
[0016] The eight-channel short wave receiver has the advantages that the reference source circuit of the eight-channel short wave receiver upgrades the original circuit, the whole machine has the functions of internal reference frequency and external reference frequency selection, the internal reference frequency adopts an internal constant temperature crystal oscillator to ensure that the whole machine has higher performance indexes such as frequency stability, reciprocal mixing, phase noise and spurs, the external reference frequency is preferentially selected in work, the external reference frequency receives an external unique frequency source signal, the same external reference frequency signal can ensure coordination between multiple receiving devices, and the external reference frequency signal can be used as a time scale system of a machine group. BRIEF DESCRIPTION OF DRAWINGS
[0017] Figure 1 It is a principle block diagram of the reference source circuit of the eight-channel short wave receiver of the utility model;
[0018] Figure 2 It is a principle diagram of the external reference frequency detection circuit of the utility model;
[0019] Figure 3 It is a principle diagram of the switch circuit of the utility model;
[0020] Figure 4 It is a principle diagram of the internal crystal oscillator circuit of the utility model;
[0021] Figure 5 It is a principle diagram of the external reference frequency phase-locked loop circuit of the utility model;
[0022] Figure 6 The switching and shunt circuit principle diagram of the utility model. DETAILED DESCRIPTION
[0023] The preferred embodiments of the utility model are described in detail below with reference to the drawings, so that the advantages and features of the utility model can be more easily understood by the people in the field, and the protection scope of the utility model can be more clearly and explicitly defined.
[0024] As Figure 1 indicated in a kind of eight channel short wave receiver's reference source circuit, comprising
[0025] External reference frequency detection circuit, for detecting whether there is certain amplitude 10MHz external reference frequency signal;
[0026] Switching circuit, connected with external reference frequency detection circuit, for deciding the opening and closing of internal and external reference frequency according to the existence of the signal of 10MHz external reference frequency;
[0027] Internal crystal oscillator circuit, connected with switching circuit, provides 100MHz frequency source for machine interior;
[0028] External reference frequency phase-locked loop circuit, respectively connected with external reference frequency and switching circuit, for in the case of external reference frequency input phase discrimination voltage-controlled output 100MHz frequency signal;
[0029] Switching and shunt circuit, connected with internal crystal oscillator circuit, external reference frequency phase-locked loop circuit, simultaneously controlled by switching circuit, for switching out a signal in two-way signal and filtering amplification, then power division two-way is used, one way enters eight-way power divider and outputs eight-way 100MHz frequency, provides for eight channel local oscillator frequency synthesizer unit as reference signal, another way provides for direct digital synthesizer DDS, and DDS generates the 9.6MHz sampling clock signal required by A / D and D / A.
[0030] Specifically, combined with Figure 2The external standard frequency detection circuit shown includes a power detector U1 (LT5534), a first filtering circuit, a comparison circuit and a current limiting protection circuit. The comparison circuit is connected to the first filtering circuit. The comparison circuit uses a comparator U2A (LM358). The first filtering circuit includes an LC filter L2, capacitors C6-C8, a filter L1, capacitors C9-C12, and capacitors C2-C5. A bias resistor R7 and comparator reference point adjustable resistors R8 and R9 are set between the first filtering circuit and the comparison circuit. The current limiting protection circuit includes resistors R1 and resistors R3-R6, which are connected to the power detector. A coupling capacitor C1 is set between the detector U1 and the current limiting protection circuit; the power detector U1 can accurately convert the 10MHz frequency signal into a DC voltage proportional to its signal level, which is convenient for subsequent comparison; the LC filter L2 filters out the corresponding AC component; the bias resistor R7 provides the voltage value of the comparator input point; the coupling capacitor C1 can filter out the DC component; the current limiting protection resistor prevents the input from being too high voltage; the comparator reference adjustable resistors R8 and R9 can be flexibly adjusted according to the input voltage, thereby determining the output high and low levels; the remaining power supply and grounding circuits are necessary configurations to ensure the normal operation of the chip.
[0031] Specifically, combined Figure 3 The switching circuit shown includes two transistors Q1 and Q2 (MMBT3904), four field effect transistors Q3-Q6 (NDS352), a decoder U3 (LVC1G19), a linear regulator U4 (ADM7150-3.3V) and a second filter circuit (composed of a resistor R10, capacitors C13-C15, filters L3, C17-C20). The field effect transistor is connected to the transistor, and bias resistors R13 and R14 are set between the field effect transistors. The decoder U3 and the linear regulator U4 are respectively connected to the field effect transistor, and the second filter circuit is connected to the field effect transistor; the transistor determines the gate height of the field effect transistor according to the base voltage; the field effect transistor determines the on and off of the 12V and 5V voltages; the decoder U3 outputs A and B according to the high and low level of the level of pin 1 ( Figure 3 The chip U3 outputs the signal code of pins 4 and 6 (low and high), thereby affecting the subsequent switching circuit; the linear regulator U4 determines whether to stabilize 5V at 3.3V to supply the subsequent VOC according to the state of the field-effect transistor. The collector load resistors R11 and R12 prevent the collector from short-circuiting; the bias resistors R13 and R14 provide the bias voltage value.
[0032] Specifically, combined Figure 4The internal crystal oscillator circuit shown, including the third filter circuit (including filter L5, capacitor C22-C25, coupling capacitor C21), thermostat control circuit U21 (GWH-5100 MHz), crystal oscillator U5 (GWH-100 MHz) and attenuator R14-R16, the third filter circuit is connected with thermostat control circuit U21, thermostat control circuit U21 is connected with crystal oscillator U5, crystal oscillator U5 is connected with attenuator; The third filter circuit filters out the AC component in 12V; Thermostat control circuit U21 ensures constant temperature; Crystal oscillator U5 power supply can be excited, affected by temperature, cooperate with thermostat control circuit U21 to output stable 100MHz frequency; Attenuator can adjust the frequency amplitude of crystal oscillator output, coupling capacitor C21 can filter out the DC component of 100MHz interference.
[0033] Specifically, in combination with Figure 5 The external reference frequency phase-locked loop circuit shown, including phase detector U10 (HMC1031MS8), voltage controlled oscillator U11 (C-501-DFF-GFM-100.000), loop low pass filter (including filter L15-L17, capacitor C64-C70), amplifier U12 (PGA-103+) and its auxiliary circuit, attenuator R41-R43, coupling circuit (including capacitor C49, capacitor C57, resistor R32), the loop low pass filter is connected with phase detector U10, the voltage controlled oscillator U11 is connected with loop low pass filter, the amplifier U12 is connected with voltage controlled oscillator U11, the attenuator is connected with amplifier U12; Phase detector compares the phase of 10MHz external reference frequency and feedback frequency after frequency division, and outputs corresponding voltage, the greater the phase difference, the farther the output voltage deviates from the reference voltage; The loop low pass filter filters out the harmonics generated during phase detection; Voltage controlled oscillator changes the output frequency according to the tuning voltage; Coupling circuit can filter out DC component; Filter circuit filters out AC component, and filtering can suppress out-of-band interference frequency.
[0034] Specifically, in combination with Figure 6 The switching and shunt circuit shown, including single-pole double-throw switch U7 (HMC221), fourth filter circuit, two power dividers U9 (ADP-2-1W), attenuators R19-R21, R25-R29, amplifier U8 (PGA-103+) and its auxiliary circuit, the fourth filter circuit is connected with single-pole double-throw switch U7, fourth filter circuit includes 10 order LC low pass filter L6-L8, capacitor C31-C37, filter coupling capacitor C28-C29, C63, C82, C105, C42, the two power dividers U9 are connected with fourth filter circuit; Single-pole double-throw switch switches input RF1 or RF2 according to low and high of A and B Figure 6The output of the attenuator can be adjusted or reduced in frequency amplitude; the amplifier U8 amplifies the frequency amplitude; the fourth filter circuit filters out AC and DC components; the two power dividers U9 divide a 100MHz frequency into two paths, one of which is provided to the local oscillator frequency synthesizer unit as a reference signal, and the other of which is provided to the direct digital synthesizer DDS to generate a sampling clock signal.
[0035] The working principle of the circuit of the utility model is as follows:
[0036] When the external reference frequency detection circuit detects a certain amplitude of 10MHz external reference frequency signal, a group of switch tubes of the switch circuit has three logical actions at the same time, one is to open the external reference frequency channel of the switching circuit and close the internal reference frequency channel; the second is to open the 3.3V power supply channel of the external reference frequency phase-locked loop circuit (phase detector, loop filter and voltage-controlled oscillator) to make it work; the third is to disconnect the 12V power supply path of the internal crystal oscillator to stop vibration. The three actions ensure the input of the external reference frequency signal.
[0037] When no valid external reference frequency is detected or disconnected, the switch circuit defaults or switches on the internal crystal oscillator power supply circuit, simultaneously switches the signal channel and disconnects the external reference frequency phase-locked loop circuit power supply, and finally ensures the input of the internal reference frequency signal.
[0038] In summary, the internal constant temperature crystal oscillator and the external voltage-controlled crystal oscillator work under the control of the external reference frequency detection circuit (external reference frequency priority), the output signals of the two are selected by the two-way switch, and after filtering and amplification, they are divided into two paths, one of which is provided to the eight-channel local oscillator frequency synthesizer unit as a reference signal, and the other of which is provided to the direct digital synthesizer DDS to generate a 9.6MHz sampling clock signal required by A / D and D / A.
[0039] The above-described embodiments only express several embodiments of the utility model, and the description is more specific and detailed, but it cannot be understood as a limitation on the scope of the utility model patent. It should be noted that for ordinary skilled persons in the art, without departing from the concept of the utility model, a number of modifications and improvements can be made, which are within the protection scope of the utility model.
Claims
1. A reference source circuit for an eight-channel shortwave receiver, characterized in that: include External standard frequency detection circuit, used to detect whether there is a 10MHz external standard frequency signal with a certain amplitude; The switch circuit is connected to the external standard frequency detection circuit and is used to determine whether the internal and external standard frequencies are turned on or off according to the signal of the 10MHz external standard frequency; The internal crystal oscillator circuit is connected to the switch circuit and provides a 100MHz frequency source inside the machine; The external standard frequency phase-locked loop circuit is connected to the external standard frequency and the switch circuit respectively, and is used for outputting a 100MHz frequency signal through phase detection and voltage control under the condition of external standard frequency input; The switching and branching circuit is connected to the internal crystal oscillator circuit and the external standard frequency phase-locked loop circuit, and is controlled by the switching circuit. It is used to switch between the two signals to select one signal and filter and amplify it, and then split the power into two channels for use respectively. One channel enters the eight-channel power divider to output eight 100MHz frequencies, which are provided to the local oscillator frequency synthesizer units of the eight channels as reference signals, and the other channel is provided to the direct digital synthesizer DDS, which generates the 9.6MHz sampling clock signal required for A / D and D / A.
2. The reference source circuit of the eight-channel shortwave receiver according to claim 1, characterized in that: The external standard frequency detection circuit includes a power detector, a first filtering circuit, a comparison circuit and a current limiting protection circuit. The first filtering circuit is connected to the power detector, the comparison circuit is connected to the first filtering circuit, a bias resistor is provided between the first filtering circuit and the comparison circuit, and the current limiting protection circuit is connected to the power detector. The power detector can accurately convert a 10MHz frequency signal into a DC voltage proportional to its signal level to facilitate subsequent comparison. The first filtering circuit can filter out the corresponding AC and DC components. The bias resistor provides the input point voltage value of the comparison circuit. The current limiting protection circuit can prevent the input of excessively high voltage. The comparison circuit can adjust according to the input voltage to determine the output high and low levels.
3. The reference source circuit of the eight-channel shortwave receiver according to claim 2, characterized in that: The switching circuit includes two transistors, four field-effect transistors, a decoder, a linear regulator, and a second filter circuit. The field-effect transistors are connected to the transistors, the decoder and the linear regulator are connected to the field-effect transistors respectively, and the second filter circuit is connected to the field-effect transistors. The gate height of the transistor is determined by the base voltage of the transistor. The field effect transistor determines the on and off of the 12V and 5V voltages; The decoder outputs A and B as low or high logic according to the level of pin 1, thereby affecting the subsequent switching circuit; the linear regulator decides whether to stabilize 5V at 3.3V to supply the subsequent VOC according to the state of the field-effect transistor.
4. The reference source circuit of the eight-channel shortwave receiver according to claim 3, characterized in that: The internal crystal oscillator circuit includes a third filter circuit, a constant temperature control circuit, a crystal oscillator body and an attenuator. The third filter circuit is connected to the constant temperature control circuit, the constant temperature control circuit is connected to the crystal oscillator body, and the crystal oscillator body is connected to the attenuator; the third filter circuit filters out the AC component in 12V; the constant temperature control circuit ensures constant temperature; the crystal oscillator body can start oscillation when powered, and is affected by temperature, and cooperates with the constant temperature control circuit to output a stable 100MHz frequency; the attenuator can adjust the frequency amplitude of the crystal oscillator output.
5. The reference source circuit of the eight-channel shortwave receiver according to claim 4, characterized in that: The external standard frequency phase-locked loop circuit includes a phase detector, a voltage-controlled oscillator, a loop low-pass filter, and an amplifier. The loop low-pass filter is connected to the phase detector, the voltage-controlled oscillator is connected to the loop low-pass filter, and the amplifier is connected to the voltage-controlled oscillator. The phase detector compares the phases of the 10 MHz external standard frequency and the divided feedback frequency and outputs a corresponding voltage. The greater the phase difference, the further the output voltage deviates from the reference voltage. The loop low-pass filter filters out harmonics generated during phase detection. The voltage controlled oscillator changes the output frequency according to the tuning voltage.
6. The reference source circuit of the eight-channel shortwave receiver according to claim 5, characterized in that: The switching and branching circuit includes a single-pole double-throw switch, a fourth filtering circuit and a two-power divider. The fourth filtering circuit is connected to the single-pole double-throw switch, and the two-power divider is connected to the fourth filtering circuit. The single-pole double-throw switch switches the input pin RF1 or RF2 according to the low or high of the output pins A and B. The attenuator can adjust or reduce the output frequency amplitude. The fourth filtering circuit filters out the AC and DC components. The two-power divider divides the 100MHz frequency into two channels for use respectively. One channel enters the eight-channel power divider to output eight 100MHz frequencies, which are provided to the local oscillator frequency synthesizer units of the eight channels for use as reference signals, and the other channel is provided to the direct digital synthesizer DDS, which generates the 9.6MHz sampling clock signal required for A / D and D / A.