Back contact solar cell

Abstract

The utility model discloses a back contact solar cell, which relates to the technical field of solar cell manufacturing, and comprises a silicon substrate, a back contact layer and a back contact layer, a first carrier collection layer, a heavily doped layer and a second carrier collection layer which are stacked from inside to outside are arranged in a first region of the first main surface of the silicon substrate; the doping type of the first carrier collection layer is opposite to that of the heavily doped layer; the second carrier collection layer is arranged in a second region of the first main surface of the silicon substrate; a spacer region is arranged between the first region and the second region, and the doping type of the second carrier collection layer is opposite to the doping type of the first carrier collection layer. According to the embodiment, the heavily doped layer is arranged in the first region, and current conduction between the first carrier collection layer and the heavily doped layer and current conduction between the heavily doped layer and the second carrier collection layer are achieved at the same time. Meanwhile, the technological process is simplified, laser damage is reduced, and the photoelectric conversion efficiency of the solar cell is effectively improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to solar cell manufacturing technical field especially relates to a back contact solar cell. BACKGROUND

[0002] For the back contact solar cell, the silicon base will produce electron and hole carrier after absorbing sunlight, and the electron and hole are gathered by P area and N area respectively to form electric potential.

[0003] However, in order to prepare the first carrier collection layer and the second carrier collection layer in different areas, the prior art inevitably uses laser film opening process to remove part of the area after preparing the whole surface, thereby retaining the first carrier collection layer and the second carrier collection layer in part of the area. SUMMARY

[0004] Therefore, the utility model discloses a back contact solar cell, by setting up the heavy doping layer outside the first carrier collection layer of the first area, the current conduction between the first carrier collection layer and the heavy doping layer can be realized under the condition that the doping type is opposite.

[0005] To solve the above technical problems, the utility model provides the following technical scheme:

[0006] Firstly, the utility model provides a back contact solar cell, which comprises a silicon base, a first carrier collection layer, a heavy doping layer and a second carrier collection layer are arranged in the first area of the first main surface of the silicon base from inside to outside, the doping type of the first carrier collection layer is opposite to that of the heavy doping layer, a second carrier collection layer is arranged in the second area of the first main surface of the silicon base, there is a spacing area between the first area and the second area, and the doping type of the second carrier collection layer is opposite to that of the first carrier collection layer.

[0007] Optionally, the doping concentration of the heavy doping layer is not less than 1E 19atoms / cm 3 .

[0008] Optionally, the back contact solar cell further comprises: a conductive thin film layer disposed outside the second carrier collection layer.

[0009] Optionally, the first carrier collection layer comprises a tunneling oxide layer and a first doped layer doped with a first element which are disposed in a stack; or, the first carrier collection layer comprises a first intrinsic silicon-containing thin film layer and a first doped layer doped with a first element which are disposed in a stack.

[0010] Optionally, the second carrier collection layer comprises a second intrinsic silicon-containing thin film layer and a second doped layer doped with a second element which are disposed in a stack.

[0011] Optionally, the doping concentration of the heavily doped layer is greater than the doping concentration of the second doped layer; and / or, the first intrinsic silicon-containing thin film layer and / or the second intrinsic silicon-containing thin film layer is a thin film structure composed of one or more of microcrystalline silicon, nanosilicon, amorphous silicon, silicon oxide or silicon carbide; and / or, the first doped layer and / or the second doped layer and / or the heavily doped layer is a thin film structure composed of one or more of microcrystalline silicon, nanosilicon, amorphous silicon, silicon oxide or silicon carbide.

[0012] Optionally, the back contact solar cell further comprises: a passivation layer and an anti-reflection layer disposed in the silicon substrate second main surface from inside to outside; and / or, a metal electrode disposed in the first region and the second region, respectively.

[0013] Optionally, for the structure of the passivation layer disposed on the silicon substrate second main surface, the passivation layer comprises a combination of at least one or more of intrinsic silicon-containing thin film and doped silicon-containing thin film; and / or, for the structure of the anti-reflection layer disposed on the silicon substrate second main surface, the anti-reflection layer comprises one or more of aluminum oxide, silicon nitride, silicon oxynitride and silicon oxide.

[0014] Optionally, the thickness of the tunneling oxide layer is 0.5nm-3.0nm; and / or, the thickness of the first doped layer and / or the second doped layer and / or the heavily doped layer is 1nm-250nm.

[0015] Optionally, the conductive thin film layer is a multi-layer structure doped with one or more doped elements; wherein, the metal oxide comprises at least one of indium oxide, tin oxide, zinc oxide, cadmium oxide, titanium nitride; the metal nitride is titanium nitride; the doped element comprises at least one of indium, tin, calcium, aluminum, cadmium, zinc, cerium, fluorine.

[0016] In a second aspect, the utility model provides a preparation method of a back contact solar cell, comprising:

[0017] Step 1, a first carrier collection layer and a heavily doped layer are prepared in the first region of the first main surface of the silicon substrate from inside to outside;

[0018] Step 2, a second carrier collection layer is prepared on the first region and the second region of the first main surface of the silicon substrate;

[0019] Wherein, the first region and the second region are arranged alternately, and a spacing region is arranged between adjacent first region and second region; the doping type of the first carrier collection layer is opposite to the doping type of the heavily doped layer.

[0020] The technical scheme of the first aspect of the above-mentioned utility model has the following advantages or beneficial effects: by arranging the heavily doped layer outside the first carrier collection layer in the first region, the current conduction between the first carrier collection layer and the heavily doped layer can be realized in the case of opposite doping types. At the same time, laser film opening is not required for the second carrier collection layer, and a high-low junction is formed between the heavily doped layer and the second carrier collection layer with the same doping type, so that the current is led out between the heavily doped layer and the second carrier collection layer. Laser damage to the silicon substrate caused by the laser film opening process is avoided, the photoelectric conversion efficiency of the solar cell is effectively improved, the preparation process is simplified, and the process is more stable and reliable. BRIEF DESCRIPTION OF DRAWINGS

[0021] The accompanying drawings serve to better understand the utility model and do not constitute undue limitations on the utility model. Among them:

[0022] Figure 1 is a cross-sectional structure schematic diagram of a back contact solar cell according to an embodiment of the utility model;

[0023] Figure 2 is a cross-sectional structure schematic diagram of a back contact solar cell in the prior art;

[0024] Figure 3 is a cross-sectional structure schematic diagram of a back contact solar cell in the prior art without removing the second carrier collection layer in the first region and without arranging the heavily doped layer;

[0025] Figure 4 is a cross-sectional structure schematic diagram of a back contact solar cell with a spacing region arranged at different positions according to an embodiment of the utility model;

[0026] Figure 5 is a main flow schematic diagram of a preparation method of a back contact solar cell according to an embodiment of the utility model;

[0027] Figure 6The silicon substrate structure obtained after texturing and polishing is obtained according to the embodiment of the present application.

[0028] Figure 7 The structure schematic diagram of forming a mask layer outside the first carrier collecting layer on the first main surface is obtained according to the embodiment of the present application;

[0029] Figure 8 The silicon substrate cross-section structure schematic diagram obtained after the mask layer of the second region and the interval region is removed by the laser process is obtained according to the embodiment of the present application;

[0030] Figure 9 The silicon substrate cross-section structure schematic diagram obtained after the first carrier collecting layer of the second region and the interval region is removed by the alkaline solution, and the mask layer of the first region is removed by the acid solution is obtained according to the embodiment of the present application;

[0031] Figure 10 The silicon substrate cross-section structure schematic diagram after step S501 is obtained according to the embodiment of the present application;

[0032] Figure 11 The cross-section structure schematic diagram obtained after the second carrier collecting layer is prepared on the first main surface of the silicon substrate is obtained according to the embodiment of the present application;

[0033] Figure 12 The silicon substrate cross-section structure schematic diagram obtained after the conductive thin film layer is prepared on the outside of the second carrier collecting layer is obtained according to the embodiment of the present application;

[0034] Figure 13 The silicon substrate structure schematic diagram formed after the second carrier collecting layer and the conductive thin film layer of the interval region are slotted by the laser process is obtained according to the embodiment of the present application.

[0035] The signs are as follows:

[0036] 1-silicon substrate; 11-first region; 12-second region; 13-interval region; 2-first carrier collecting layer; 3-heavily doped layer; 4-second carrier collecting layer; 5-conductive thin film layer; 6-passivation layer; 7-anti-reflection layer; 8-metal electrode; 100-mask layer. DETAILED DESCRIPTION

[0037] Solar cell is a kind of photovoltaic semiconductor wafer using sunlight to generate electricity, also known as "solar chip" or "photovoltaic cell", it can output voltage and generate current in the case of loop as long as it is illuminated by light with certain illumination conditions. In physics, it is called solar photovoltaic (Photovoltaic, abbreviated as PV), simply called photovoltaic. In order to facilitate and clearly describe the preparation method of the solar cell and the solar cell of the utility model, the exemplary embodiments of the utility model are described below in conjunction with the drawings, which include various details of the embodiments of the utility model to help understanding, they should be considered only as exemplary. Therefore, those skilled in the art should realize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the utility model. Similarly, in order to be clear and concise, the description of known functions and structures is omitted in the following description.

[0038] In recent years, with the development of single crystal solar cells, especially the successful industrialization of passivated emitter and back contact (PERC) technology, the efficiency of mass production cells on P-type silicon wafers has reached a bottleneck. More attention is paid to N-type cells with higher bulk carrier lifetime and smaller attenuation. Three kinds of cell structures, such as N-type PERT, heterojunction (HJT) and tunnel oxide passivation contact (TOPCon), have gradually attracted attention in the industry. Among them, in order to further improve the efficiency of traditional heterojunction cells, the structure of heterojunction cells has been further improved, and a heterojunction cell with full back electrode structure has appeared, which can remove the shading of grid lines to the sun and increase the absorption efficiency of incident light.

[0039] However, in order to prepare the first carrier collection layer and the second carrier collection layer in different areas respectively, the prior art inevitably uses a laser film opening process, removes part of the area after preparation on the whole surface, so as to retain the first carrier collection layer and the second carrier collection layer in part of the area. High-energy laser beams will cause laser damage to the silicon substrate, junction and field, greatly affecting the photoelectric conversion efficiency of the solar cell.

[0040] In an embodiment of the utility model, as shown in Figure 1 The back contact solar cell includes: a silicon substrate 1; a first area 11 of a first main surface of the silicon substrate 1 is provided with a first carrier collection layer 2, a heavily doped layer 3 and a second carrier collection layer 4 which are stacked from inside to outside; wherein the doping type of the first carrier collection layer 2 is opposite to the doping type of the heavily doped layer 3; a second area 12 of the first main surface of the silicon substrate 1 is provided with the second carrier collection layer 4; wherein there is a spacing area 13 between the first area 11 and the second area 12, and the doping type of the second carrier collection layer 4 is opposite to the doping type of the first carrier collection layer 2.

[0041] Exemplarily, in Figure 1 the first main surface is the back side of the silicon substrate, and the purpose of the interval region 13 is to block the electrical connection between the first region 11 and the second region 12. Since the doping type of the first carrier collection layer 2 is opposite to that of the heavily doped layer 3, and the doping type of the first carrier collection layer 2 is also opposite to that of the second carrier collection layer 4, the heavily doped layer 3 is actually the same as the doping type of the second carrier collection layer 4. Among them, the second carrier collection layer 4 is usually lightly doped, and the doping concentration is different from that of the heavily doped layer 3, so the embodiment of the utility model forms a high-low junction between the heavily doped layer 3 and the second carrier collection layer 4 to realize the transmission of current. As for the first carrier collection layer 2 and the heavily doped layer 3, although the doping types of the two are opposite, the doping concentration of the heavily doped layer 3 is very high, which will quickly recombine with the electron holes in the first carrier collection layer 2 to form a recombination junction, thereby realizing the conduction of current.

[0042] Next, taking Figure 2 and Figure 3 as examples, it is explained that if the second carrier collection layer 4 of the first region 11 is not removed and the heavily doped layer 3 is not set in the structure of the silicon substrate in the prior art, the transport of carriers cannot be realized. Among them, Figure 2 is a cross-sectional structure schematic diagram of a back contact solar cell in the prior art, Figure 3 is a cross-sectional structure schematic diagram when the second carrier collection layer 4 of the first region 11 is not removed and the heavily doped layer 3 is not set in the back contact solar cell in the prior art. According to Figure 2 , in the prior art, taking an N-type silicon substrate as an example, since the doping types of the first carrier collection layer 2 and the second carrier collection layer 4 are opposite, P regions (second regions) and N regions (first regions) are respectively formed in the left and right regions of the silicon substrate 1, wherein the first region 11 is n-type doped, the second region 12 is p-type doped, and a pn junction will be formed in the second region 12. After the silicon substrate 1 receives the irradiation of sunlight, the energy of the photons is absorbed, and the electrons are excited from the atoms to form electron-hole pairs, which are respectively moved to the N region and the P region under the action of the pn junction electric field, forming a solar cell with the N region as the negative electrode and the P region as the positive electrode. If the second carrier collection layer 4 of the first region 11 is not removed, as shown in Figure 3 , a pn junction will be formed between the first carrier collection layer 2 and the second carrier collection layer 4 in the first region 11 on the basis of the pn junction formed in the second region, at this time, part of the carriers move towards the second region 12, and part of the carriers move towards the first region 11, the collection efficiency is low, which leads to the reduction of the battery efficiency.

[0043] And the utility model discloses an embodiment, through setting up heavily doped layer 3, the pn junction of first area 11 has become the recombination junction, will not with the pn junction of second area 12 contend for carrier, and further realizes the normal collection of carrier.

[0044] In an alternative embodiment, the doping concentration of heavily doped layer 3 is not less than 1E 19 atoms / cm 3 . It should be noted that, as the doping concentration of heavily doped layer 3 increases, the recombination rate between heavily doped layer 3 and first carrier collection layer 2 also increases, so it is only necessary to define the critical concentration at which no pn junction is formed between heavily doped layer 3 and first carrier collection layer 2. In theory, the higher the doping concentration of heavily doped layer 3, the better.

[0045] In an alternative embodiment, the back contact solar cell provided by the utility model further comprises a conductive film layer 5 disposed on the outer side of second carrier collection layer 4, wherein conductive film layer 5 is used to guide the carriers of first area 11 and second area 12 to the corresponding metal electrodes 8 respectively, thereby achieving the export of electric current.

[0046] For first carrier collection layer 2, there can be two different layering results. In one alternative embodiment, first carrier collection layer 2 comprises a tunneling oxide layer and a first doped layer doped with a first element which are arranged in layers; and in another alternative embodiment, first carrier collection layer 2 comprises a first intrinsic silicon-containing film layer and a first doped layer doped with a first element which are arranged in layers. The preparation processes of the tunneling oxide layer and the first intrinsic silicon-containing film layer are different, and at different preparation temperatures, the corresponding structures can be prepared according to actual conditions. For second carrier collection layer 4, in one alternative embodiment, it comprises a second intrinsic silicon-containing film layer and a second doped layer doped with a second element which are arranged in layers. The first element and the second element can be boron element and phosphorus element respectively. For example, when silicon substrate 1 is an n-type silicon substrate, the first element is phosphorus element and the second element is boron element.

[0047] In addition, in the embodiment of the utility model, the doping concentration of heavily doped layer 3 needs to be greater than the doping concentration of the second doped layer, so as to form a high-low junction structure between heavily doped layer 3, the second intrinsic silicon-containing film layer and the second doped layer.

[0048] In an optional embodiment, the first intrinsic silicon-containing thin film layer and / or the second intrinsic silicon-containing thin film layer are thin film structures composed of one or more of microcrystalline silicon, nanosilicon, amorphous silicon, silicon oxide, or silicon carbide. The first doped layer and / or the second doped layer and / or the heavily doped layer 3 may also be thin film structures composed of one or more of microcrystalline silicon, nanosilicon, amorphous silicon, silicon oxide, or silicon carbide. The thickness of the tunneling oxide layer is 0.5 nm to 3.0 nm, for example, 0.5 nm, 1.0 nm, 1.5 nm, 2.0 nm, 3.0 nm, etc.; the thickness of the first doped layer and / or the second doped layer and / or the heavily doped layer 3 is 1 nm to 250 nm, for example, 1 nm, 50 nm, 100 nm, 150 nm, 200 nm, 250 nm, etc.

[0049] The back contact solar cell provided by the utility model is as follows Figure 1 As shown, it also includes: a passivation layer 6 and an anti-reflection layer 7 arranged in sequence from the inside to the outside on the second main surface of the silicon substrate 1. Figure 1 The front side of the silicon substrate 1 is provided. Specifically, the passivation layer 6 can be a combination of at least one or more of an intrinsic silicon-containing thin film and a doped silicon-containing thin film. Regarding thickness, the intrinsic silicon-containing thin film can have a thickness of 1 nm to 15 nm, such as 1 nm, 5 nm, 10 nm, or 15 nm, while the doped silicon-containing thin film can have a thickness of 0 nm to 15 nm, such as 0 nm, 5 nm, 10 nm, or 15 nm. The anti-reflection layer 7 can be made of one or more of aluminum oxide, silicon nitride, silicon oxynitride, and silicon oxide. Regarding thickness, the anti-reflection layer 7 can have a thickness of 40 nm to 200 nm, such as 40 nm, 80 nm, 100 nm, 150 nm, 180 nm, or 200 nm.

[0050] As for the conductive film layer 5, in an optional embodiment, the conductive film layer 5 is a multilayer structure of metal oxides and / or nitrides doped with one or more doping elements; wherein the metal oxide includes at least one of the following: indium oxide, tin oxide, zinc oxide, cadmium oxide, titanium nitride; the metal nitride is titanium nitride; and the doping elements include at least one of the following: indium, tin, calcium, aluminum, cadmium, zinc, cerium, and fluorine.

[0051] In a further optional embodiment, metal electrodes 8 are respectively provided in the first region 11 and the second region 12, wherein the metal electrodes 8 can be one or more stacks of silver electrodes, silver alloy electrodes, copper electrodes, copper alloy electrodes, and nickel / copper / silver multilayer electrodes.

[0052] It can be understood that, in the embodiment of the utility model, the purpose of interval area 13 is to block the carrier conduction between first area 11 and second area 12, therefore the setting position of interval area 13 can be adjusted according to actual situation, for example Figure 4 As shown in the sectional structure of the silicon substrate. Figure 1 And Figure 4 It can be known that, interval area 13 can be arranged in the interval area of silicon substrate 1, or can be arranged towards second area 12. It should be noted that, the sheet resistance of the second intrinsic silicon-containing film layer in second carrier collection layer 4 is very high, higher than the sheet resistance of silicon substrate 1, therefore will not conduct the current between first area 11 and second area 12.

[0053] It can be known that, in the embodiment of the utility model, by arranging the heavily doped layer outside the first carrier collection layer of the first area, the current conduction between the first carrier collection layer and the heavily doped layer can be realized in the case that the doping types are opposite. Meanwhile, the laser film opening is not needed for the second carrier collection layer, the high-low junction is formed between the heavily doped layer and the second carrier collection layer with the same doping type, and the current is led out between the heavily doped layer and the second carrier collection layer. The laser damage to the silicon substrate caused by the laser film opening process is avoided, and the photoelectric conversion efficiency of the solar cell is effectively improved.

[0054] Figure 5 A preparation method of a back contact solar cell is shown, as shown in the embodiment of the utility model, the preparation method comprises: Figure 5 As shown in the embodiment of the utility model, the preparation method comprises:

[0055] Step S501, the first carrier collection layer 2 and the heavily doped layer 3 are prepared from inside to outside in the first area 11 of the first main surface of the silicon substrate 1;

[0056] Step S502, the second carrier collection layer 4 is prepared in the first area 11 and the second area 12 of the first main surface of the silicon substrate 1;

[0057] Wherein, the first area 11 and the second area 12 are alternately arranged, and the interval area 13 is arranged between the adjacent first area 11 and the second area 12; the doping type of the first carrier collection layer 2 is opposite to the doping type of the heavily doped layer 3.

[0058] Next, the specific preparation process of step S501 and step S502 is described in detail:

[0059] In an optional embodiment, before step S501, the silicon substrate 1 needs to be textured and polished to remove the damage to the silicon substrate 1 itself caused during the cutting process, so as to ensure the overall performance of the solar cell prepared subsequently. Specifically, before step S501, it includes: performing alkali texture on the first main surface and the second main surface of the silicon substrate 1, and polishing the first main surface using a mask layer provided on the second main surface of the silicon substrate 1. The texture can be performed using a commonly used alkali texture method. For example, the silicon substrate structure obtained after texture and polishing is as follows: Figure 6 As shown, in an optional embodiment, an oxide layer can be prepared on the second main surface after texturing as a mask layer to protect the velvet structure of the second main surface during the polishing process, and after the polishing is completed, the oxide layer can be removed using an acidic solution such as a hydrofluoric acid solution.

[0060] In an optional embodiment, based on the different structures of the first carrier collection layer 2, the process of preparing the first carrier collection layer 2 in step S501 may specifically include: preparing a tunneling oxide layer and a first doping layer doped with a first element on the first main surface of the silicon substrate 1 from the inside to the outside, to obtain the first carrier collection layer 2; or, preparing a first intrinsic silicon-containing thin film layer and a first doping layer doped with a first element on the first main surface of the silicon substrate 1 from the inside to the outside, to obtain the first carrier collection layer 2. Exemplarily, the process of preparing the first carrier collection layer 2 is as follows: Figures 7 to 9 As shown, Figure 7 A schematic structural diagram of forming a mask layer 100 outside the first carrier collection layer 2 while preparing the first carrier collection layer 2 on the entire first main surface. Figure 8 Schematic diagram of the cross-sectional structure of the silicon substrate obtained after the mask layer 100 in the second region 12 and the spacing region 13 is removed regionally by a laser process. Figure 9 Then it is in Figure 8 FIG. 1 is a schematic diagram of a cross-sectional structure of a silicon substrate obtained after removing the first carrier collection layer 2 in the second region 12 and the spacer region 13 using an alkaline solution, and removing the mask layer 100 in the first region 11 using an acid solution. The mask layer 100 in the first region 11 is first used to protect the structure of the first region 11 from being corroded by the alkaline solution, thereby removing only the first carrier collection layer 2 in the second region 12 and the spacer region 13, and then removing the mask layer 100 in the first region 11 using an acid solution.

[0061] After obtaining the silicon substrate structure in which the first carrier collection layer 2 is provided only in the first region 11, the heavily doped layer 3 can be prepared on the outside of the first carrier collection layer 2. That is, the structure obtained after step S501 is as follows: Figure 10 shown.

[0062] Similarly, the process of preparing the second carrier collection layer 4 in step S502 includes: preparing a second intrinsic silicon-containing thin film layer and a second doped layer doped with a second element in the first area 11 and the second area 12 of the first main surface of the silicon substrate 1 from the inside to the outside to obtain the second carrier collection layer 4.

[0063] In a further optional embodiment, after step S502 , the method further includes: step S503 , preparing a conductive thin film layer 5 outside the second carrier collection layer 4 in the first region 11 and the second region 12 .

[0064] Below through Figures 11 to 13 The process shown in FIG. 5 is used to specifically describe the process of preparing the second carrier collection layer 4 and the conductive film layer 5 in step S502 and step S503. Figure 11 Schematic diagram of the cross-sectional structure obtained after the second carrier collection layer 4 is formed on the entire first main surface of the silicon substrate 1. Figure 12 Schematic diagram of the cross-sectional structure of the silicon substrate obtained after preparing the entire conductive film layer 5 outside the second carrier collection layer 4. Figure 13 This is a schematic diagram of the silicon substrate structure formed after the second carrier collection layer 4 and the conductive film layer 5 in the spacing region 13 are grooved using a laser process.

[0065] In a further optional embodiment, before preparing the second carrier collection layer 4, a passivation layer 6 and an anti-reflection layer 7 may be prepared on the second main surface of the silicon substrate 1 from the inside to the outside. After step S503, metal electrodes 8 are prepared in the first region 11 and the second region 12, respectively. Through the above process, the following can be obtained: Figure 1 The back contact solar cell structure of the embodiment of the present invention is shown.

[0066] In summary, the back-contact solar cell provided by the embodiment of the present invention can achieve current conduction between the first carrier collection layer and the heavily doped layer when the doping types are opposite by providing a heavily doped layer outside the first carrier collection layer in the first region. At the same time, there is no need to perform laser film opening on the second carrier collection layer. A high-low junction is formed between the heavily doped layer and the second carrier collection layer of the same doping type, and the current is conducted between the heavily doped layer and the second carrier collection layer. This avoids laser damage to the silicon substrate caused by the laser film opening process, effectively improving the photoelectric conversion efficiency of the solar cell.

[0067] Example 1

[0068] Step a, polishing the first main surface and the second main surface of the silicon substrate to obtain a smooth silicon substrate surface;

[0069] Step b, a tunneling oxide layer and an intrinsic polysilicon layer are prepared on the first main surface of the silicon substrate by LPCVD, and an n-type doped layer is formed by doping the intrinsic polysilicon with phosphorus;

[0070] Step c, a heavily doped layer is prepared outside the doped polysilicon layer, and a mask layer is prepared outside;

[0071] Step d, the mask layer on the second region and the interval region is removed by laser;

[0072] Step e, the second region and the interval region are etched by alkali solution, and after etching, texturing is performed, and the mask layer on the first region is removed by acid solution;

[0073] Step f, an intrinsic silicon-containing film, a p-type doped layer are formed on the first main surface of the silicon substrate by plate PECVD, and a passivation layer is prepared on the second main surface;

[0074] Step g, an anti-reflection layer is prepared on the second main surface of the silicon substrate;

[0075] Step h, a conductive thin film layer is formed on the first surface by PVD;

[0076] Step i, the intrinsic silicon-containing film, the p-type doped layer and the conductive thin film layer are slotted in the interval region;

[0077] Step j, metal electrodes are prepared in the first region and the second region respectively.

[0078] Comparative Example One

[0079] Step a, the silicon substrate is subjected to texturing treatment to form a textured structure on the first main surface and the second main surface of the silicon substrate;

[0080] Step b, an oxide layer is deposited on the second main surface of the silicon substrate by tube PECVD;

[0081] Step c, the first main surface of the silicon substrate is polished to obtain a smooth silicon substrate surface;

[0082] Step d, a tunneling oxide layer and an intrinsic polysilicon layer are prepared on the first main surface of the silicon substrate by LPCVD, and an n-type doped layer is formed by doping the intrinsic polysilicon with phosphorus, and a mask layer is prepared outside the n-type doped layer at the same time;

[0083] Step e, the mask layer on the second region and the interval region is removed by laser;

[0084] Step f, the second region and the interval region are etched by alkali solution, and the mask layer on the first region is removed by acid solution;

[0085] Step g, sequentially preparing a passivation layer and an anti-reflection layer on the second main surface of the silicon substrate from inside to outside;

[0086] Step h, sequentially forming an intrinsic silicon-containing thin film and a p-type doped layer on the first main surface of the silicon substrate by using a plate PECVD method;

[0087] Step i, removing the intrinsic silicon-containing thin film and the p-type doped layer in the first region by using a laser process;

[0088] Step j, preparing a conductive thin film layer on the first main surface;

[0089] Step k, slotting the conductive thin film layer in the interval region;

[0090] Step l, preparing a metal electrode in the first region and the second region, respectively.

[0091] Comparative Example Two

[0092] Step a, polishing the first main surface and the second main surface of the silicon substrate to obtain a smooth surface of the silicon substrate;

[0093] Step b, sequentially preparing a tunneling oxide layer and an intrinsic polysilicon layer on the first main surface of the silicon substrate by using an LPCVD method, and forming an n-type doped layer by phosphorus doping the intrinsic polysilicon;

[0094] Step c, removing the mask layer on the second region and the interval region by laser; Step d, etching the second region and the interval region by using an alkali solution, and performing texturing after etching, and removing the mask layer on the first region by using an acid solution;

[0095] Step e, sequentially forming an intrinsic silicon-containing thin film and a p-type doped layer on the first main surface of the silicon substrate by using a plate PECVD method, and preparing a passivation layer on the second main surface;

[0096] Step f, preparing an anti-reflection layer on the second main surface of the silicon substrate;

[0097] Step g, sequentially forming an intrinsic silicon-containing thin film and a p-type doped layer on the first main surface of the silicon substrate by using a plate PVD method, and preparing a passivation layer on the second main surface;

[0098] Step h, preparing an anti-reflection layer on the second main surface of the silicon substrate;

[0099] Step i, forming a conductive thin film layer on the first surface by using a PVD method;

[0100] Step j, slotting the conductive thin film layer in the interval region;

[0101] Step k, preparing a metal electrode in the first region and the second region, respectively.

[0102] The performance of the back contact solar cells prepared in the above examples and comparative examples is tested, and the results are as follows:

[0103]

[0104] From the performance test results, it can be seen that the solar cell of the embodiment of the utility model is almost flat with the performance of the prior art, but does not need additional laser removal process, not only simplifies the process flow, but also reduces the loss of laser to the underlying passivation film layer, improves the battery performance. Moreover, without setting the heavily doped layer, that is, only on the basis of comparative example 1, the second carrier collection layer of the first area is not removed, which cannot effectively form the conduction of the carrier, which shows the key role of the heavily doped layer between the first carrier collection layer and the second carrier collection layer.

[0105] The embodiment of the utility model also provides the following technical scheme:

[0106] Technical scheme 1. A back contact solar cell, characterized in that it comprises: a silicon substrate 1; a first area 11 of a first main surface of the silicon substrate 1 is provided with a first carrier collection layer 2, a heavily doped layer 3 and a second carrier collection layer 4 which are stacked from inside to outside; wherein the doping type of the first carrier collection layer 2 is opposite to that of the heavily doped layer 3; a second area 12 of the first main surface of the silicon substrate 1 is provided with a second carrier collection layer 4; wherein the first area 11 and the second area 12 have a spacing area 13 therebetween, and the doping type of the second carrier collection layer 4 is opposite to that of the first carrier collection layer 2.

[0107] Technical scheme 2. The back contact solar cell according to technical scheme 1, characterized in that the doping concentration of the heavily doped layer 3 is not less than 1E19 atoms / cm 3 .

[0108] Technical scheme 3. The back contact solar cell according to technical scheme 1, characterized in that it further comprises: a conductive film layer 5 provided outside the second carrier collection layer 4.

[0109] Technical scheme 4. The back contact solar cell according to technical scheme 1, characterized in that the first carrier collection layer 2 comprises a tunneling oxide layer and a first doped layer doped with a first element which are stacked; or the first carrier collection layer 2 comprises a first intrinsic silicon-containing thin film layer and a first doped layer doped with a first element which are stacked.

[0110] Technical solution 5. The back contact solar cell according to technical solution 1, characterized in that the second carrier collection layer 4 comprises a second intrinsic silicon-containing thin film layer and a second doped layer doped with a second element arranged in a stack.

[0111] Technical solution 6. The back contact solar cell according to technical solution 5, characterized in that the doping concentration of the heavily doped layer 3 is greater than the doping concentration of the second doped layer; and / or, the first intrinsic silicon-containing thin film layer and / or the second intrinsic silicon-containing thin film layer is a thin film structure composed of one or more of microcrystalline silicon, nanosilicon, amorphous silicon, silicon oxide or silicon carbide; and / or, the first doped layer and / or the second doped layer and / or the heavily doped layer 3 is a thin film structure composed of one or more of microcrystalline silicon, nanosilicon, amorphous silicon, silicon oxide or silicon carbide.

[0112] Technical solution 7. The back contact solar cell according to technical solution 1, characterized in that further comprising: a passivation layer 6 and an anti-reflection layer 7 arranged in the silicon substrate 1 second main surface from inside to outside; and / or, a metal electrode 8 arranged in the first region 11 and the second region 12 respectively.

[0113] Technical solution 8. The back contact solar cell according to technical solution 7, characterized in that, for the structure of the passivation layer 6 arranged on the second main surface of the silicon substrate 1, the passivation layer 6 comprises a combination of at least one or more of intrinsic silicon-containing thin film and doped silicon-containing thin film; and / or, for the structure of the anti-reflection layer 7 arranged on the second main surface of the silicon substrate 1, the anti-reflection layer 7 comprises one or more of aluminum oxide, silicon nitride, silicon oxynitride and silicon oxide.

[0114] Technical solution 9. The back contact solar cell according to technical solution 4, characterized in that the thickness of the tunneling oxide layer is 0.5 nm to 3.0 nm; and / or, the thickness of the first doped layer and / or the second doped layer and / or the heavily doped layer 3 is 1 nm to 250 nm.

[0115] Technical solution 10. The back contact solar cell according to technical solution 3, characterized in that the conductive thin film layer 5 is a multi-layer structure doped with one or more doped elements; wherein the metal oxide comprises at least one of indium oxide, tin oxide, zinc oxide, cadmium oxide, titanium nitride; the metal nitride is titanium nitride; the doped element comprises at least one of indium, tin, calcium, aluminum, cadmium, zinc, cerium, fluorine.

[0116] Technical solution 11. A method for preparing a back contact solar cell, characterized by comprising:

[0117] Step 1, a first carrier collection layer 2 and a heavily doped layer 3 are prepared in the first region 11 of the first main surface of the silicon substrate 1 from inside to outside;

[0118] Step 2, a second carrier collection layer 4 is prepared in the first region 11 and the second region 12 of the first main surface of the silicon substrate 1;

[0119] Wherein, the first region 11 and the second region 12 are arranged alternately, and a spacing region 13 is arranged between adjacent first region 11 and second region 12; the doping type of the first carrier collection layer 2 is opposite to the doping type of the heavily doped layer 3.

[0120] Technical solution 12. The preparation method according to technical solution 11, characterized in that, after the step 2, further comprising:

[0121] Step 3, an electrically conductive film layer 5 is prepared outside the second carrier collection layer 4 of the first region 11 and the second region 12.

[0122] Technical solution 13. The preparation method according to technical solution 11, characterized in that, the step 1 comprises:

[0123] A tunneling oxide layer and a first doped layer doped with a first element are prepared in the first main surface of the silicon substrate 1 from inside to outside to obtain the first carrier collection layer 2;

[0124] Or,

[0125] A first intrinsic silicon-containing thin film layer and a first doped layer doped with a first element are prepared in the first main surface of the silicon substrate 1 from inside to outside to obtain the first carrier collection layer 2.

[0126] Technical solution 14. The preparation method according to technical solution 11, characterized in that, the step 2 comprises:

[0127] A second intrinsic silicon-containing thin film layer and a second doped layer doped with a second element are prepared in the first region 11 and the second region 12 of the first main surface of the silicon substrate 1 from inside to outside to obtain the second carrier collection layer 4.

[0128] Technical solution 15. The preparation method according to technical solution 11, characterized in that, further comprising:

[0129] A passivation layer 6 and an anti-reflection layer 7 are prepared in the second main surface of the silicon substrate 1 from inside to outside;

[0130] And / or, a metal electrode 8 is prepared in the first region 11 and the second region 12, respectively.

[0131] The above steps provide an introduction for helping to understand the structure, method and core idea of the utility model. For ordinary skilled persons in the technical field, the utility model can be improved and modified in several ways without departing from the principle of the utility model, and these improvements and modifications also belong to the protection scope of the utility model claim.

Claims

1. A back contact solar cell, characterized by, Comprising: a silicon substrate (1); a first region (11) of a first main surface of the silicon substrate (1) is provided with a first carrier collection layer (2), a heavily doped layer (3) and a second carrier collection layer (4) from inside to outside; wherein the doping type of the first carrier collection layer (2) is opposite to the doping type of the heavily doped layer (3); a second region (12) of the first main surface of the silicon substrate (1) is provided with the second carrier collection layer (4); wherein the first region (11) and the second region (12) have a spacing region (13) therebetween, and the doping type of the second carrier collection layer (4) is opposite to the doping type of the first carrier collection layer (2).

2. The back contact solar cell of claim 1, wherein, Further comprising: a conductive thin film layer (5) provided outside the second carrier collection layer (4).

3. The back contact solar cell according to claim 1, wherein the first carrier collection layer (2) comprises a tunneling oxide layer and a first doped layer doped with a first element which are provided in layers.

4. The back contact solar cell according to claim 1, wherein the first carrier collection layer (2) comprises a first intrinsic silicon-containing thin film layer and a first doped layer doped with a first element which are provided in layers.

5. The back contact solar cell according to claim 4, wherein the second carrier collection layer (4) comprises a second intrinsic silicon-containing thin film layer and a second doped layer doped with a second element which are provided in layers.

6. The back contact solar cell according to claim 4, wherein the first intrinsic silicon-containing thin film layer is one of microcrystalline silicon, nanocrystalline silicon, amorphous silicon, silicon oxide or silicon carbide.

7. The back contact solar cell according to claim 3 or 4, wherein the first doped layer is one of microcrystalline silicon, nanocrystalline silicon, amorphous silicon, silicon oxide or silicon carbide.

8. The back contact solar cell according to claim 1, wherein the heavily doped layer (3) is one of microcrystalline silicon, nanocrystalline silicon, amorphous silicon, silicon oxide or silicon carbide.

9. The back contact solar cell according to claim 5, wherein the doping concentration of the heavily doped layer (3) is greater than the doping concentration of the second doped layer; and / or, the second intrinsic silicon-containing thin film layer is one of microcrystalline silicon, nanocrystalline silicon, amorphous silicon, silicon oxide or silicon carbide; and / or, the second doped layer is one of microcrystalline silicon, nanocrystalline silicon, amorphous silicon, silicon oxide or silicon carbide.

10. The back contact solar cell of claim 1, wherein, Further comprising: a passivation layer (6) and an anti-reflection layer (7) provided in sequence from inside to outside on a second main surface of the silicon substrate (1); and / or, a metal electrode (8) provided on the first region (11) and the second region (12) respectively.

11. The back contact solar cell according to claim 10, wherein for the structure that the passivation layer (6) is provided on the second main surface of the silicon substrate (1), the passivation layer (6) comprises a combination of at least one or more of intrinsic silicon-containing thin film and doped silicon-containing thin film; and / or, A structure of arranging an anti-reflection layer (7) on the second main surface of the silicon substrate (1), the anti-reflection layer (7) comprising one of aluminum oxide, silicon nitride, silicon oxynitride and silicon oxide.

12. The back contact solar cell according to claim 3, wherein the thickness of the tunneling oxide layer is 0.5 nm to 3.0 nm.

13. The back contact solar cell according to claim 3 or 4, wherein the thickness of the first doped layer is 1 nm to 250 nm.

14. The back contact solar cell according to claim 5, wherein the thickness of the second doped layer is 1 nm to 250 nm.

15. The back contact solar cell according to claim 1, wherein the thickness of the heavily doped layer (3) is 1 nm to 250 nm. ​ ​ ​ ​

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