Multi-channel testing device and testing system

Abstract

The utility model discloses a multichannel testing device and a testing system. The multi-channel testing device comprises a control module, a reference clock providing module, a multi-channel frequency measuring module and a multi-channel two-way communication module. The reference clock providing module is connected with the control module and is used for providing a reference signal; the multi-channel frequency measurement module and the multi-channel bidirectional communication module are connected with the control module; the frequency measurement module is used for measuring the clock frequency output by a real-time clock chip in the device to be tested; the bidirectional communication module is connected with a real-time clock chip in the device to be tested; and the control module is used for acquiring the clock signal output by the real-time clock chip through the bidirectional communication module, and performing frequency trimming and time synchronization on the real-time clock chip through the bidirectional communication module according to the clock signal and the reference signal. According to the technical scheme of the embodiment of the utility model, the measurement efficiency of the real-time clock can be improved, and the functions of trimming and synchronization can be supported, so that the multi-channel testing device has comprehensive functions.

Description

TECHNICAL FIELD

[0001] The utility model relates to clock test technical field especially relates to a kind of multi-channel testing device and test system. BACKGROUND

[0002] In modern science and technology field, real time clock (RTC) as the core component of accurate time record, plays an indispensable role in communication, industrial control, navigation, measurement and other key applications.

[0003] However, when measuring RTC output frequency, often need to measure with the aid of frequency meter and other instruments, measurement channel is limited, and measurement efficiency is low.Secondly, after production, RTC may also face clock frequency overall drift problem and clock drift problem, but current test equipment is mainly equipped with measurement function, and the function is relatively single, cannot solve the above drift problem.At present, for the problem after production, usually need to develop repair algorithm or build high-precision time synchronization environment for time synchronization to solve the problem to ensure the high performance of RTC, need to invest higher manpower and time cost. UTILITY MODEL CONTENT

[0004] The utility model provides a kind of multi-channel testing device and test system to improve the measurement efficiency of real time clock, and carry out information interaction with real time clock chip in the device to be tested by two-way communication module, can support the function of repair and synchronization, so that the function of multi-channel testing device is comprehensive.

[0005] According to an aspect of the utility model, a kind of multi-channel testing device is provided, comprising: control module, reference clock providing module, multi-channel frequency measurement module and multi-channel two-way communication module;

[0006] The reference clock providing module is connected with the control module, and the reference clock providing module is used to provide reference signal;

[0007] Multi-channel frequency measurement module is connected with the control module;The frequency measurement module is connected with real time clock chip in the device to be tested, and is used to measure the clock frequency of real time clock chip in the device to be tested;

[0008] Multi-channel two-way communication module is connected with the control module;The two-way communication module is connected with the real time clock chip in the device to be tested;The control module is used to obtain the clock signal output by the real time clock chip by the two-way communication module, and according to the clock signal and the reference signal, the real time clock chip is adjusted in frequency and time synchronization by the two-way communication module.

[0009] Optionally, the multi-channel testing device further comprises: an FPGA; the FPGA is connected with the control module.

[0010] The frequency measurement module comprises: an input interface and a frequency measurement circuit; the frequency measurement circuit comprises a frequency signal amplification circuit and a frequency detection circuit; the input interface is connected with the real-time clock chip and the frequency signal amplification circuit respectively; the frequency detection circuit is connected with the frequency signal amplification circuit and the control module respectively; the frequency detection circuit is integrated in the FPGA.

[0011] The bidirectional communication module comprises: a communication interface and a communication circuit; the communication circuit comprises a communication type switching circuit and a communication transceiver circuit; the communication interface is connected with the real-time clock chip and the communication type switching circuit respectively; the communication transceiver circuit is connected with the communication type switching circuit and the control module; the communication transceiver circuit is integrated in the FPGA.

[0012] Optionally, the bidirectional communication module comprises at least one of an I2C communication module, an SPI communication module, a CAN communication module, an RS-485 communication module and an RS-232 communication module.

[0013] Optionally, a controller in the device to be tested is connected with the real-time clock chip through a communication bus.

[0014] The multi-channel testing device further comprises: a monitoring module; the monitoring module is connected with the communication bus and the control module respectively.

[0015] Optionally, the monitoring module comprises:

[0016] a detection assembly connected with the communication bus;

[0017] a monitoring interface connected with the detection assembly;

[0018] a monitoring circuit connected with the monitoring interface and the control module respectively.

[0019] Optionally, the reference clock providing module comprises: a clock reference source, a first clock interface, an antenna, an antenna interface and a clock module; the reference signal comprises a reference frequency signal and a reference time signal.

[0020] The clock reference source is connected with the clock module through the first clock interface; the antenna is connected with the clock module through the antenna interface; the clock module is further connected with the control module; the clock module is used for generating the reference frequency signal according to the signal provided by the clock reference source, and acquiring the reference time signal provided by the antenna to calibrate the local clock.

[0021] Optionally, the reference clock providing module further comprises a second clock interface connected to the clock module; and the clock module further outputs the reference frequency signal through the second clock interface.

[0022] Optionally, the multi-channel testing device further comprises a power module connected to the control module, the reference clock providing module, each frequency measuring module and each bidirectional communication module.

[0023] and / or,

[0024] The multi-channel testing device further comprises a multi-channel 1PPS signal detection module; the 1PPS signal detection module comprises a 1PPS signal detection interface and a 1PPS signal detection circuit; the 1PPS signal detection interface is connected to the real-time clock chip and the 1PPS signal detection circuit respectively, and the 1PPS signal detection circuit is connected to the control module; and the 1PPS signal detection circuit is used for detecting the frequency of the 1PPS signal output by the real-time clock chip.

[0025] According to another aspect of the utility model, a kind of test system is provided, comprising: host computer and the multi-channel testing device of any embodiment of the utility model described;The host computer is connected to the control module in the multi-channel testing device.

[0026] Optionally, the multi-channel testing device comprises a USB interface, and the control module is connected to the host computer through the USB interface.

[0027] The technical scheme of the utility model embodiment, by setting control module, reference clock providing module, multi-channel frequency measuring module and multi-channel bidirectional communication module, the clock frequency of real-time clock chip in multiple devices to be tested can be measured in real time by multi-channel frequency measuring module, and the frequency measurement efficiency is improved. Reference signal can be provided by reference clock providing module, information interaction between control module and real-time clock chip in multiple devices to be tested can be realized by multi-channel bidirectional communication module, control module can carry out frequency trimming and time synchronization to multiple real-time clock chips according to reference signal and clock signal output by real-time clock chip through multi-channel bidirectional communication module, the efficiency of frequency trimming and time synchronization can be improved, and the requirement of ultra-high precision real-time clock is met. Compared with prior art, the multi-channel testing device provided by the utility model integrates the functions of clock frequency measurement, clock frequency trimming and time synchronization, can improve the integration and functional comprehensiveness of multi-channel testing device, effectively shorten the testing and maintenance process of real-time clock chip, improve testing efficiency, and reduce manpower and time cost required for testing.

[0028] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0029] In order to make the technical solutions in the embodiments of the present application clearer, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings described in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0030] Figure 1 A structural schematic diagram of a multi-channel test device provided by the embodiment of the present application is shown in the figure.

[0031] Figure 2 A structural schematic diagram of another multi-channel test device provided by the embodiment of the present application is shown in the figure.

[0032] Figure 3 A structural schematic diagram of another multi-channel test device provided by the embodiment of the present application is shown in the figure.

[0033] Figure 4 A connection relationship schematic diagram of a device to be tested and a monitoring module provided by the embodiment of the present application is shown in the figure.

[0034] Figure 5 A structural schematic diagram of another multi-channel test device provided by the embodiment of the present application is shown in the figure.

[0035] Figure 6 A structural schematic diagram of a test system provided by the embodiment of the present application is shown in the figure.

[0036] Figure 7 A schematic diagram of an upper computer display interface provided by the embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0037] In order to make the technical solutions in the embodiments of the present application clearer, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings described in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0038] It should be noted that the terms "first", "second", and the like in the description and in the claims of the utility model and the above-mentioned drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the utility model described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and their variants are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to the clearly listed steps or units, but can include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0039] Figure 1 A kind of multi-channel test device's structural schematic diagram provided for the embodiment of the utility model, reference Figure 1 The multi-channel test device provided by the embodiment includes control module 10, reference clock providing module 20, multi-channel frequency measurement module 30 and multi-channel bidirectional communication module 40;Reference clock providing module 20 is connected control module 10, and reference clock providing module 20 is used to provide reference signal;Multi-channel frequency measurement module 30 is connected control module 10;Frequency measurement module 30 is connected in real-time clock chip in the device under test, for measuring the clock frequency of real-time clock chip in device under test (DUT);Multi-channel bidirectional communication module 40 is connected control module 10;Bidirectional communication module 40 is connected in real-time clock chip in the device under test;Control module 10 is used to obtain the clock signal output by real-time clock chip through bidirectional communication module 40, and according to clock signal and reference signal, real-time clock chip is adjusted and synchronized in frequency through bidirectional communication module 40.

[0040] Specifically, the working principle of the multi-channel test device is as follows: when the clock frequency of the real-time clock chip in the plurality of devices under test needs to be measured, the multi-channel frequency measurement module 30 can simultaneously connect the plurality of real-time clock chips, receive the clock frequency input by the plurality of real-time clock chips, and process the received clock frequency to transmit the processed data to the control module 10. For example, the frequency measurement module 30 can perform data format conversion and precision measurement on the received clock frequency.

[0041] The reference clock providing module 20 provides a reference signal and transmits the reference signal to the control module 10. The reference signal is used to calibrate the clock signal of the real-time clock chip. Specifically, when the real-time clock chips in multiple devices to be tested need to be calibrated, the multi-way bidirectional communication module 40 can simultaneously connect multiple real-time clock chips to receive the clock signals of the multiple real-time clock chips; the bidirectional communication module 40 obtains the clock signal data and transmits the clock signal data to the control module 10. The clock signal data includes frequency data of the clock signal and calibration data. The control module 10 transmits a calibration signal to the bidirectional communication module 40 after performing calibration operation according to the reference signal and the clock signal; the bidirectional communication module 40 transmits the calibration signal to the connected real-time clock chip to realize calibration of the real-time clock chip. Since the multi-way bidirectional communication module 40 is provided, multiple real-time clock chips can be calibrated at the same time to improve the clock calibration efficiency.

[0042] The calibration of the real-time clock chip can specifically include frequency trimming and time synchronization. For example, the reference signal includes a reference frequency signal and a reference time signal; the clock signal output by the real-time clock chip can include an actual frequency signal and an actual time signal; the control module 10 can perform frequency trimming on the real-time clock chip according to the reference frequency signal and the actual frequency signal, and perform time synchronization on the real-time clock chip according to the reference time signal and the actual time signal. For example, the standard clock frequency of the real-time clock chip can be 32.768 kHz.

[0043] For example, the control module 10 measures the deviation of the time stamps of the received actual time signal and the reference time signal by comparison, and generates a corresponding time calibration signal based on the calculated deviation, and then adjusts the frequency of the internal oscillator of the real-time clock chip or modifies the timing parameters (such as increasing or decreasing the timing unit) of the real-time clock through the bidirectional communication module 40 to complete the time synchronization of the real-time clock.

[0044] The reference frequency signal is input to the control module 10 as a reference source, and the control module 10 compares the reference source with the actual frequency signal to generate a frequency trimming signal, and then completes the frequency trimming of the real-time clock through the bidirectional communication module 40.

[0045] The technical scheme of the embodiment of the utility model discloses, through setting control module 10, reference clock providing module 20, multichannel frequency measurement module 30 and multichannel bidirectional communication module 40, the clock frequency of real-time clock chip in multiple devices to be tested can be measured in real time through multichannel frequency measurement module 30, and the frequency measurement efficiency is improved.The reference signal can be provided through reference clock providing module 20, and the information interaction of control module 10 and the real-time clock chip in multiple devices to be tested can be realized through multichannel bidirectional communication module 40, and control module 10 can carry out frequency trimming and time synchronization to multiple real-time clock chips through multichannel bidirectional communication module 40 according to the reference signal and the clock signal output by the real-time clock chip, can improve the efficiency of frequency trimming and time synchronization, and satisfy the requirement of ultra-high-precision real-time clock.Compared with prior art, the multichannel testing device provided by the utility model integrates the functions of clock frequency measurement, clock frequency trimming and time synchronization, can improve the integration and functional comprehensiveness of the multichannel testing device, effectively shorten the testing and maintenance process of real-time clock chip, improve the testing efficiency, and reduce the manpower and time cost required for testing.

[0046] Figure 2 Another structure schematic view of the multichannel testing device provided by the embodiment of the utility model is provided with reference to Figure 2 On the basis of the above embodiment, the multichannel testing device further comprises: an FPGA (Field-Programmable Gate Array, field programmable gate array) ; the FPGA is connected with the control module 10 and is used for data interaction;Part of the circuit of the testing device can be integrated in the FPGA, and the FPGA can be configured and programmed according to the requirement to adapt to different application scenarios.And it can process multiple signals simultaneously, is suitable for high-concurrency tasks, and improves the system performance.By integrating the communication transceiver circuit 422 and the frequency detection circuit 322 in the FPGA, the number of external components can be reduced, and the compactness and reliability of the system are improved.Specifically:

[0047] In an embodiment, optionally, the frequency measurement module 30 comprises: an input interface 31 and a frequency measurement circuit 32;The input interface 31 is connected with the real-time clock chip and the frequency measurement circuit 32 respectively, and the frequency measurement circuit 32 is connected with the control module 10.Specifically, the frequency measurement circuit 32 comprises a frequency signal amplification circuit 321 and a frequency detection circuit 322, the input interface 31 is connected with the real-time clock chip and the frequency signal amplification circuit 321 respectively, and the frequency detection circuit 322 is connected with the frequency signal amplification circuit 321 and the control module 10 respectively;The frequency detection circuit 322 is integrated in the FPGA.

[0048] The frequency detection circuit 322 can include a high-precision frequency detection circuit integrated in the FPGA. Further, the frequency signal amplification circuit 321 can include an amplifier or other data processing device connected between the input interface and the high-precision frequency detection circuit, and the frequency signal amplification circuit 321 is independently arranged outside the FPGA.

[0049] Specifically, the principle of clock frequency measurement by the FPGA is as follows: when the FPGA is used for frequency measurement, the FPGA can combine a frequency standard source (referred to as a frequency reference source) as a reference. That is, when the FPGA performs frequency measurement, the measured signal and the frequency reference source are compared to measure the frequency of the measured signal. Any existing measurement method can be used, for example, the high-speed digital logic processing capability of the FPGA is used to count the number of cycles of a frequency standard source in a certain period of time, and then the count is compared with the number of cycles of the measured signal. Other measurement methods can also be used, which are not described here.

[0050] The high-precision frequency detection circuit can be implemented by the FPGA, and the specific implementation can be understood as follows: the general I / O port or the dedicated input pin of the FPGA is used to receive the clock frequency signal; the ADC (Analog-to-Digital Converter) port is used to sample the signal to improve the quality of the clock frequency signal; the FPGA internal clock source is used to design a frequency divider to adapt to the frequency of the input signal; the pulse counter is used to record the number of input signal cycles in a specific time window; the FPGA internal timer is used to calculate the time interval of each count, thereby obtaining the clock frequency of the real-time clock chip in the device under test. When the high-precision frequency detection circuit is used, the clock frequency detection accuracy is ±5ppb. Therefore, the multi-channel test device has high-precision testing capability and can be used as a professional and efficient test tool to ensure product quality and system performance. It can also meet the multi-scenario testing requirements of ultra-high-precision RTC and simplify the testing and maintenance process.

[0051] In another embodiment, the bidirectional communication module 40 can include a communication interface 41 and a communication circuit 42. The communication circuit 42 includes a communication type switching circuit 421 and a communication transceiver circuit 422. The communication interface 41 is connected to the real-time clock chip and the communication type switching circuit 421, respectively. The communication transceiver circuit 422 is connected to the communication type switching circuit 421 and the control module 10, respectively. The communication transceiver circuit 422 is integrated in the FPGA.

[0052] The communication circuit 42 is used for bidirectional transmission between the clock signal of the real-time clock chip and the control module 10; for example, the communication circuit 42 is used for transmitting the clock signal of the real-time clock chip to the control module 10, or transmitting the calibration signal of the control module 10, such as the frequency adjustment signal and the time synchronization signal, to the real-time clock chip, so as to adjust the frequency and synchronize the time of the real-time clock chip. The communication type switching circuit 421 is independently arranged outside the FPGA.

[0053] Optionally, the bidirectional communication module 40 comprises at least one of an I2C communication module, an SPI communication module, a CAN communication module, an RS-485 communication module and an RS-232 communication module.

[0054] Correspondingly, the communication interface corresponds to the type of the bidirectional communication module 40, and comprises at least one of an I2C communication interface, an SPI communication interface, a CAN communication interface, an RS-485 communication interface and an RS-232 communication interface. The communication circuit corresponds to the type of the bidirectional communication module 40, and comprises at least one of an I2C communication circuit, an SPI communication circuit, a CAN communication circuit, an RS-485 communication circuit and an RS-232 communication circuit.

[0055] For example, Figure 3 Another structure schematic view of the multi-channel test device is provided for the embodiment of the utility model, referring to Figure 3 The bidirectional communication module can comprise all types of communication modules described above, so as to increase the versatility of the test device, and when used, the specific interface connected with the test device can be selected according to the structure type of the device to be tested.

[0056] Optionally, referring to Figure 3 The same type of multi-channel communication circuit can be integrated together, Figure 3 For example, 8 I2C communication circuits are integrated together, 8 SPI communication circuits are integrated together, 8 communication circuits are integrated together, 8 RS-485 communication circuits are integrated together, and 8 RS-232 communication circuits are integrated together. In the specific implementation, the different types of communication circuits are not independent of each other, and it can be understood that the multi-channel communication circuit is an 8-channel communication circuit with a communication mode selection function.

[0057] For example, the test device can be provided with a plurality of connectors corresponding to the number of bidirectional communication modules, the number of pins in each connector is not less than the number of types of communication modules, and different pins in each connector correspond to different types of communication interfaces and are connected with different types of communication circuits. Figure 3The 8-way connector is exemplarily shown, and when 8 devices to be tested need to be tested at the same time, the same type of communication interfaces in the 8-way connector can be connected with 8 real-time clock chips at the same time.

[0058] It can be understood that the above correspondence is not a limitation of the utility model, and the corresponding connection relationship between the communication circuit and the communication interface can be set according to actual needs. In other embodiments, the test device can also be provided with a plurality of connectors of the same type as the communication module, the number of pins in each connector is not less than the number of bidirectional communication modules, and different pins in each connector correspond to a plurality of communication interfaces of the same type, and respectively connect the communication circuits in the same type.

[0059] Optionally, the control module 10 can include a plurality of communication interfaces for communicating with the bidirectional communication module 40. Corresponding to the type of communication module in the bidirectional communication module 40, the communication interface in the control module 10 can include at least one of an I2C interface, an SPI interface, a CAN interface, an RS-485 interface and an RS-232 interface. Specifically, the I2C interface is connected to the I2C communication unit, the SPI interface is connected to the SPI communication unit, the CAN interface is connected to the CAN communication unit, the RS-485 interface is connected to the RS-485 communication unit, and the RS-232 interface is connected to the RS-232 communication unit.

[0060] On the basis of the above embodiments, optionally, the control module 10 can be an MCU (Microcontroller Unit, i.e. microcontroller unit). In addition to the communication interface connected with the communication transceiver circuit 422, the control module 10 further includes a data processing unit as a core component in the control module, and a data communication unit connected between the data processing unit and the FPGA, for realizing information interaction between the FPGA and the data processing unit.

[0061] Specifically, when communicating with the control module 10 through the I2C communication module, the I2C communication interface is connected to the real-time clock chip and the I2C communication circuit respectively, the I2C communication circuit is connected to the I2C interface of the control module 10, at this time, the control module 10 and the real-time clock chip communicate with each other through the I2C protocol. When communicating with the control module 10 through the SPI communication module, the SPI communication interface is connected to the real-time clock chip and the SPI communication circuit respectively, the SPI communication circuit is connected to the SPI interface of the control module 10, at this time, the control module 10 and the real-time clock chip communicate with each other through the SPI protocol. When communicating with the control module 10 through the CAN communication module, the CAN communication interface is connected to the real-time clock chip and the CAN communication circuit respectively, the CAN communication circuit is connected to the CAN interface of the control module 10, at this time, the control module 10 and the real-time clock chip communicate with each other through the CAN protocol. When communicating with the control module 10 through the RS-485 communication module, the RS-485 communication interface is connected to the real-time clock chip and the RS-485 communication circuit respectively, the RS-485 communication circuit is connected to the RS-485 interface of the control module 10, at this time, the control module 10 and the real-time clock chip communicate with each other through the RS-485 protocol. When communicating with the control module 10 through the RS-232 communication module, the RS-232 communication interface is connected to the real-time clock chip and the RS-232 communication circuit respectively, the RS-232 communication circuit is connected to the RS-232 interface of the control module 10, at this time, the control module 10 and the real-time clock chip communicate with each other through the RS-232 protocol. In the embodiment, by setting multiple communication modules, the flexibility of the system can be improved.

[0062] Figure 4 A connection relationship diagram of a to-be-tested device and a monitoring module provided in the embodiment of the utility model, refer to Figure 4 On the basis of each of the above embodiments, optionally, the controller MCU in the to-be-tested device 100 is connected to the real-time clock chip RTC through a communication bus; the multi-channel testing device further comprises a monitoring module 60; the monitoring module 60 is connected to the communication bus and the control module 10 respectively.

[0063] The monitoring module 60 is used to monitor the bus data of the real-time clock chip RTC. For example, the bus data of the real-time clock chip RTC may include time data, such as seconds, minutes, hours, date, month, and year; operating mode data, wherein the operating mode of the real-time clock chip RTC can be configured via a control register in the real-time clock chip RTC; and operating status information data, wherein the operating status information of the real-time clock chip RTC can be provided via a status register in the real-time clock chip RTC. It is understood that the communication bus may be at least one of an I2C communication bus, an SPI communication bus, a CAN communication bus, an RS-485 communication bus, and an RS-232 communication bus, and the communication bus corresponds to the type of the monitoring module 60. Figure 4 The I2C communication bus is given as an example, but it is not intended to limit the present invention. For example, a multi-channel test device may include a multi-channel monitoring module 60 to support simultaneous monitoring of multiple devices under test 100.

[0064] On the basis of the above embodiments, optionally, the monitoring module 60 includes: a detection component (not shown in the figure), a monitoring interface 61 and a monitoring circuit 62. The detection component is connected to the communication bus, and the monitoring interface 61 is connected to the detection component; the monitoring circuit 62 is respectively connected to the monitoring interface 61 and the control module 10. It can be understood that the number of buses contained in the communication bus in the device to be tested 100 is different depending on the type of communication bus protocol. Correspondingly, the monitoring module 60 includes the same number of detection components, monitoring interfaces 61 and monitoring circuits 62 as the number of communication bus buses; each bus in the communication bus is connected one-to-one with the detection component in the monitoring module 60, and each detection component is connected one-to-one with each monitoring interface 61, and each monitoring interface 61 is connected one-to-one with each monitoring circuit 62. Exemplarily, the detection component can be specifically understood as a universal high-impedance probe for an oscilloscope.

[0065] For example, four buses can be configured in the communication bus in the device to be tested 100, which can support the requirements of most communication protocols. The four buses can be calibrated with serial numbers as bus 1, bus 2, bus 3, and bus 4. When used for testing, the number of buses and the buses with corresponding serial numbers are determined according to the different communication types used. The supported communication types include but are not limited to I2C, SPI, CAN, RS-485 and RS-232, so the number of buses required to be used is 2 or 4. For example, when using I2C communication, two fixed buses among the four buses are connected and used as clock signal lines and data signal lines respectively. When using SPI communication, all four buses are connected and used as: chip select signal line, serial clock line, host input / slave output data line, host output / slave input data line. For communication buses of other communication types, no further explanation is given here.

[0066] The specific structure and action process of the monitoring module 60 will be described below by taking I2C communication as an example. Figure 4 Figure 4 For example, the controller MCU in the device to be tested 100 is connected with the real-time clock chip RTC through the I2C communication bus.

[0067] The I2C communication bus comprises two buses, namely a clock signal line SCL and a data signal line SDA.

[0068] Optionally, continuing to refer to Figure 4 The monitoring module 60 comprises two detection assemblies connected with the clock signal line SCL and the data signal line SDA respectively, two monitoring interfaces 61 connected with the two detection assemblies respectively, and two monitoring circuits 62 connected with the two monitoring interfaces 61 respectively, and the monitoring circuit 62 is connected with the control module 10.

[0069] Specifically, the two detection assemblies are connected with the clock signal line SCL and the data signal line SDA respectively, the bus data of the real-time clock chip RTC received through the monitoring interface 61 is transmitted to the corresponding monitoring circuit 62, the bus data is monitored and analyzed, and then the data is transmitted to the control module 10.

[0070] Figure 5 Another structure schematic view of the multi-channel test device is provided in the embodiment of the utility model, referring to Figure 5 On the basis of the above-mentioned embodiments, the reference clock providing module 20 comprises a clock reference source 21, a first clock interface 22, an antenna (not shown in the figure), an antenna interface 25 and a clock module 23; the reference signal comprises a reference frequency signal and a reference time signal; the clock reference source 21 is connected with the clock module 23 through the first clock interface 22, the antenna is connected with the clock module 23 through the antenna interface 25, and the clock module 23 is further connected with the control module 10; the clock module 23 is used for generating the reference frequency signal according to the signal provided by the clock reference source 21, and acquiring the reference time signal provided by the antenna to calibrate the local clock.

[0071] The signal provided by the clock reference source 21 can be a 1PPS signal.

[0072] The antenna can be multiplexed as the clock reference source 21, and correspondingly, the first clock interface 22 can be multiplexed as the antenna interface 25.

[0073] ​The clock module 23 can generate a stable 10MHz frequency signal as a reference frequency signal according to the 1PPS signal, as a reference source for frequency adjustment.

[0074] The antenna and antenna interface 25 are used for GPS synchronization, for receiving GPS satellite signals, using the time information therein, and combining with the internal high-precision clock to generate a reference time signal. For example, reference can be made to Figure 3 The clock module 23 can include a CM66 clock module, so that the precision of time synchronization is ±30ns. The CM66 module is mainly used to provide a 10MHz reference source, and for GPS synchronization. For GPS synchronization, it can be specifically understood that the CM66 module is connected with an antenna, and a receiver module is built-in in the CM66 module, to obtain a reference time signal that provides accurate time information. The accurate time information is used for subsequent time synchronization functions.

[0075] Optionally, continuing to refer to Figure 5 The reference clock providing module 20 further includes a second clock interface 24 connected with the clock module 23; the clock module 23 outputs the reference frequency signal through the second clock interface 24 as a high-precision reference source in other application scenarios.

[0076] Optionally, continuing to refer to Figure 5 The multi-channel test device further includes a power supply module 70 connected with the control module 10, the reference clock providing module 20, each frequency measurement module 30, and each bidirectional communication module 40, respectively, for supplying power to the electrical devices in the control module 10, the reference clock providing module 20, each frequency measurement module 30, and each bidirectional communication module 40.

[0077] For example, the power supply module 70 supplies power to the control module 10 and the FPGA. For example, the power supply module 70 can provide a 12V power supply.

[0078] Optionally, the power supply module 70 can only include a power supply interface, or include a power supply interface and a power supply conversion circuit. The power supply interface can access a 12V power supply signal, for example, through a power adapter to input power. The power supply conversion circuit can include a DC-DC (Direct Current to Direct Current) converter, for converting the input power supply into a direct current power supply of different voltage levels to meet the needs of the test device.

[0079] Optionally, continuing to refer to Figure 5The multi-channel test device further comprises a multi-channel 1PPS signal detection module 50; the 1PPS signal detection module 50 comprises a 1PPS signal detection interface 51 and a 1PPS signal detection circuit 52; the 1PPS signal detection interface 51 is connected to the real-time clock chip and the 1PPS signal detection circuit 52 respectively, and the 1PPS signal detection circuit 52 is connected to the control module 10; the 1PPS signal detection circuit 52 is configured to detect the frequency of the 1PPS signal output by the real-time clock chip. For example, the FPGA detects the input 1PPS signal according to an algorithm set internally, and obtains the frequency data of the 1PPS signal. The 1PPS signal can be an interrupt signal output by the real-time clock chip, and the 1PPS signal detection is equivalent to the INT detection.

[0080] The utility model embodiment further provides a test system, including the multi -channel test device that any embodiment provided by the utility model, the test system has the beneficial effect of any embodiment corresponding.

[0081] Figure 6 The utility model embodiment provides a test system structure schematic drawing, reference Figure 6 , the test system includes host computer 200 and multi -channel test device 300;Host computer 200 connects the control module in multi -channel test device 300.

[0082] The host computer 200 can be used to control the detection of the clock frequency of the real-time clock chip of the device to be tested, and can be used for data collection in the full temperature range of the real-time clock chip and fitting. For example, the host computer 200 can be a PC (Personal Computer) device.

[0083] Optionally, reference Figure 5 The multi-channel test device comprises a USB interface, and the control module 10 is connected to the host computer 200 through the USB interface.

[0084] Optionally, the host computer 200 comprises a display unit, so as to realize the visualization of the test results of the multi-channel test device, for example, the waveforms of the test signals (for example, the clock frequency of the real-time clock chip). Figure 7 The utility model embodiment provides a host computer display interface schematic drawing, reference Figure 7 The display interface can specifically set a plurality of display regions of channels, and each display region of channel is used to display the data of the real-time clock chip to be measured, for example, the clock frequency output by the multi-channel frequency measurement module, or the monitored bus data.

[0085] On this basis, optionally, the display interface can further include virtual function buttons, so as to realize human-computer interaction, so that the user can issue relevant instructions to the control module through the host computer. For example, frequency measurement buttons, frequency adjustment buttons and time synchronization buttons can be included. The user can control the host computer 200 to output corresponding control instructions by clicking the relevant buttons, so as to control the multi-channel test device to realize the corresponding test function of the real-time clock chip. Exemplarily, phase adjustment buttons and read-write test buttons can be set in the virtual function buttons as needed. The connection state of each bidirectional communication module can also be displayed in the display interface, and the specific display interface can be set according to the requirements.

[0086] It can be understood that the control module 10 can perform frequency adjustment and time synchronization by itself, or can execute corresponding test functions in response to the control instructions output by the host computer 200.

[0087] It should be understood that various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present application can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions of the present application can be achieved, which are not limited herein.

[0088] The above specific embodiments do not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A multi-channel test device, characterized by, Comprise: A control module, a reference clock providing module, a plurality of frequency measurement modules and a plurality of bidirectional communication modules; The reference clock providing module is connected to the control module, and the reference clock providing module is used for providing a reference signal; A plurality of frequency measurement modules are connected to the control module; the frequency measurement module is connected to a real-time clock chip in a device to be tested, and is used for measuring the clock frequency of the real-time clock chip in the device to be tested; A plurality of bidirectional communication modules are connected to the control module; the bidirectional communication module is connected to the real-time clock chip in the device to be tested; the control module is used for acquiring the clock signal output by the real-time clock chip through the bidirectional communication module, and performing frequency trimming and time synchronization on the real-time clock chip through the bidirectional communication module according to the clock signal and the reference signal.

2. The multi-channel test device of claim 1, wherein, Also include: FPGA; The FPGA is connected to the control module; Wherein, the frequency measurement module includes: input interface and frequency measurement circuit; the frequency measurement circuit includes frequency signal amplification circuit and frequency detection circuit, the input interface is connected to the real-time clock chip and the frequency signal amplification circuit respectively, the frequency detection circuit is connected to the frequency signal amplification circuit and the control module respectively; the frequency detection circuit is integrated in the FPGA; And / or, the bidirectional communication module includes: communication interface and communication circuit; the communication circuit includes communication type switching circuit and communication transceiver circuit, the communication interface is connected to the real-time clock chip and the communication type switching circuit respectively, the communication transceiver circuit is connected to the communication type switching circuit and the control module respectively, and the communication transceiver circuit is integrated in the FPGA.

3. The multi-channel test device of claim 1, wherein, The bidirectional communication module includes at least one of I2C communication module, SPI communication module, CAN communication module, RS-485 communication module and RS-232 communication module.

4. The multi-channel test device of claim 1, wherein, The controller in the device to be tested is connected to the real-time clock chip through a communication bus; The multi-channel test device further comprises a monitoring module; the monitoring module is connected to the communication bus and the control module respectively.

5. The multi-channel test device of claim 4, wherein, The monitoring module includes: A detection assembly connected to the communication bus; A monitoring interface connected to the detection assembly; A monitoring circuit connected to the monitoring interface and the control module respectively.

6. The multi-channel test device of claim 1, wherein, The reference clock providing module includes: a clock reference source, a first clock interface, an antenna, an antenna interface and a clock module; the reference signal includes a reference frequency signal and a reference time signal; The clock reference source is connected to the clock module through the first clock interface, the antenna is connected to the clock module through the antenna interface, and the clock module is also connected to the control module; the clock module is used for generating the reference frequency signal according to the signal provided by the clock reference source, and acquiring the reference time signal provided by the antenna to calibrate the local clock.

7. The multi-channel test device of claim 6, wherein, The reference clock providing module further comprises a second clock interface connected to the clock module; the clock module further outputs the reference frequency signal through the second clock interface.

8. The multi-channel test device of claim 1, wherein, Also include: A power module is connected with the control module, the reference clock providing module, each frequency measuring module and each bidirectional communication module respectively; and / or, The multi-channel test device further comprises a multi-channel 1PPS signal detection module; the 1PPS signal detection module comprises a 1PPS signal detection interface and a 1PPS signal detection circuit; the 1PPS signal detection interface is connected with the real-time clock chip and the 1PPS signal detection circuit respectively, and the 1PPS signal detection circuit is connected with the control module; the 1PPS signal detection circuit is used for detecting the frequency of the 1PPS signal output by the real-time clock chip.

9. A test system, characterized by Comprise: A host computer and the multi-channel test device as claimed in any one of claims 1-8; the host computer is connected with the control module in the multi-channel test device.

10. The test system of claim 9, wherein, The multi-channel test device comprises a USB interface; the control module is connected with the host computer through the USB interface.

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