High-speed 485 transceiver isolation circuit
By employing a high-speed RS485 transceiver isolation circuit with two RS485 chips, combined with protection and isolation circuits, the problems of anti-interference and conversion delay in high-speed data transmission of RS485 circuits were solved, realizing bidirectional transmission and stable communication of RS485 signals.
Patent Information
- Application Number
- CN202422926602.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-10-24
- Estimated Expiration
- 2034-11-29
AI Technical Summary
Traditional RS485 circuits have poor anti-interference capabilities during high-speed data transmission, lack effective isolation measures, and experience delays when switching between transmit and receive states, which affects communication efficiency.
A high-speed 485 transceiver isolation circuit based on two 485 chips is adopted, combined with protection and isolation circuits. High-speed optocoupler isolation chips are used to achieve electrical isolation of signals, and external interference is prevented through protection circuits to improve signal transmission and reception rates.
It enables bidirectional transmission of 485 signals, enhances ESD resistance, ensures reliable operation in harsh environments, and improves signal transmission and reception rates and communication stability.
Smart Images

Figure CN223472253U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to signal transmission circuit technical field, especially a high -speed rate 485 transceiver isolation circuit. BACKGROUND
[0002] In the current communication system, RS485 communication is a widely used serial communication mode. However, due to the limitation of technology, the traditional 485 circuit still has some technical problems as follows. (1) In high-speed data transmission, due to the relatively low anti-interference ability, it is easy to be disturbed (such as lightning, short circuit, switch and other inductive load actions often occur in industrial control environment, which will produce transient electromagnetic interference), resulting in data transmission error. (2) Lack of effective isolation measures, external interference signals may affect the normal work of the circuit, and even damage the devices in the circuit (interference signals will be coupled to the RS485 bus, so that the noise amplitude of the interference voltage exceeds the noise tolerance of the RS485 transceiver, causing communication error); for example, common mode interference (common mode interference is that the amplitude of interference voltage on the signal line and its return line (usually called signal ground line) is the same, and the interference is some short high-energy pulse interference. Because these pulses are not single pulses, but a series of pulses, therefore, accumulation will be generated on the RS485 bus) may be superimposed on the transmission line, so that the receiving end receives the wrong signal level, and further causes the damage of the devices with poor anti-interference ability in the circuit. (3) The existing 485 transceiver circuit has the problem of large delay in converting the transceiver state (RS485 communication is half-duplex communication, only one direction can transmit data at the same time, and RS485 chip can only be in sending mode or receiving mode at the same time. When the main chip needs to send data, it needs to send DE / RE high first and then send data signal D. But because the RS485 chip is originally in receiving mode, it suddenly switches to sending mode, which needs time, which is delay), which affects the overall communication efficiency. UTILITY MODEL CONTENT
[0003] In order to overcome the disadvantages of the existing RS485 circuit due to the limitation of technology, the utility model provides a high-speed rate 485 transceiver isolation circuit based on two 485 chips, which can isolate signals under the joint action of other related circuits, prevent external interference from affecting signal transmission, and improve the signal transmission rate.
[0004] The technical scheme adopted by the utility model to solve its technical problems is:
[0005] A high-speed 485 transceiver isolation circuit, comprising a power module, further comprising a protection circuit, an isolation circuit, a 485 signal transceiver circuit; the protection circuit, the data transceiver circuit, the 485 signal transceiver circuit each have two paths, the protection circuit, the isolation circuit, the 485 signal transceiver circuit and the power module are installed in a component box; the power output end of the power module and the power input ends of the two paths of the protection circuit, the isolation circuit and the 485 signal transceiver circuit are electrically connected; the signal interaction ends of the two paths of the protection circuit and the first path signal interaction ends of the two paths of the 485 signal transceiver circuit are respectively electrically connected, the signal ports of the two paths of the protection circuit and the signal ports of the signal input device and the signal receiving device are respectively electrically connected, and the signal interaction ports of the two paths of the isolation circuit and the second path signal interaction ends of the two paths of the 485 signal transceiver circuit are respectively electrically connected.
[0006] Further, the protection circuit of each path comprises a protection diode and a resistor which are electrically connected, and the output end of the protection diode is connected with one end of the resistor.
[0007] Further, the first path isolation circuit comprises a resistor, a triode and a high-speed optocoupler isolation chip which are electrically connected, the anode of the high-speed optocoupler isolation chip is connected with one end of the first resistor, the cathode of the high-speed optocoupler isolation chip is connected with the emitter of the triode, the base of the triode is connected with one end of the second resistor, the other end of the second resistor is connected with one end of the third resistor, the other end of the third resistor is connected with the other end of the first resistor, the positive power input end of the high-speed optocoupler isolation chip and one end of the fourth resistor, the output end and the negative power input end of the high-speed optocoupler isolation chip are connected with the other end of the fourth resistor and the collector of the triode.
[0008] Further, the second path isolation circuit comprises a resistor, a triode and a high-speed optocoupler isolation chip which are electrically connected, the anode of the high-speed optocoupler isolation chip is connected with one end of the first resistor, the cathode of the high-speed optocoupler isolation chip is connected with the emitter of the triode, the base of the triode is connected with one end of the second resistor, the other end of the second resistor is connected with one end of the third resistor, the other end of the third resistor is connected with the other end of the first resistor, the positive power input end of the high-speed optocoupler isolation chip and one end of the fourth resistor, the output end of the high-speed optocoupler isolation chip is connected with the other end of the fourth resistor, and the negative power input end of the high-speed optocoupler isolation chip is connected with the collector of the triode.
[0009] Further, the 485 signal transceiver circuit of each path comprises a 485 chip and a resistor which are electrically connected, the RE port, the SHON port and the VCC port of the 485 chip and one end of the first resistor are connected, the other end of the first resistor is connected with the A port of the 485 chip, the B port of the 485 chip is connected with one end of the second resistor, and the other end of the second resistor is connected with the GND port of the 485 chip.
[0010] Further, the high-speed optocoupler isolation chip model is TLP2362, and the 485 chip model is MAX13487.
[0011] Compared with the prior art, the utility model has the advantages that: based on two 485 chips, under the joint action of other related circuits, bidirectional transmission of 485 signals of signal input equipment and signal receiving equipment can be realized, electrical isolation of signals is realized by using high-speed optocoupler isolation module circuit, the influence of external interference on signals is prevented, the protection circuit integrates high-voltage electrostatic discharge protection, the anti-ESD (electrostatic discharge) capability of the overall circuit is improved, reliable operation of the utility model in harsh environments is ensured, the transmission and reception of 485 data models are stably realized, and the signal transmission and reception rate is improved. BRIEF DESCRIPTION OF DRAWINGS
[0012] The utility model will be further described below in combination with the drawings and examples.
[0013] Figure 1 It is the structure schematic diagram of the utility model.
[0014] Figure 2 It is the circuit diagram of the utility model. CONCRETE EMBODIMENT
[0015] Figure 1 , 2 As shown in the figure, a kind of high-speed 485 transceiver isolation circuit, including power module U1, also have protection circuit 1, isolation circuit 2, 485 signal transceiver circuit 3;The protection circuit 1, data transceiver circuit 2, 485 signal transceiver circuit 3 respectively have two ways, protection circuit 1, isolation circuit 2, 485 signal transceiver circuit 3 and power module U1 are installed on the circuit board in component box.
[0016] Figure 1 , 2As shown in the figure, the first protection circuit includes a protection diode Q3 and a resistor R7 connected by the circuit board, and the output end of the protection diode Q3 and one end of the resistor R7 are connected. The second protection circuit includes a protection diode Q2 and a resistor R8 connected by the circuit board, and the output end of the protection diode Q32 and one end of the resistor R8 are connected. The first isolation circuit includes resistors R1, R2, R3, R4, a triode Q1, and a high-speed optical coupling isolation chip U2 connected by the circuit board, the anode 1 pin of the high-speed optical coupling isolation chip U2 and one end of the first resistor R1 are connected, the cathode 3 pin of the high-speed optical coupling isolation chip U2 and the emitter of the triode Q1 are connected, the base of the triode Q1 and one end of the second resistor R4 are connected, the other end of the second resistor R4 and one end of the third resistor R3 are connected, the other end of the third resistor R3 and the other end of the first resistor R1, the positive power input end 6 pin of the high-speed optical coupling isolation chip U2, and one end of the fourth resistor R2 are connected, the output end 5 pin and the negative power input end 4 pin of the high-speed optical coupling isolation chip U2 and the other end of the fourth resistor R2, and the collector of the triode Q1 are connected. The second isolation circuit includes resistors R11, R12, R13, R14, a triode Q4, and a high-speed optical coupling isolation chip U5 connected by the circuit board, the anode 1 pin of the high-speed optical coupling isolation chip U5 and one end of the first resistor R11 are connected, the cathode 3 pin of the high-speed optical coupling isolation chip U5 and the emitter of the triode Q4 are connected, the base of the triode Q4 and one end of the second resistor R14 are connected, the other end of the second resistor R14 and one end of the third resistor R12 are connected, the other end of the third resistor R12 and the other end of the first resistor R11, the positive power input end 6 pin of the high-speed optical coupling isolation chip U5, and one end of the fourth resistor R13 are connected, the output end 5 pin of the high-speed optical coupling isolation chip U5 and the other end of the fourth resistor R13 are connected, and the negative power input end 4 pin of the high-speed optical coupling isolation chip U5 and the collector of the triode Q4 are connected. The first 485 signal transceiver circuit includes a 485 chip U3 and resistors R5 and R9 connected by the circuit board, the RE port 2 pin, the SHON port 3 pin, the VCC port 8 pin, and one end of the first resistor R9 of the 485 chip U3 are connected, the other end of the first resistor R9 and the A port 6 pin of the 485 chip U3 are connected, the B port 7 pin of the 485 chip U3 and one end of the second resistor R5 are connected, and the other end of the second resistor R5 and the GND port 5 pin of the 485 chip U3 are connected. The second 485 signal transceiver circuit includes a 485 chip U4 and resistors R6 and R10 connected by the circuit board, the RE port 2 pin, the SHON port 3 pin, the VCC port 8 pin, and one end of the first resistor R6 of the 485 chip U4 are connected, the other end of the first resistor R6 and the A port 6 pin of the 485 chip U4 are connected, the B port 7 pin of the 485 chip U4 and one end of the second resistor R10 are connected, and the other end of the second resistor R10 and the GND port 5 pin of the 485 chip U4 are connected.
[0017] Figure 1 , 2 As shown in the figure, the power input 1 and 2 pins of the power module U1 are connected to the two poles of the AC 220V power supply through wires. The power output 3 and 4 pins of the power module U1 are connected to the negative power input end of the protection diodes Q2 and Q3, the power input end of the two-way isolation circuit resistor R2, one end of the resistor R13 and the collector of the triode Q1, and the 3 and 5 pins of the 485 chips U3 and U4 of the two-way 485 signal transceiver circuit through wires, respectively. The output end of the protection diode Q3 is connected to one end of the resistor R9 through a wire, and the output end of the protection diode Q2 is connected to one end of the resistor R8 through a wire. The other end of the resistor R7, the positive power input end of the protection diode Q3, and the two signal output ports of the signal input device (such as a control system capable of inputting and outputting RS485 data) are connected through wires, respectively. The other end of the resistor R8, the positive power input end of the protection diode Q2, and the two signal output ports of the signal output device (such as a central processing module capable of inputting and outputting RS485 data) are connected through wires, respectively. The other end of the resistor R2 and the D1 port 4 pin of the 485 chip U3 are connected through a wire, and the RO port 1 pin of the 485 chip U3 and the other end of the resistor R14 are connected through a wire. The other end of the resistor R13 and the D1 port 4 pin of the 485 chip U4 are connected through a wire, and the RO port 1 pin of the 485 chip U4 and the other end of the resistor R3 are connected through a wire.
[0018] Figure 1 , 2As shown, the AC 220V power enters the power input end of the power module U1, and the stable DC 5V power output by the 3 and 4 pins of the power module U1 enters the power input ends of the two-way protection circuit, the two-way isolation circuit and the two-way 485 signal transceiver circuit, and the above-mentioned circuits work. When the 485 signal output by the control system is input from the 485MA and 485MB ports, the 485 signal enters the 485 chip U3 and is converted into a TTL signal, the signal output by the sending end 1 pin of the 485 chip U3 is optoelectronically isolated by the high-speed optocoupler isolation chip U5 and then enters the receiving end of the 485 chip U4, and the 485 chip U4 converts the TTL signal into a 485 signal and outputs the signal to the signal input end of the central processing module. When the 485 signal output by the central processing module is input from the 485PA and 485PB ports, the 485 signal enters the 485 chip U4 and is converted into a TTL signal, the signal output by the sending end 1 pin of the 485 chip U4 is optoelectronically isolated by the high-speed optocoupler isolation chip U2 and then enters the receiving end of the 485 chip U3, and the 485 chip U3 converts the TTL signal into a 485 signal and outputs the signal to the signal input end of the control system. Through the above, the two sets of 485 chips can automatically switch the transceiver function, and finally realize the bidirectional transmission of the 485 signal. In the circuit, the 485 signal before isolation is converted into a TTL signal by the 485 chip and reaches the optocoupler, and after being optoelectronically isolated by the optocoupler, it reaches another 485 chip and is converted into an isolated 485 signal. When the RE pin of the RS485 chip MAX16487 is at a high level, the chip enters the automatic direction switching mode. Specifically, in the optocoupler isolation circuit, taking the high-speed optocoupler isolation chip U5 as an example, when the 1 pin of the 485 chip U3 outputs a high level, the transistor Q4 is cut off, the high-speed optocoupler isolation chip U5 is not conductive, the output of the high-speed optocoupler isolation chip U5 is pulled up to a high level by the resistor R13, and the 4 pin of the 485 chip U4 is input at a high level. When the 1 pin of the 485 chip U3 outputs a low level, the transistor Q4 is conductive, the high-speed optocoupler isolation chip U5 is conductive, the optocoupler output is low, and the 4 pin of the 485 chip U4 is input at a low level (the output end of the high-speed optocoupler isolation chip is a low level signal when the high-speed optocoupler isolation chip is conductive, and the output end of the high-speed optocoupler isolation chip is a high level signal when the high-speed optocoupler isolation chip is not conductive; the high-speed optocoupler isolation chip is conductive when the transistor Q4 is conductive, and the high-speed optocoupler isolation chip is not conductive when the transistor is not conductive).The working process of high-speed optocoupler isolation chip U2 is same as above. When the output of pin 1 of 485 chip U4 is high level, transistor Q1 is off, high-speed optocoupler isolation chip U2 is not conductive, the output of high-speed optocoupler isolation chip U2 is pulled up to high level by resistor R2, and the input of pin 4 of 485 chip U3 is high level. When the output of pin 1 of 485 chip U4 is low level, transistor Q1 is conductive, high-speed optocoupler isolation chip U2 is conductive, the output of high-speed optocoupler isolation chip U2 is low level, and the input of pin 4 of 485 chip U3 is low level (when high-speed optocoupler isolation chip is conductive, the output of high-speed optocoupler isolation chip is low level signal; when high-speed optocoupler isolation chip is not conductive, the output of high-speed optocoupler isolation chip is high level signal; when transistor Q1 is conductive, optocoupler is conductive; when transistor is not conductive, optocoupler is not conductive).
[0019] Figure 1 、 2 As shown in the figure, power module U1 is an AC 220V to DC 5V switching power module product. The model of high-speed optocoupler isolation chip U2 and U5 is TLP2362. The model of 485 chip U3 and U4 is MAX13487. The transistors Q1 and Q4 are PNP type transistors, and the model is MMBT4403 (conducting and closing effect, transistor conducting and closing control high-speed optocoupler isolation chip conducting and closing). The protection diodes Q2 and Q3 are ESD protection diodes, and the model is PSM712, which protects the bus signal from static electricity and surge voltage. Resistors R1 and R11 are current limiting resistors with a resistance of 470 ohms, which limit the current flowing through the high-speed optocoupler isolation chip to prevent damage to the high-speed optocoupler isolation chip. Resistors R2, R3, R12 and R13 are pull-up resistors with a resistance of 10K, which maintain high level (maintaining high level effect is to provide high level state for high-speed optocoupler isolation chip input and output, so as to ensure the normal work of the circuit). Resistors R4 and R14 are current limiting resistors with a resistance of 100 ohms, which can limit the current flowing through the base of the transistor to prevent damage to the transistor. Resistors R5 and R10 are pull-down resistors with a resistance of 2K, which can prevent the bus from being in an uncertain state and ensure communication stability; resistors R6, R9 and R8 are pull-up resistors with a resistance of 2K, which can prevent the bus from being in an uncertain state and ensure communication stability; specifically, when the 485 bus is in idle or open circuit state, the voltage difference between A and B lines is basically 0, at this time the bus is in an uncertain state, which may cause communication error or failure. By adding pull-up and pull-down resistors on the bus, a certain level of the bus can be ensured when it is idle, avoiding the occurrence of uncertain state. Resistors R7 and R8 are matching resistors (resistance of 120 ohms), which can prevent the reflection and ringing phenomenon caused by impedance mismatch during signal transmission (reflection is the phenomenon that part of the signal bounces back when the signal encounters impedance discontinuity during transmission. Ringing is a phenomenon formed by multiple reflections and attenuations of reflected signals on the transmission line. ), thereby improving the quality of the signal and the stability of the transmission.
[0020] The basic principle and main features of the present application and the advantages of the present application are shown and described above. For those skilled in the art, it is obvious that the present application is limited to the details of the above exemplary embodiments, and can be realized in other specific forms without departing from the spirit or basic characteristics of the present application. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting, and the scope of the present application is defined by the appended claims rather than the above description, and therefore all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present application.
[0021] In addition, it should be understood that, although the present application is described in the form of an embodiment, the embodiment does not only contain one independent technical solution, and the description manner of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in the embodiments can also be appropriately combined to form other embodiments that those skilled in the art can understand.
Claims
1. A high rate 485 transceiver isolation circuit comprising a power module, characterized in that, It also has protection circuit, isolation circuit, 485 signal transceiver circuit; the protection circuit, data transceiver circuit, 485 signal transceiver circuit has two ways respectively, protection circuit, isolation circuit, 485 signal transceiver circuit and power module are installed in the component box; the power output end of the power module and the power input end of two protection circuits, isolation circuits, 485 signal transceiver circuits are electrically connected; the signal interaction end of the two protection circuits and the first signal interaction end of the two 485 signal transceiver circuits are electrically connected respectively, the signal port of the two protection circuits and the signal port of the signal input device, signal receiving device are electrically connected respectively, the signal interaction port of the two isolation circuits and the second signal interaction end of the two 485 signal transceiver circuits are electrically connected respectively.
2. A high speed 485 transceiver isolation circuit according to claim 1, wherein, The protection circuit comprises a protection diode and a resistor which are electrically connected, and the output end of the protection diode is connected with one end of the resistor.
3. A high speed 485 transceiver isolation circuit according to claim 1, wherein, The first isolation circuit comprises a resistor, a triode and a high-speed optocoupler isolation chip which are electrically connected, the anode of the high-speed optocoupler isolation chip is connected with one end of the first resistor, the cathode of the high-speed optocoupler isolation chip is connected with the emitter of the triode, the base of the triode is connected with one end of the second resistor, the other end of the second resistor and one end of the third resistor are connected, the other end of the third resistor is connected with the other end of the first resistor, the positive power input end of the high-speed optocoupler isolation chip and one end of the fourth resistor, the output end and the negative power input end of the high-speed optocoupler isolation chip are connected with the other end of the fourth resistor and the collector of the triode.
4. A high speed 485 transceiver isolation circuit according to claim 1, wherein, The second isolation circuit comprises a resistor, a triode and a high-speed optocoupler isolation chip which are electrically connected, the anode of the high-speed optocoupler isolation chip is connected with one end of the first resistor, the cathode of the high-speed optocoupler isolation chip is connected with the emitter of the triode, the base of the triode is connected with one end of the second resistor, the other end of the second resistor and one end of the third resistor are connected, the other end of the third resistor is connected with the other end of the first resistor, the positive power input end of the high-speed optocoupler isolation chip and one end of the fourth resistor, the output end of the high-speed optocoupler isolation chip is connected with the other end of the fourth resistor, the negative power input end of the high-speed optocoupler isolation chip is connected with the collector of the triode.
5. A high speed 485 transceiver isolation circuit according to claim 1, wherein, The 485 signal transceiver circuit comprises a 485 chip and a resistor which are electrically connected, the RE port and the SHON port, the VCC port and one end of the first resistor of the 485 chip are connected, the other end of the first resistor is connected with the A port of the 485 chip, the B port of the 485 chip is connected with one end of the second resistor, the other end of the second resistor is connected with the GND port of the 485 chip. 6. A high speed 485 transceiver isolation circuit according to claim 1, wherein, The model of the high-speed optocoupler isolation chip is TLP2362, and the model of the 485 chip is MAX13487.