Package structure
By improving the redistribution layer design and process flow in the FOCoS-B packaging structure, C4 bumps are formed first, which solves the warpage problem after top wafer packaging and achieves a high-yield and reliable packaging structure with no yield loss.
Patent Information
- Application Number
- CN202422648511.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-30
- Publication Date
- 2025-10-28
- Estimated Expiration
- 2034-10-30
AI Technical Summary
The existing FOCoS-B packaging structure has a warping problem during the debonding process after the top chip is packaged, which leads to poor uniformity of C4 bump plating and affects yield, especially making it difficult to achieve zero defects in mass production.
The design of the redistribution layer was changed. C4 bumps were formed before the top die was packaged, and the concept of build-up was adopted to reduce warpage and improve the yield of the package structure by forming a bottom redistribution structure on the bottom package.
By improving the design and process flow of the redistribution layer, warpage issues are avoided, ensuring 0% yield loss, improving the reliability and yield of the packaging structure, and ensuring the reliability of the C4 bump.
Smart Images
Figure CN223487053U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power device technology, and more specifically, to a packaging structure. Background Technology
[0002] For FOCoS-B (fan-out chip on substrate using bridging chips), the C4 process (controlled collapse chip interconnect technology) is typically performed after the top chip assembly and debonding in the current process flow. This can lead to warpage issues or yield losses in FOCoS-B, thus affecting the quality of the die. See details... Figure 1A and Figure 1B In the current FOCoS-B 10 manufacturing process, such as Figure 1A As shown, the bridging chip 13 is disposed on the carrier 11 via the lower redistribution structure 15 and encapsulated with the encapsulation layer 17. Then, the top wafer 12 is disposed above the bridging chip 13 via the upper redistribution structure 14 and encapsulated with the encapsulation layer 16. The lower redistribution structure 15 can be connected to the upper redistribution structure 14 via through-holes 18. After encapsulating the top wafer 12 with the encapsulation layer 16, a top package 12' is formed. Next, see... Figure 1B The carrier 11 is debonded, and then the C4 process is performed to form the C4 bump 19. The C4 bump 19 is then encapsulated by the encapsulation layer 20 to form the FOCoS-B 10.
[0003] As can be seen, in the existing technology, the carrier 11 is debonded after the top wafer 12 is packaged, and then the C4 process is performed to form the C4 bump 19. Due to the warpage problems W1 and W2 of the top package 12' (caused by CTE (coefficient of thermal expansion) mismatch), the electroplating uniformity of the C4 bump 19 is poor, resulting in a yield loss of FOCoS-B 10.
[0004] Therefore, warpage issues or yield losses can affect the C4 bump 19 layer of a good die. Specifically, regarding warpage issues, it is necessary to measure different dielectric layers or compounds such as PI (polyimide) to examine the warpage performance after debonding of the carrier 11, such as glass; regarding the yield loss of affected good dies, it is difficult to achieve zero defects per wafer at current low DPW (used to characterize the number of diced dies on a single wafer) or large FO (fan-out) sizes. Based on this, the current yield trend of the C4 bump 19 of FOCoS-B 10 is: 99.3% for HVM (high-volume production) (FOCoS-CL (fan-out chip on a substrate)), and 97.9% for the finished product of the package structure (FOCoS-B 10). Utility Model Content
[0005] To address the aforementioned issues, this application improves the yield of the corresponding packaging structure and reduces warpage by modifying the design of the redistribution layer. Furthermore, this application changes the C4 process flow from after top die assembly and debonding to before top die assembly, thereby improving the C4 process flow, reducing warpage of the corresponding packaging structure, and ultimately increasing the yield of the corresponding packaging structure.
[0006] Some embodiments of this application provide a packaging structure, including: a bottom package having a first surface and a second surface opposite to the first surface, wherein the bottom package includes a first redistribution structure adjacent to the first surface and a second redistribution structure adjacent to the second surface; a first solder disposed below the first redistribution structure; a second solder disposed above the second redistribution structure; a first interlayer metal compound disposed between the first solder and the first redistribution structure; and a second interlayer metal compound disposed between the second solder and the second redistribution structure, wherein a first internal via in the first redistribution structure and a second internal via in the second redistribution structure taper in the same direction, and wherein the thickness of the first interlayer metal compound is greater than the thickness of the second interlayer metal compound.
[0007] In some embodiments, the first internal through-hole in the first redistribution structure and the second internal through-hole in the second redistribution structure taper in the direction toward the first solder.
[0008] In some embodiments, the percentage of the first interlayer metal compound to the thickness of the first solder is greater than the percentage of the second interlayer metal compound to the thickness of the second solder.
[0009] In some embodiments, a bridging pipe core is provided between the first redistribution structure and the second redistribution structure.
[0010] In some embodiments, the packaging structure further includes: a plurality of top dies disposed above the second redistribution structure, wherein the plurality of top dies communicate signals through the bridge dies.
[0011] In some embodiments, the package structure further includes: a first bump for connecting the first solder to the first redistribution structure; and a second bump for connecting the second solder to the second redistribution structure.
[0012] In some embodiments, the coverage area of the first bump on the surface of the first redistribution structure is greater than the coverage area of the second bump on the surface of the second redistribution structure.
[0013] In some embodiments, the encapsulation structure further includes a first molding compound disposed between the first redistribution structure and the second redistribution structure.
[0014] In some embodiments, the packaging structure further includes a through-hole extending through the first molding compound, the through-hole electrically connecting the first redistribution structure to the second redistribution structure.
[0015] In some embodiments, the packaging structure further includes a second molding compound disposed above the bottom package and sealing the plurality of top dies.
[0016] In some embodiments, a deep trench capacitor is further provided between the first redistribution structure and the second redistribution structure.
[0017] In some embodiments, the deep trench capacitor is disposed around the bridge connector core.
[0018] In some embodiments, the packaging structure further includes a substrate disposed below the first redistribution structure.
[0019] In some embodiments, the packaging structure further includes a first underfill material disposed between the first redistribution structure and the substrate, and sealing the first solder.
[0020] In some embodiments, the package structure further includes a second underfill material disposed between the plurality of top dies and the second redistribution structure, and sealing the second solder.
[0021] In some embodiments, the top surface of the second molding compound is flush with the top surface of the plurality of top dies.
[0022] In some embodiments, the plurality of top dies are connected to the second redistribution structure via the second solder.
[0023] Other embodiments of this application provide a packaging structure, including: a bottom package having a first redistribution structure disposed at the bottom of the bottom package and a second redistribution structure disposed at the top of the bottom package; a first bump disposed on a surface of the first redistribution structure away from the second redistribution structure; and a second bump disposed on a surface of the second redistribution structure away from the first redistribution structure, wherein a first internal through-hole in the first redistribution structure and a second internal through-hole in the second redistribution structure taper in the same direction, and wherein the coverage area of the first bump on the surface of the first redistribution structure is larger than the coverage area of the second bump on the surface of the second redistribution structure.
[0024] In some embodiments, the packaging structure further includes: a first solder disposed below the first redistribution structure; a second solder disposed above the second redistribution structure; a first interlayer metal compound disposed between the first solder and the first bump; and a second interlayer metal compound disposed between the second solder and the second bump, wherein the thickness of the first interlayer metal compound is greater than the thickness of the second interlayer metal compound.
[0025] In some embodiments, the first internal through-hole in the first redistribution structure and the second internal through-hole in the second redistribution structure taper toward the first protrusion.
[0026] The design of the first and second redistribution structures, as well as the first and second interlayer metal compounds, in the packaging structure provided in this application improves the yield of the corresponding packaging structure and reduces the warpage of the packaging structure, thereby improving the reliability of the packaging structure. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figures 1A to 1B The packaging structure in the prior art is shown.
[0029] Figure 2A and Figure 2B The packaging structure of some embodiments of this application is shown.
[0030] Figures 3 to 17 The process flow of the packaging structure of some embodiments of this application is shown. Detailed Implementation
[0031] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art are within the scope of protection of this application. In addition, when using terms such as "approximately," "about," "substantial," or "basically" to describe numerical values or numerical ranges, unless otherwise stated, the term is intended to cover values within ±10% of the described value. For example, the term "about 5nm" covers a size range from 4.5nm to 5.5nm.
[0032] The following disclosure provides numerous different embodiments or instances for implementing various features of the provided subject matter. Specific examples of elements and arrangements will be described below to simplify the present invention. These are merely examples and are not intended to limit the present invention. For example, in the following description, forming a first component above or on a second component may include embodiments where the first and second components are in direct contact, or embodiments where an additional component is formed between the first and second components such that the first and second components are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in various instances of the present invention. Such repetition is merely for brevity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.
[0033] This application improves the yield of the corresponding packaging structure by changing the configuration of the redistribution layer. Furthermore, this application forms the C4 bump before the top die is packaged and utilizes the concept of "build-up," that is, forming the bottom redistribution structure first to form the bottom package. This is completely different from the prior art, where the redistribution structure is formed on the top and bottom surfaces of the bottom package after completion. In addition, the implementation of the build-up concept in this application can reduce the number of transfer mountings and maintain process yield.
[0034] See also Figure 2A and Figure 2B , Figure 2A The packaging structure of some embodiments of this application is shown, and Figure 2B Shown Figure 2A An enlarged view of region A of the encapsulation structure shown. Referring to FIG. 2, some embodiments of this application provide an encapsulation structure 100, including: a bottom encapsulation 130 having a first surface 130a and a second surface 130b opposite to the first surface 130a, wherein the bottom encapsulation 130 includes a first redistribution structure 105 (also referred to as a bottom redistribution structure) adjacent to the first surface 130a and a second redistribution structure 104 (also referred to as a top redistribution structure) adjacent to the second surface 130b. Further, see FIG. Figure 2B An enlarged view of region A shows that the package structure 100 further includes a first solder 109 disposed below the first redistribution structure 105 and a second solder 121 disposed above the second redistribution structure 104. Further, a first interlayer metal compound 122 is disposed between the first solder 109 and the first redistribution structure 105, and a second interlayer metal compound 124 is disposed between the second solder 121 and the second redistribution structure 104. Further, in the above-described package structure 100, the first internal via 105V in the first redistribution structure 105 and the second internal via 104V in the second redistribution structure 104 taper towards the same direction D, that is, in... Figure 2A and Figure 2BIn the cross-sectional view shown, the widths of the first internal via 105V and the second internal via 104V in direction E gradually decrease in direction D. In other words, the first internal via 105V in the first redistribution structure 105 and the second internal via 104V in the second redistribution structure 104 taper in direction D toward the first solder 109. In a further embodiment, the first internal via 105V are connected to each other through a first metal line 105M in the first redistribution structure 105, and the first internal via 105V and the first metal line 105M are respectively embedded in the corresponding dielectric layer 105P. Similarly, the second internal via 104V are proportionally connected through a second metal line 104M in the second redistribution structure 104, and the second internal via 104V and the second metal line 104M are respectively embedded in the corresponding dielectric layer 104P. In some embodiments, the first internal via 105V and the second internal via 104V, as well as the first metal line 105M and the second metal line 104M, comprise metals, such as but not limited to copper, gold, silver, etc., and the dielectric layers 105P and 104P include, but are not limited to, dielectric materials such as polyimide.
[0035] Furthermore, the thickness h1 of the first interlayer metal compound 122 is greater than the thickness h2 of the second interlayer metal compound 124. Specifically, the thickness h1 of the first interlayer metal compound 122 in direction D is greater than the thickness h2 of the second interlayer metal compound 124 in direction D. In a further embodiment, the percentage of the first interlayer metal compound 122 in the thickness h3 of the first solder 109 is greater than the percentage of the second interlayer metal compound 124 in the thickness h4 of the second solder 121. That is, the thickness of the first interlayer metal compound 122 in the first pad 109 and the corresponding percentage are both larger, and the thickness extending into the first pad 109 is much greater than the thickness of the second interlayer metal compound 124 extending into the second solder 121.
[0036] Reference Figure 2A and Figure 2B The packaging structure 100 further includes a first bump 111 and a second bump 120, wherein the first bump 111 connects the first solder 109 to the first redistribution structure 105, and the second bump 120 connects the second solder 121 to the second redistribution structure 104. In a further embodiment, the coverage area of the first bump 111 on the surface of the first redistribution structure 105 is larger than the coverage area of the second bump 120 on the surface of the second redistribution structure 104. In some embodiments, in Figure 2BIn the cross-sectional view shown, the width of the first bump 111 in direction E is greater than the width of the second bump 120 in direction E. Further, the second solder 121 is further connected to the top die 102 via metal pillars 123, and the plurality of top dies 102 are connected to the second redistribution structure 104 via the second solder 121. In some embodiments, the first interlayer metal compound 122 and the second interlayer metal compound 124 respectively comprise metal alloys formed by the respective first solder 109 and the respective first bump 111, and the second solder 121 and the respective second bump 120. For example, in embodiments where the first bump 111 and the second bump 120 are made of copper, the first interlayer metal compound 122 and the second interlayer metal compound 124 may comprise a copper-tin alloy.
[0037] Continue to refer to Figure 2A A bridging pipe core 103 is provided between the first redistribution structure 105 and the second redistribution structure 104. In some embodiments, other active or passive devices are also provided between the first redistribution structure 105 and the second redistribution structure 104, such as... Figure 2A The deep trench capacitor 113 shown can also be any other suitable device. Further, the deep trench capacitor 113 is disposed around the bridging connector core 103. The deep trench capacitor 113 has a through-hole 113V extending through it to electrically connect to the first redistribution structure 105 and the second redistribution structure 104. In some embodiments, the bridging connector core 103 is bonded to the first redistribution structure 105 via a corresponding adhesive layer 117 and connected to the second redistribution structure 104 via a metal layer 118 on its surface and a corresponding metal pillar 119. For the deep trench capacitor 113, it is connected to the second redistribution structure 104 via the through-hole 113V and to the first redistribution structure 105 via solder 114 and a corresponding metal bump 125. In some embodiments, the through-hole 113V, the metal layer 118, and the corresponding metal pillar 119 are included, but are not limited to, metals, metal alloys, such as copper.
[0038] In some embodiments, the package structure 100 further includes a plurality of top dies 102 disposed above the second redistribution structure 104, wherein the plurality of top dies 102 communicate signals through bridge dies 103, that is, the signals of the top dies 102 are transmitted to the bridge dies 103 through the second redistribution structure 104, and the bridge dies 103 are then transmitted back to the top dies 102 through the second redistribution structure 104. In some embodiments, the top dies 102 may include, but are not limited to, integrated circuit dies.
[0039] Furthermore, the encapsulation structure 100 also includes a first molding compound 107 disposed between the first redistribution structure 105 and the second redistribution structure 104. Figure 2A As can be seen, the first molding compound 107 further encapsulates the bridging die 103 and the corresponding deep trench capacitor 113 therein. The encapsulation structure 100 also includes a through-hole 108 extending through the first molding compound 107, which electrically connects the first redistribution structure 105 to the second redistribution structure 104. In some embodiments, the through-hole 108 is disposed around the bridging die 103 and the deep trench capacitor 113. Figure 2A It can also be seen that the encapsulation structure 100 further includes a second molding compound 106, which is disposed above the bottom encapsulation 130 and seals the plurality of top dies 102 to form a top encapsulation 102'. In some embodiments, the top surface 106t of the second molding compound 106 is flush with the top surface 102t of the plurality of top dies 102. In some embodiments, the first molding compound 107 and the second molding compound 106 include, but are not limited to, molding compounds, underfills, etc. In some embodiments, the through-hole 108 includes, but is not limited to, metals, metal alloys, such as copper.
[0040] Furthermore, the packaging structure 100 also includes a substrate 115 disposed below the first redistribution structure 105, which may be a direct copper-clad ceramic substrate. In some embodiments, the substrate 115 may include a core layer 115C and a metal layer 115M disposed on the opposing surface of the core layer 115C. Figure 2A As can be seen, the first solder 109 is connected to the metal pad 115l in the metal layer 115. Furthermore, pads 115P and corresponding external connectors 116 are formed on the surface of the substrate 115 opposite to the first solder 109. In some embodiments, the metal layer 115M, metal pads 115l, and pads 115P include, but are not limited to, metals such as copper. In some embodiments, the external connectors 116 include, but are not limited to, solder balls. In this application, the first solder 109, the first bump 111, and the corresponding first interlayer metal compound 122 form a C4 (Controlled Collapse Chip Connection) bump. In this application, the C4 bump can have a robust first interlayer metal compound (IMC) 122, which can improve its reliability and prevent warping of the corresponding package structure 100.
[0041] Reference Figure 2AThe package structure 100 further includes a first underfill 110 disposed between the first redistribution structure 105 and the substrate 115 to seal the corresponding first solder 109 and first bump 111. Further, the package structure 100 also includes a second underfill 112 disposed between the plurality of top dies 102 and the second redistribution structure 104, thereby sealing the second solder 121 and the corresponding metal pillars 123, second bumps 120, and second interlayer metal compound 124. In some embodiments, the first underfill 110 and the second underfill 112 may be made of the same or different materials.
[0042] This application improves the yield of the packaging structure 100 and reduces the warpage of the structure 100 by designing the corresponding internal vias in the first redistribution structure 105 and the second redistribution structure 104 in the packaging structure 100, as well as the corresponding first interlayer metal compound 122 and the second interlayer metal compound 124.
[0043] Other embodiments of this application also provide a packaging structure 100, see [link to relevant documentation] Figure 2A and Figure 2B The encapsulation structure 100 includes a bottom encapsulation member 130, which has a first redistribution structure 105 disposed at the bottom of the bottom encapsulation member 130 and a second redistribution structure 104 disposed at the top of the bottom encapsulation member 130. See also Figure 2B The encapsulation structure 100 further includes a first bump 111 and a second bump 120. The first bump 111 is disposed on the surface of the first redistribution structure 105 away from the second redistribution structure 104, and the second bump 120 is disposed on the surface of the second redistribution structure 104 away from the first redistribution structure 105. Furthermore, the first internal through-hole 105V in the first redistribution structure 105 and the second internal through-hole 104V in the second redistribution structure 104 taper towards the same direction D, that is, in Figure 2A and Figure 2B In the cross-sectional view shown, the widths of the first inner through-hole 105V and the second inner through-hole 104V in direction E gradually decrease in direction D. In other words, the first inner through-hole 105V in the first redistribution structure 105 and the second inner through-hole 104V in the second redistribution structure 104 taper towards the first protrusion 111 in direction D. In a further embodiment, the coverage area of the first protrusion 111 on the surface of the first redistribution structure 105 is larger than the coverage area of the second protrusion 120 on the surface of the second redistribution structure 104. In some embodiments, in Figure 2BIn the cross-sectional view shown, the width of the first bump 111 in direction E is greater than the width of the second bump 120 in direction E. In some embodiments, the package structure 100 further includes a first solder 109 disposed below the first redistribution structure 105 and a second solder 121 disposed above the second redistribution structure 104. Further, a first interlayer metal compound 122 is disposed between the first solder 109 and the first redistribution structure 105, and a second interlayer metal compound 124 is disposed between the second solder 121 and the second redistribution structure 104. In some specific embodiments, the thickness h1 of the first interlayer metal compound 122 is greater than the thickness h2 of the second interlayer metal compound 124; specifically, the thickness h1 of the first interlayer metal compound 122 in direction D is greater than the thickness h2 of the second interlayer metal compound 124 in direction D.
[0044] In summary, the packaging structure 100 provided in this application avoids warpage issues and has 0% yield loss, thus ensuring good die yield. For FOCoS-B, the packaging structure 100 ensures 0% yield loss without affecting die performance or yield, and the C4 bump has a robust IMC layer (first interlayer metal compound 122) to resist reliability testing, thereby improving the reliability of the corresponding packaging structure 100 and avoiding warpage of the corresponding packaging structure 100.
[0045] Next, refer to Figures 3 to 13 as well as Figures 14 to 17 To describe Figure 2A Different manufacturing processes for the package structure 100 shown.
[0046] First refer to Figures 3 to 13 Let me introduce Figure 2A The first process flow of the packaging structure 100 shown.
[0047] Reference Figure 3A carrier 1001 is provided thereon having a buffer layer 1002 and an adhesive layer 1003 disposed thereon. In some embodiments, the carrier 1001 may be a glass carrier, a ceramic carrier, etc. The buffer layer 1002 may be formed from any suitable buffer material in the art. The adhesive layer 1003 may be formed from a polymer-based material, which may be removed together with the carrier 1001 from the above structure formed in a subsequent step. In some embodiments, the adhesive layer 1003 is a heat-release material based on epoxy resin, such as a photothermal conversion (LTHC) release coating, which loses its adhesiveness upon heating. In other embodiments, the adhesive layer 1003 may be a UV adhesive, which loses its adhesiveness upon exposure to UV light. The adhesive layer 1003 may be dispensed in liquid form and cured, and may be a laminated film, etc., laminated on the carrier 1001. Further, a patterned metal layer 1004 is formed on the adhesive layer 1003, which may be formed by processes such as physical vapor deposition, chemical vapor deposition, etc., to form a patterned metal layer 1004 such as copper.
[0048] Subsequently, a first redistribution structure 105 is formed on the patterned metal layer 1004. This first redistribution structure 105 has a plurality of dielectric layers 105P and a first internal via 105V and a first metal line 105M embedded within the dielectric layers 105P. In some embodiments, the dielectric layers 105P are formed from polymers such as polybenzoxazole (PBO), polyimide, benzocyclobutene (BCB), etc. In other embodiments, the dielectric layers 105P are formed from nitrides, such as silicon nitride; oxides, such as silicon oxide, phosphosilicate glass (PSG), borosilicate glass (BSG), boron-doped phosphosilicate glass (BPSG), etc. The dielectric layer 105P can be formed by any acceptable deposition process such as spin coating, chemical vapor deposition (CVD), lamination, or combinations thereof. The first internal via 105V and the first metal line 105M are formed in the dielectric layers 105P. In some embodiments, a first internal via 105V and a first metal line 105M, made of metal, can be formed in the dielectric layer 105P using electroplating, electroless plating, or damascene processes commonly used in the art. The metal may include copper, titanium, tungsten, aluminum, etc. As an example of forming the first metal line 105M, a seed layer (not shown) can be formed above the dielectric layer 105P. In some embodiments, the seed layer is a metal layer, which may be a single layer or a composite layer comprising multiple sublayers formed of different materials. In some embodiments, the seed layer includes a titanium layer and a copper layer located above the titanium layer. The seed layer can be formed using, for example, PVD. Subsequently, photoresist is formed and patterned on the seed layer. The photoresist can be formed by spin coating or the like and can be exposed to light for patterning. The pattern of the photoresist corresponds to the first metal line 105M. The patterning forms openings through the photoresist to expose the seed layer. A conductive material is formed in the openings of the photoresist and on the exposed portions of the seed layer. The conductive material can be formed by plating, such as electroplating or electroless plating. The conductive material may include metals such as copper, titanium, tungsten, and aluminum. Then, the portion of the photoresist and seed layer on which no conductive material is formed is removed. The photoresist can be removed by an acceptable ashing or stripping process (such as using oxygen plasma). Once the photoresist is removed, the exposed portion of the seed layer is removed by an acceptable etching process (such as wet or dry etching). The remaining portion of the seed layer and the conductive material form the first metal line 105M. Similarly, the corresponding first internal via 105V can be formed using the same method. Furthermore, the number of dielectric layers 105P, first internal vias 105V, and first metal lines 105M formed can be determined according to the actual situation until a first redistribution structure 105 of the desired thickness is formed. In this embodiment, the first redistribution structure 105 is formed as a 3P2M structure (three dielectric layers 105P and two metal line layers (two layers of metal lines 105M)).
[0049] Reference Figure 4Through-holes 108 and metal bumps 125 are formed over the first redistribution structure 105 using plating or deposition processes such as electroless plating or electroplating. In some embodiments, the through-holes 108 and metal bumps 125 are made of a metal such as copper. Further, the through-holes 108 are higher than the metal bumps 125.
[0050] Reference Figure 5 Using flip-chip bonding (FCB) technology, the bridging core 103 is attached to the microformed through-hole 108 and metal bump 125 of the first redistribution structure 105 via an adhesive layer 117, and the deep trench capacitor 113 is connected to the first redistribution structure 105 via solder 114 and the corresponding metal bump 125. Figure 5 As can be seen, a metal layer 118 and corresponding metal pillars 119 are formed on the surface of the bridge pipe core 103 for subsequent connection.
[0051] Next, see Figure 6 The first molding compound 107 is formed by a molding process, for example, by compression molding onto the bridge connector core 103 and the deep trench capacitor 113. In some embodiments, the first molding compound 107 is a molding compound, a polymer, an epoxy resin, a silica filler, or a combination thereof. A curing step may be performed to cure the first molding compound 107, wherein curing may be thermosetting, UV curing, or a combination thereof. After the first molding compound 107 is formed, the metal pillars 119 and the through holes 108 may be exposed by a grinding process.
[0052] See also Figure 7 A second redistribution structure 104 is formed above the bridging core 103, the deep trench capacitor 113, and the first molding compound 107. The first redistribution structure includes a second internal via 104V and a second metal line 104M embedded in the dielectric layer 104P. In this embodiment, the second redistribution structure 104 is formed as a 4P3M structure (four dielectric layers 104P and three metal line layers (layers of three metal lines 104M)). Further as... Figure 7 As shown, a second bump 120 is formed on the second redistribution structure 104, and in some embodiments, the second bump 120 is made of copper.
[0053] See also Figure 8 The carrier 1005, on which the buffer layer 1006 and the adhesive layer 1007 are formed, is attached to Figure 7The resulting structure is then detached from the carrier 1001 by physical peeling or photosensitive action, thereby removing the carrier 1001. In some embodiments, the carrier 1005, buffer layer 1006, and adhesive layer 1007 are the same as or similar to the carrier 1001, buffer layer 1002, and adhesive layer 1003 described above, and will not be described in detail here.
[0054] See also Figure 9 ,Will Figure 8 The structure shown is flipped so that a patterned metal layer 1004 (such as a copper layer) and the copper-plated metal layer thereon are transformed into first bumps 111 through electroplating or electroless plating processes and corresponding etching processes. Then, first solder 109 is formed on each of the respective first bumps 111, such as through deposition and reflow processes. Further, the first solder 109, the first bumps 111, and the first interlayer metal compound 122 present therebetween form C4 (Controlled Collapse Chip Connection) bumps. In this application, forming the C4 bumps in this step improves reliability and prevents warping of the subsequently formed package structure 100.
[0055] See also Figure 10 A protective layer 1010, such as an adhesive layer, is formed on a C4 bump including a first solder 109 and a first bump 111, and a carrier 1008 on which an adhesive layer 1009 is formed is attached to the protective layer 1010. Then, the carrier 1005 is removed by a method similar to that used to remove the carrier 1001.
[0056] Next, see Figure 11 ,Will Figure 10 The structure shown is flipped, and flip-chip bonding (FCB) is used to attach the top die 102 to the second bump 120 on the surface of the second redistribution structure 104 via a second solder 121, thereby attaching the top die 102 to the second redistribution structure 104. After attaching the second redistribution structure 104, a second underfill 112 is formed between the second redistribution structure 104 and the top die 102, surrounding the second solder 121 and the second bump 120. The underfill 112 can be formed by a capillary flow process. In some embodiments, an epoxy resin flux can be used as the underfill. Further, a second molding compound 106 is formed by a molding process, the second molding compound 106 being formed in the same or similar manner as the first molding compound 107, and will not be described in detail here. Figure 11 In the structure shown, the top surface 106t of the second molding compound 106 is higher than the top surface 102t of the top die 102.
[0057] See also Figure 12 The carrier 1008 is removed by a stripping process. See also Figure 13 Flip Figure 12 The structure shown involves removing the protective layer 1010 through a peeling process and partially removing the second molding compound 106 through a back-side grinding process, making the top surface 106t of the second molding compound 106 flush with the top surface 102t of the top die 102. The resulting structure is then sawn to form... Figure 13 The structure shown.
[0058] Finally, as Figure 2A As shown, Figure 13 The resulting structure is attached to the substrate 115, and a first underfill 110 is formed between the substrate 115 and the first redistribution structure 105. Furthermore, external connectors 116, such as solder balls, are formed on the pads 115P on the side of the substrate 115 opposite to the first redistribution structure 105 for external connection, thereby forming… Figure 2A The packaging structure 100 shown is shown.
[0059] Secondly, refer to Figures 14 to 17 Let me introduce Figure 2A The second process flow of the packaging structure 100 shown.
[0060] form Figure 2A The second process flow and reference of the packaging structure 100 shown Figures 3 to 13 The first process flow described is similar, except that the first process flow... Figures 7 to 10 The process steps shown are replaced with Figures 14 to 17 The process steps are shown.
[0061] See also Figure 14 ,exist Figure 6 After the first molding compound 107 is formed, the carrier 1005 on which the buffer layer 1006 and the adhesive layer 1007 are formed is attached to Figure 6 The resulting structure was then processed, and carrier 1001 was removed.
[0062] See also Figure 15 Flip Figure 14 The resulting structure has a first bump 111 and a first solder 109 formed on the first redistribution layer 105. In this application, the first solder 109, the first bump 111, and the first interlayer metal compound 122 present therebetween form a C4 (Controlled Collapse Chip Connection) bump. In this application, forming the C4 bump in this step can improve its reliability and prevent warping of the subsequently formed package structure 100.
[0063] Next, see Figure 16 The carrier 1008 on which the adhesive layer 1009 is formed is attached to Figure 15 The structure shown is used, and carrier 1005 is removed.
[0064] See also Figure 17 ,Will Figure 16 The structure shown is flipped, and a second redistribution structure 104 and a corresponding second bump 120 are formed over the first molding compound 107.
[0065] The following steps are the same as those mentioned above. Figures 11 to 13 The steps described are the same and will not be repeated here, thus forming Figure 2A The packaging structure 100 shown is shown.
[0066] In summary, the first and second process flows of this application change the process flow of the C4 bump from after the assembly and debonding of the top die 102 to before the assembly of the top die 102, thereby avoiding warping of the subsequently formed package structure 100 and improving the corresponding yield. Specifically, for the first process flow of this application, Figures 3 to 7 The difference from existing processes is shown, namely that this application forms the package structure 100 using a C4 bumping process first. For the second process flow of this application, the C4 bumping process is also used first, thereby avoiding warpage of the subsequently formed package structure 100 and increasing the yield of the corresponding package structure 100.
[0067] For large FO PKG (fan-out package structure) (such as sizes 50×50 to 75×75 mm) and tall vias 108 and bridging cores 103 (50 to 80 micrometers) in the IL (spacer) layer, glass carriers 1001, 1005, and 1008 with adhesive layers such as adhesive or buffer layers such as thin films are used for temporary treatment during C4 bump formation and FCB (flip chip bonding) or molding, and also for temporary treatment during FS-RDL (front-side redistribution structure) formation. Furthermore, the use of "glass carriers 1001, 1005, and 1008 with adhesive layers such as adhesive or buffer layers such as thin films" for temporary treatment of FS-RDL is because the chemical resistance of adhesive layers such as adhesive layers is difficult to withstand through multiple thermal and chemical RDL processes; therefore, they are used for temporary treatment.
[0068] In summary, this application forms the C4 bump before forming the top die 102, overcoming the problems existing in the prior art. In addition, this application adopts the build-up concept, that is, the bottom redistribution structure 105 (i.e., the first redistribution structure 105 and optionally the second redistribution structure 104) is processed first to form the bottom package 130, and the build-up concept can reduce the number of assembly steps and maintain process yield.
[0069] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A packaging structure, characterized in that, include: A bottom package having a first surface and a second surface opposite to the first surface, wherein the bottom package includes a first redistribution structure adjacent to the first surface and a second redistribution structure adjacent to the second surface; The first solder is disposed below the first redistribution structure; The second solder is disposed above the second redistribution structure; A first interlayer metal compound is disposed between the first solder and the first redistribution structure; and A second interlayer metal compound is disposed between the second solder and the second redistribution structure. Wherein, the first internal through-hole in the first redistribution structure and the second internal through-hole in the second redistribution structure taper in the same direction, and wherein the thickness of the first interlayer metal compound is greater than the thickness of the second interlayer metal compound.
2. The packaging structure according to claim 1, characterized in that, The first internal through-hole in the first redistribution structure and the second internal through-hole in the second redistribution structure taper in the direction toward the first solder.
3. The packaging structure according to claim 1, characterized in that, The percentage of the first interlayer metal compound in the thickness of the first solder is greater than the percentage of the second interlayer metal compound in the thickness of the second solder.
4. The packaging structure according to claim 1, characterized in that, A bridging pipe core is provided between the first redistribution structure and the second redistribution structure.
5. The packaging structure according to claim 4, characterized in that, Also includes: Multiple top dies are positioned above the second redistribution structure. The plurality of top tube cores communicate with each other via the bridge tube core.
6. The packaging structure according to claim 1, characterized in that, Also includes: The first bump connects the first solder to the first redistribution structure; as well as The second bump connects the second solder to the second redistribution structure.
7. The packaging structure according to claim 6, characterized in that, The coverage area of the first bump on the surface of the first redistribution structure is greater than the coverage area of the second bump on the surface of the second redistribution structure.
8. The packaging structure according to claim 1, characterized in that, Also includes: A first molding compound is disposed between the first redistribution structure and the second redistribution structure.
9. The packaging structure according to claim 8, characterized in that, Also includes: A through-hole extends through the first molded compound, the through-hole electrically connecting the first redistribution structure to the second redistribution structure.
10. The packaging structure according to claim 5, characterized in that, Also includes: A second molding compound is disposed above the bottom package and seals the plurality of top dies.