MBUS master station circuit with low heat loss and low power consumption

Abstract

The utility model discloses an MBUS master station circuit with low heat loss and low power consumption, and relates to the technical field of MBUS. According to the utility model, by optimizing a buck-boost driving cooperation mode of a power supply module in MBUS configuration, a transmitting circuit driven and controlled by a high-efficiency MOS tube is designed, a receiving circuit with strong anti-interference capability, stable signals, low sampling loss and strong load capability is correspondingly designed, and an overcurrent protection circuit and a filter circuit which are stable in operation are designed. The comprehensive problem that the performance of the MBUS master station is affected in traditional MBUS master station configuration is solved, and the operation quality of the MBUS master station is effectively improved.

Description

Technical Field

[0001] This utility model relates to the field of MBUS technology, and in particular to an MBUS master station circuit with low heat loss and low power consumption. Background Technology

[0002] MBUS (Meter Bus) communication is a serial communication protocol specifically designed for smart meters (such as water meters, electricity meters, and gas meters). It enables efficient communication between multiple smart meters and a data acquisition unit or concentrator by transmitting data over low-voltage power lines. MBUS communication is widely used in smart metering systems due to its low cost, high reliability, and ease of installation and maintenance.

[0003] MBUS communication protocol is a master-slave communication method, in which the data acquisition unit or concentrator acts as the master device, responsible for initiating communication requests and receiving response data from the slave devices (smart meters). The slave devices then send corresponding data or perform specific operations based on the master device's requests. MBUS communication uses a half-duplex mode for data transmission.

[0004] Combined with appendix Figure 1 As shown, when the MBus master device sends a logic "1" (Mark) to the slave device, the bus voltage remains at a high Vmark level (≤42V), while when sending a logic "0" (SPACE), the voltage drops significantly by more than 10V, falling to Vspace (≥12V). Conversely, the slave device responds by adjusting the current it draws from the bus to transmit data: when sending a "1", the current remains at a low Imark level (≤1.5mA), while when sending a "0", a pulse current of 11-20mA is superimposed on Imark, i.e., Ispace.

[0005] The master device identifies whether the received data bit is "0" or "1" by monitoring this current change (11-20mA pulse current) on the bus. The slave device, when receiving data, determines whether the data bit is "0" or "1" by checking if the difference between the bus voltage and its internal dynamic reference voltage exceeds 10V. This communication mechanism ensures unidirectional data transmission, whether from the master device to the slave device or vice versa.

[0006] The M-Bus protocol cleverly integrates data transmission with slave device power supply. In the idle state, it defaults to a logic "1", meaning the bus voltage remains at Vmark level. At this time, each slave device draws power from the bus at a current of Imark ≈ 1.5mA, serving as its primary power source for daily operation. This design ensures that the total current on the bus equals Imark multiplied by the total number of slave devices. During communication, it is crucial to ensure that the bus voltage does not fall below Vspace, regardless of whether the bus is idle or transmitting data.

[0007] In the traditional MBUS main station configuration: (in conjunction with the appendix) Figure 2 , Figure 3 Traditional power modules use a DC-DC boost circuit to raise the 12V voltage to around 36V, and then use an LDO linear regulator to lower the 36V voltage to 24V. The LDO linear regulator has a large input-output voltage difference, and when the load is too heavy, the bus current increases, causing serious overheating problems for the LDO linear regulator. (Refer to the appendix) Figure 4 , Figure 5 R29 is a sampling resistor, and R30 is a large resistor. The sampling resistor R29 is close to the power supply terminal for high-side current sensing. Since the voltage is close to the power supply voltage, the selection of the operational amplifier (op-amp) requires high precision. The current signal from the bus is converted into a voltage signal after passing through the sampling resistor R29 and is directly sent to the next stage op-amp U42. Because the sampled current signal is relatively small, the sampling resistor is typically around tens of ohms. When the load is too heavy and the current on the bus increases, the bus voltage will drop significantly, affecting communication. At this time, a significant amount of heat is wasted on the sampling resistor R29.

[0008] In addition, in the traditional MBUS master station configuration, the power supply drive circuit design is relatively complex and consumes a lot of power, the receiving circuit has weak load performance and large heat loss, and the filtering protection circuit and filtering circuit also have stability problems.

[0009] In summary, resolving the comprehensive issues affecting MBUS master station performance in the traditional MBUS master station configuration is the technical foundation for improving the operational quality of MBUS master stations. Utility Model Content

[0010] To address the aforementioned technical problems, this invention provides a low-heat-loss and low-power MBUS master station circuit, thereby solving the comprehensive problems affecting MBUS master station performance in traditional MBUS master station configurations and effectively improving the operational quality of MBUS master stations.

[0011] To achieve the above objectives, the specific details of this utility model are as follows:

[0012] The MBUS master station circuit includes a power supply circuit unit, a transmitting circuit unit, a receiving circuit unit, an overcurrent protection circuit unit, and a filtering circuit unit.

[0013] The power supply circuit unit is equipped with a DC12V power supply circuit, an XL6019 buck-boost integrated circuit connected to the DC12V power supply circuit, and a BL9342 buck switching regulator.

[0014] The transmitting circuit unit is configured with a transistor Q3 connected to the MBUS bus signal receiving terminal MBUS_RX, a MOS transistor Q1 connected to the transistor Q3, a PMOS transistor Q2 connected to the MOS transistor Q1, and a transistor Q4 connected to the PMOS transistor Q2.

[0015] The receiving circuit unit is equipped with a current-sensing differential operational amplifier U1 connected to the MBUS bus electrical signal and a comparator U5B connected to the OUT terminal of the current-sensing differential operational amplifier U1.

[0016] The overcurrent protection circuit unit includes a comparator U5A connected to the output voltage signal of the current-sensing differential operational amplifier U1, and a comparator U3B connected to the output of comparator U5A. Comparator U3B is connected to the base of transistor Q4. The overcurrent protection circuit unit also includes a comparator U3A, whose non-inverting input is connected to a ground loop formed by Zener diode D3 and resistor R15.

[0017] The filter circuit unit is equipped with transistor Q5, R21 and C7 connected to the base of transistor Q5, and an RC circuit composed of transistor Q5, R21 and C7, which is electrically connected to the MBUS bus signal receiving terminal MBUS_RX. The emitter of transistor Q5 is connected to comparator U5B.

[0018] Preferably, in the transmitting circuit unit, the emitters of transistors Q3 and Q4 are directly grounded.

[0019] Preferably, in the transmitting circuit unit, PMOS transistor Q2 is connected to the MBUS+ terminal of the bus through inductor RX1, and PMOS transistor Q2 is connected to the MBUS- terminal through bidirectional diode TVS2 and grounded through inductor RX2.

[0020] Preferably, in the receiving circuit unit, the IN+ terminal of the current sensing differential operational amplifier U1 is connected to the sampling resistor R1, the IN- terminal of the current sensing differential operational amplifier U1 is connected to the sampling resistor R2, and a bidirectional diode TVS1 is connected between the sampling resistor R1 and the sampling resistor R2.

[0021] Preferably, the output circuit of the current sensing differential operational amplifier U1 to the comparator U5A of the overcurrent protection circuit unit is equipped with an RC grounding loop consisting of R28 and C14.

[0022] Preferably, in the overcurrent protection circuit unit, the comparison judgment output power of comparator U3A and comparator U5A both adopt a 12V single power supply.

[0023] Compared with existing technologies, the beneficial effects of this utility model are:

[0024] This invention optimizes the buck-boost drive coordination of the power module in the MBUS configuration, designs a high-efficiency MOSFET-driven transmitting circuit, and correspondingly designs a receiving circuit with strong anti-interference capability, stable signal, low sampling loss and strong load capacity, as well as a stable overcurrent protection circuit and filtering circuit. It solves the comprehensive problems affecting the performance of the MBUS master station in the traditional MBUS master station configuration and effectively improves the operating quality of the MBUS master station. Attached Figure Description

[0025] Figure 1 This is a logical diagram of the MBUS communication method.

[0026] Figure 2 A schematic diagram of the boost circuit configured in a traditional MBUS master station.

[0027] Figure 3 This is a schematic diagram of the signal transmission circuit in a traditional MBUS master station.

[0028] Figure 4 A diagram illustrating the signal sampling method in the configuration of a traditional MBUS master station. Figure 1 .

[0029] Figure 5 A diagram illustrating the signal sampling method in the configuration of a traditional MBUS master station. Figure 2 .

[0030] Figure 6 A schematic diagram of the XL6019 buck-boost integrated circuit in the power module configured for the MBUS master station of this utility model.

[0031] Figure 7 A schematic diagram of the BL9342 step-down switching regulator in the power module configured for the MBUS master station of this utility model.

[0032] Figure 8 A schematic diagram of the power supply circuit unit configured for the MBUS master station of this utility model.

[0033] Figure 9 Schematic diagram of the receiving circuit unit configured for the MBUS master station of this utility model Figure 1 .

[0034] Figure 10 Schematic diagram of the receiving circuit unit configured for the MBUS master station of this utility model Figure 2 .

[0035] Figure 11 Schematic diagram of the overcurrent protection circuit unit configured for the MBUS master station of this utility model Figure 1 .

[0036] Figure 12 Schematic diagram of the overcurrent protection circuit unit configured for the MBUS master station of this utility model Figure 2 .

[0037] Figure 13 A schematic diagram of the filter circuit unit configured for the MBUS master station of this utility model. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0039] Example 1: In the power supply circuit unit of this utility model, the power supply circuit is: DC card slot 12V (in actual application, the input of DC power supply can be 5~40V), boost circuit: 12V to 36V, and buck circuit: 36V to 24V.

[0040] Combination Figure 6 , Figure 7 In this utility model, the power supply circuit unit is configured with either an XL**** integrated circuit chip or a BL**** integrated circuit chip, which can be selected and replaced according to actual needs (the specific integrated circuit chip model is not disclosed in this utility model; the "XL**** integrated circuit chip" and "BL**** integrated circuit chip" used in this utility model are existing integrated circuit chips). XL**** is a monolithic integrated circuit specifically designed for boost and buck-boost circuits, capable of operating within a DC 5V to 40V input voltage range, featuring low ripple and a built-in power MOSFET. XL**** incorporates a fixed-frequency oscillator and frequency compensation circuit, simplifying circuit design. The PWM control loop allows for linear adjustment of the duty cycle from 0 to 90%. It also features built-in overcurrent protection and an EN pin logic level shutdown function.

[0041] XL**** Features: Wide input voltage range of 5V to 40V, single feedback pin controls positive or negative output voltage, current-mode control provides excellent transient response, 1.25V output voltage sampling voltage, fixed 180kHz switching frequency, maximum 5A switching current, built-in overvoltage protection on SW, excellent line and load regulation, TTL shutdown function on EN pin, built-in power MOSFET, conversion efficiency of over 94%, built-in frequency compensation, built-in soft-start function, built-in thermal shutdown function, built-in current limiting function.

[0042] VOUT1=1.25*(1+R5 / R6)=1.25*(1+56 / 2)V=36.25V.

[0043] VOUT2=VFB*(1+R27 / R31)=0.794*(1+150 / 5.1)V=24.15V.

[0044] BL**** Description: The BL**** is a high-frequency (1.8MHz) buck switching regulator with an integrated high-side high-voltage power MOSFET. It provides a maximum single-channel high-efficiency output of 0.6A, achieving fast loop response through current-mode control. A wide input voltage range (4.2V to 40V) enables various buck power conversion applications. Low shutdown current makes it suitable for battery-powered applications. Under light load conditions, it achieves high-efficiency power conversion over a wide load range by reducing switching and gate drive losses through a lower switching frequency. Frequency folding technology helps prevent runaway inductor current during startup. Thermal shutdown provides reliable, fault-tolerant operation.

[0045] BL**** Features: 230uA quiescent current, wide operating voltage range from 4.2V to 40V, 500mΩ internal power MOSFET, 1.8MHz fixed switching frequency, internal compensation, ceramic output capacitor regulation, internal soft start, precision current limiting without sampling resistor, maximum efficiency up to 90%, low shutdown current.

[0046] This utility model's power supply circuit uses 12V as the power supply voltage. First, a DC-DC boost circuit raises the 12V to 36V, then a DC-DC buck circuit lowers the 36V to 24V. Compared to using two separate boost circuits to raise the 12V to 24V and 36V respectively, this method saves costs. Compared to traditional LDO power supply circuits, using a DC-DC power supply circuit effectively reduces the overall power consumption of the data acquisition unit.

[0047] Example 2: In the transmitting circuit unit of this utility model, combined with Figure 8 The transmitting circuit switches the voltage output signal by switching transistor Q3 and MOSFET Q1 on and off. When MBUS_TX is high, transistor Q3 is turned on, the voltage between the gate and source of MOSFET Q1 is greater than the turn-on voltage, the MOSFET is turned on, and the voltage between MBUS+ and MBUS- on the bus is 36V. When MBUS_TX is low, transistor Q3 is turned off, the voltage between the gate and source of MOSFET Q1 is 0V, the MOSFET is turned off, the bus is powered by a 24V power supply, and the voltage between MBUS+ and MBUS- is 24V.

[0048] The transmitting circuit unit in this invention switches the bus voltage by controlling the switching of a MOSFET. The MOSFET has fast switching capability, making the circuit suitable for high baud rate communication. The MOSFET can be controlled by a low-power drive circuit, thereby reducing the power consumption of the control circuit. This simplifies the drive circuit and reduces the complexity of the overall power supply design.

[0049] Example 3: In the receiving circuit unit of this utility model, combined with... Figure 9 , Figure 10 The receiving circuit determines whether a 1 or 0 has been received by detecting an 1-20mA pulse current on the MBUS bus. When a 0 is received, there will be an 11mA-20mA pulse current on the bus, increasing the voltage across the sampling resistor. Since the positive terminal IN+ of the current-sensing differential op-amp is connected to MBUS0- (GND) and the negative terminal IN- is connected to MBUS-, the output MBUS- of the current-sensing differential op-amp will have a certain voltage drop based on the reference voltage VREF. Comparator U5B outputs a low level, transistor Q5 conducts, and MBUS_RX is low. When a 1 is received, comparator U5B outputs a high level, transistor Q5 is cut off, and MBUS_RX is high.

[0050] The receiving circuit unit in this utility model employs low-end current detection, resulting in low common-mode voltage and reduced requirements on the operational amplifier's supply voltage, thus saving costs. Furthermore, the received signal uses a current-sensing operational amplifier to amplify the differential signal, which is independent of the load and improves the circuit's adaptability; it also exhibits strong suppression of common-mode interference and noise, maintaining signal stability. In addition, the sampling resistor is only 0.5Ω, significantly reducing unnecessary heat loss caused by increased bus current under heavy loads. The small sampling resistor reduces the voltage drop across individual loads, eliminating the need for load voltage compensation, simplifying the circuit, and increasing the number of slave devices that can be connected.

[0051] Example 4: In the overcurrent protection circuit unit of this utility model, combined with... Figure 11 , Figure 12 as well as Figure 8 As the load current increases, the output voltage MBUS1- of the current-sensing differential operational amplifier U1 will gradually decrease. Under normal load conditions, comparator U5A outputs a high level, and the RC circuit at the non-inverting input of comparator U3B gradually charges until it exceeds the voltage at the inverting input, at which point U3B outputs a high level; transistor Q4 is turned on, and PMOS transistor Q2 is turned on. Under overcurrent load conditions, comparator U5A outputs a low level, and the capacitor at the non-inverting input of comparator U3B rapidly discharges below the voltage at the inverting input, at which point U3B outputs a low level; transistor Q4 is turned off, and PMOS transistor Q2 is turned off.

[0052] When short-circuited, the voltage at the non-inverting input of comparator U3A is approximately 0V equal to MBUS-, which is lower than the voltage at the inverting input. U3A outputs a low level, and PMOS transistor Q2 is off. When the short-circuit condition is restored, the voltage at the non-inverting input of comparator U3A equals the voltage regulated by Zener diode D3, which is higher than the voltage at the inverting input. U3A outputs a high level, and PMOS transistor Q2 is on.

[0053] The overcurrent protection circuit unit in this invention provides dual protection against overcurrent and short circuit, improving circuit stability. By adjusting the resistance and capacitance values ​​in the RC circuit at the non-inverting input of comparator U3B, the duty cycle for circuit conduction and cutoff during overcurrent can be changed, avoiding the problem of frequent switching of the circuit during overcurrent.

[0054] Example 5: In the filter circuit of this utility model, combined with... Figure 13 When MBUS_TX is high, the base of transistor Q5 is charged through the RC circuit formed by R21 and C7. When the charging voltage is higher than the conduction voltage between the base and emitter of Q5, transistor Q5 conducts. When MBUS_TX is low, capacitor C7 discharges rapidly through D10, and transistor Q5 is cut off. Because the charging time of the RC circuit is much longer than the discharging time, during data transmission, the base of transistor Q5 remains low, Q5 is cut off, and MBUS_RX remains high. This filters out signals that are received by MBUS_RX due to current changes caused by voltage changes on the bus during signal transmission, resulting in high or low outputs from comparator U5B. This solves the problem of self-transmission and self-reception during serial communication.

[0055] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A low-heat-loss, low-power MBUS master station circuit, comprising a power supply circuit unit, a transmitting circuit unit, a receiving circuit unit, an overcurrent protection circuit unit, and a filtering circuit unit, characterized in that: The power supply circuit unit is equipped with a DC12V power supply circuit, an XL6019 buck-boost integrated circuit connected to the DC12V power supply circuit, and a BL9342 buck switching regulator. The transmitting circuit unit is configured with a transistor Q3 connected to the MBUS bus signal receiving terminal MBUS_RX, a MOS transistor Q1 connected to the transistor Q3, a PMOS transistor Q2 connected to the MOS transistor Q1, and a transistor Q4 connected to the PMOS transistor Q2. The receiving circuit unit is equipped with a current sensing differential operational amplifier U1 connected to the MBUS bus electrical signal and a comparator U5B connected to the OUT terminal of the current sensing differential operational amplifier U1. The overcurrent protection circuit unit is configured with a comparator U5A connected to the output voltage signal of the current sensing differential operational amplifier U1 and a comparator U3B connected to the output terminal of the comparator U5A. The comparator U3B is connected to the base of the transistor Q4. The overcurrent protection circuit unit is also equipped with a comparator U3A, the non-inverting input terminal of which is connected to the grounding loop formed by the Zener diode D3 and the resistor R15. The filter circuit unit is equipped with a transistor Q5, R21 and C7 connected to the base of transistor Q5, and an RC circuit composed of transistor Q5, R21 and C7, which is electrically connected to the MBUS bus signal receiving terminal MBUS_RX. The emitter of transistor Q5 is connected to comparator U5B.

2. The MBUS master station circuit with low heat loss and low power consumption according to claim 1, characterized in that: In the transmitting circuit unit, the emitters of transistors Q3 and Q4 are directly grounded.

3. The MBUS master station circuit with low heat loss and low power consumption according to claim 1, characterized in that: In the transmitting circuit unit, the PMOS transistor Q2 is connected to the MBUS+ terminal of the bus through the inductor RX1, and the PMOS transistor Q2 is connected to the MBUS- terminal through the bidirectional diode TVS2 and grounded through the inductor RX2.

4. The MBUS master station circuit with low heat loss and low power consumption according to claim 1, characterized in that: In the receiving circuit unit, the IN+ terminal of the current sensing differential operational amplifier U1 is connected to the sampling resistor R1, the IN- terminal of the current sensing differential operational amplifier U1 is connected to the sampling resistor R2, and a bidirectional diode TVS1 is connected between the sampling resistor R1 and the sampling resistor R2.

5. The MBUS master station circuit with low heat loss and low power consumption according to claim 1, characterized in that: The current sensing differential operational amplifier U1 is configured with an RC grounding loop consisting of R28 and C14 on the output circuit of the comparator U5A of the overcurrent protection circuit unit.

6. The MBUS master station circuit with low heat loss and low power consumption according to claim 1, characterized in that: In the overcurrent protection circuit unit, the comparison judgment output power of comparator U3A and comparator U5A both adopt a 12V single power supply mode.

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