Fusion sensor pixel unit and electronic device

By designing a fusion sensor pixel unit that integrates 4T and 3T pixel unit structures and using a bridging transistor to control the working mode of the photodiode, the image quality problem of existing CMOS image sensors in high-speed motion scenes and low-light environments is solved, achieving high dynamic range and high photosensitivity image acquisition effects.

CN223502957UActive Publication Date: 2025-10-31SPIKE VISION (BEIJING) TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202422685553.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-11-04
Publication Date
2025-10-31
Estimated Expiration
2034-11-04

AI Technical Summary

Technical Problem

Existing CMOS image sensors suffer from low frame rates and blurry images when acquiring images of high-speed moving scenes. When using 3T pixels, the noise is relatively large, and the image signal quality is poor, especially in low-light environments.

Method used

Design a fusion sensor pixel unit including a semiconductor substrate, a bridging transistor, and first and second pixel units. Control the operating modes of different photodiodes through mode control signals to achieve different frame rates and light signal acquisition methods. Integrate 4T and 3T pixel unit structures to expand the scope of application.

Benefits of technology

It improves the image quality of the image sensor in different scenarios, adapts to image acquisition in motion scenarios with different speeds and light intensities, reduces noise, and enhances the output image quality of the image sensor.

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Abstract

The embodiment of the utility model discloses a fusion sensor pixel unit and electronic equipment, and the fusion sensor pixel unit comprises a semiconductor substrate, a bridge transistor, a first pixel unit, and a second pixel unit. The first pixel units are different from the second pixel units; the first pixel unit comprises a first photodiode, a charge transfer transistor and a first output circuit; the first photodiode is connected with the first output circuit through the charge transfer transistor; the second pixel unit comprises a second photodiode and a second output circuit which are connected with each other; the potential well of the first photodiode and the potential well of the second photodiode are different in depth; the bridge transistor, the first photodiode, the charge transfer transistor and the second photodiode are arranged on the semiconductor substrate, and the bridge transistor is used for communicating the first photodiode with the second photodiode.
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Description

Technical Field

[0001] This disclosure relates to the field of sensor technology, and in particular to a fusion sensor pixel unit and electronic device. Background Technology

[0002] Image sensors have been widely used in digital cameras, mobile phones, medical devices, automobiles, drones, and machine recognition, especially with the rapid development of Complementary Metal Oxide Semiconductor (CMOS) image sensor technology, which has led to higher demands on the output image quality of image sensors. CMOS image sensors can be divided into two categories based on their signal acquisition methods: one method involves setting the exposure time for each pixel and then measuring the change in voltage signal; the second method involves setting the voltage change for each pixel and then measuring the exposure time, and this type of image sensor is called a pulse sequence image sensor. During pixel operation, each pixel reset introduces random reset noise, and noise and errors are also introduced into the transmission path of the pixel signal from the pixel readout to the column circuitry. Utility Model Content

[0003] This disclosure provides a fusion sensor pixel unit and an electronic device.

[0004] One aspect of this disclosure provides a fusion sensor pixel unit, including:

[0005] In another aspect of this disclosure, an electronic device is provided, including: a processor, and a memory communicatively connected to the processor, and further including the fusion sensor pixel unit described in any of the above embodiments;

[0006] The memory stores computer-executed instructions;

[0007] The processor executes computer execution instructions stored in the memory to control the fused sensor pixel unit.

[0008] Optionally, the electronic device may be included as any of the following: image data acquisition device, audio / video player, navigation device, entertainment device, communication device, roadside traffic facility, device in motor vehicle, industrial testing device, flight equipment, medical device, security device.

[0009] A fusion sensor pixel unit and electronic device based on the above embodiments of this disclosure include: a semiconductor substrate, a bridging transistor, a first pixel unit, and a second pixel unit; the first pixel unit and the second pixel unit are different; the first pixel unit includes a first photodiode, a charge transfer transistor, and a first output circuit; the first photodiode is connected to the first output circuit through the charge transfer transistor; the second pixel unit includes a second photodiode and a second output circuit connected to each other; the potential well depths of the first photodiode and the second photodiode are different; the bridging transistor, the first photodiode, the charge transfer transistor, and the second photodiode are disposed on the semiconductor substrate, and the bridging transistor is used to connect the first photodiode and the second photodiode. Embodiments of this disclosure control at least one of the first and second photodiodes to collect charge through a mode control signal, thereby achieving the effect achievable when a single photodiode performs photoelectric conversion, and achieving different frame rates through different photodiodes, making the pixel unit suitable for image acquisition in motion scenes with different speeds, and providing a suitable acquisition method for light signals of different intensities; thus expanding the applicability of the pixel unit provided in this embodiment.

[0010] The technical solutions of this disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0011] The accompanying drawings, which form part of this specification, illustrate embodiments of this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0012] This disclosure will become clearer with reference to the accompanying drawings and the following detailed description, wherein:

[0013] Figure 1 This is a schematic diagram of the structure of a fusion sensor pixel unit provided in an exemplary embodiment of the present disclosure;

[0014] Figure 2 This is a schematic diagram of charge generation in a fusion sensor pixel unit provided in another exemplary embodiment of the present disclosure;

[0015] Figure 3 This is a schematic diagram of charge generation in a fusion sensor pixel unit provided in yet another exemplary embodiment of this disclosure;

[0016] Figure 4 This is a planar schematic diagram of a portion of the structure in a fusion sensor pixel unit provided in yet another exemplary embodiment of this disclosure;

[0017] Figure 5 This disclosure also provides a schematic diagram of charge generation in a fusion sensor pixel unit according to an exemplary embodiment;

[0018] Figure 6 This is a schematic diagram of the structure of a fusion sensor pixel unit provided in yet another exemplary embodiment of this disclosure;

[0019] Figure 7 This is a schematic diagram of the structure of an application embodiment of the electronic device disclosed herein. Detailed Implementation

[0020] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the present disclosure.

[0021] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of this disclosure are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them.

[0022] It should also be understood that in the embodiments disclosed herein, "a plurality of" may refer to two or more, and "at least one" may refer to one, two or more.

[0023] It should also be understood that any component, data or structure mentioned in the embodiments of this disclosure can generally be understood as one or more unless expressly defined or given to the contrary in the context.

[0024] Furthermore, the term "and / or" in this disclosure is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this disclosure generally indicates that the preceding and following related objects have an "or" relationship.

[0025] It should also be understood that the description of the various embodiments in this disclosure emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0026] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0027] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use.

[0028] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0029] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0030] This disclosure can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate with a wide range of other general-purpose or special-purpose computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments, and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, and servers include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments including any of the above systems, etc.

[0031] Electronic devices such as terminal devices, computer systems, and servers can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Typically, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in distributed cloud computing environments, where tasks are executed by remote processing devices linked through communication networks. In distributed cloud computing environments, program modules can reside on local or remote computing system storage media, including storage devices.

[0032] In developing this disclosure, the inventors discovered that existing image sensor pixels can be categorized into two types based on the method of acquiring image signals: conventional pixels and pulse pixels. Conventional pixels are more common and are referred to as 4T pixels; pulse pixels, used in image acquisition for high-speed motion scenes, are referred to as 3T pixels. When existing image sensors use 4T pixels, the frame rate is low, typically around 30 FPS, leading to image projection blurring when acquiring images of high-speed motion scenes. While existing image sensors using 3T pixels offer a higher frame rate, resolving the blurring issue in high-speed motion scenes, the image noise is poor, especially in low-light environments where the image acquisition signal quality is not as good as that of 4T pixels. To address these issues, this disclosure provides a novel fusion sensor pixel unit structure to solve the problems associated with independent 4T and 3T pixel units.

[0033] Figure 1 This is a schematic diagram of the structure of a fusion sensor pixel unit provided in an exemplary embodiment of this disclosure. Figure 1As shown, the fusion sensor pixel unit of this embodiment includes: a semiconductor substrate 11, a bridging transistor 100, a first pixel unit 12 and a second pixel unit 13; the first pixel unit 12 and the second pixel unit 13 are different.

[0034] The first pixel unit 12 includes a first photodiode 111, a charge transfer transistor 115, and a first output circuit 120; the first photodiode 111 is connected to the first output circuit 120 through the charge transfer transistor 115.

[0035] The second pixel unit 13 includes a second photodiode 101 and a second output circuit 130 that are interconnected; the potential well of the first photodiode 12 and the potential well of the second photodiode 101 have different depths.

[0036] A bridging transistor 100, a first photodiode 111, a charge transport transistor 115, and a second photodiode 101 are disposed on a semiconductor substrate 11. The bridging transistor 100 is used to connect the first photodiode 111 and the second photodiode 101.

[0037] Optionally, in this embodiment, by placing the first photodiode 111, the second photodiode 101, and the bridging transistor 100 on the same semiconductor substrate, the area of ​​the pixel unit is reduced. Since the potential well depths of the first photodiode and the second photodiode are different, and a bridging transistor is placed between the first photodiode and the second photodiode, a potential difference can be formed between the two photodiodes when the bridging transistor is turned on, thereby causing photoelectric charge to flow and forming different operating modes of the first photodiode and the second photodiode.

[0038] By controlling at least one of the first and second photodiodes with a mode control signal to perform photoelectric conversion, the accumulated photoelectric charge is obtained.

[0039] Optionally, in this embodiment, the mode control signal controls the bridge transistor and the corresponding reset signals of the first and second photodiodes. Optionally, the timing of the mode control signal can be determined by timing editing through an external control circuit. The mode control signal includes at least one control signal, such as: a switch control signal controlling whether the bridge transistor is turned on, a first reset signal controlling whether the first photodiode is reset, and a second reset signal controlling whether the second photodiode is reset. This embodiment controls the first and / or second photodiodes to perform photoelectric conversion through the mode control signal, realizing different operating modes within the same pixel unit structure to adapt to different scenario requirements.

[0040] The first output circuit 120, connected to one end of the first photodiode 111, is used to control the first photodiode to perform a reset or to transfer the accumulated photoelectric charge.

[0041] The second output circuit 130, connected to one end of the second photodiode 101, is used to control the second photodiode to perform a reset or to transfer the accumulated photoelectric charge.

[0042] In this embodiment, in addition to the first photodiode, charge transfer transistor, second photodiode, and bridge transistor, which are the main structures in the pixel unit, the pixel unit also includes other auxiliary components. Among these components, those assisting the first photodiode in performing reset and photoelectric charge transfer constitute the first output circuit, while those assisting the second photodiode in performing reset and photoelectric charge transfer constitute the second output circuit. This embodiment does not limit the specific structure of the first and second output circuits, as long as they can realize the reset and charge transfer of the photodiode; for example, if the first pixel unit is a 4T pixel unit structure and the second pixel unit is a 3T pixel unit structure, then the pixel unit provided in this embodiment is equivalent to a new pixel unit structure formed by integrating the 4T and 3T pixel units, and the 4T and 3T pixel units are connected through a bridge transistor.

[0043] The fusion sensor pixel unit provided in the above embodiments of this disclosure includes: a semiconductor substrate, a bridging transistor, a first pixel unit, and a second pixel unit; the first pixel unit and the second pixel unit are different; the first pixel unit includes a first photodiode, a charge transfer transistor, and a first output circuit; the first photodiode is connected to the first output circuit through the charge transfer transistor; the second pixel unit includes a second photodiode and a second output circuit connected to each other; the potential well depths of the first photodiode and the second photodiode are different; the bridging transistor, the first photodiode, the charge transfer transistor, and the second photodiode are disposed on the semiconductor substrate, and the bridging transistor is used to connect the first photodiode and the second photodiode. The embodiments of this disclosure control at least one of the first and second photodiodes to collect charge through a mode control signal, thus achieving the effect achievable when a single photodiode performs photoelectric conversion. Furthermore, different frame rates are achieved through different photodiodes, making the pixel unit suitable for image acquisition in motion scenes with different speeds, and providing a suitable acquisition method for light signals of different intensities; thus expanding the applicability of the pixel unit provided in this embodiment.

[0044] Figure 2 This is a schematic diagram of charge generation in a pixel unit of a fusion sensor provided in another exemplary embodiment of this disclosure. (See diagram below.) Figure 2As shown, in this embodiment, in response to the mode control signal controlling the bridge transistor 100 to disconnect, the first photodiode 111 and the second photodiode 101 respectively perform photoelectric conversion; at this time, the first photodiode 111 and the second photodiode 101 respectively collect the photoelectric charge obtained by their respective photoelectric conversion and accumulate it in the potential well. The first photodiode 111 and the second photodiode 101 are mutually complementary and independent.

[0045] The first photodiode 111 outputs the accumulated photoelectric charge through the charge transfer transistor 115 and the first output circuit 120 to obtain the first signal.

[0046] The second photodiode 101 outputs the accumulated photoelectric charge through the second output circuit 130 to obtain the second signal.

[0047] The first and second signals can be voltage signals, pulse signals, or digital signals, etc.

[0048] like Figure 2 As shown, the first potential well 211 of the first photodiode 111 and the second potential well 201 of the second photodiode 101 are located on both sides of the bridging transistor 100. When the bridging transistor 100 is turned off, the lowest channel potential of the bridging transistor 100 is about 0V. The first potential well 211 and the second potential well 201 can independently accumulate photoelectric charge (the accumulation of photoelectric charge is shown in the figure with black dots to indicate photoelectric charge). The photoelectric charge accumulated in the first potential well 211 is transferred through the first output circuit, and the photoelectric charge accumulated in the second potential well 201 is transferred through the second output circuit.

[0049] Optionally, in the pixel unit operating mode provided in this embodiment, the pixel unit may further include:

[0050] A fusion processing circuit (not shown in the figure) is connected to the first output circuit 120 and the second output circuit 130 respectively. The fusion processing circuit is used to receive the first signal output by the first output circuit 120 and the second signal output by the second output circuit 130, perform fusion processing on the first signal and the second signal, and output the first target signal.

[0051] Optionally, the fusion processing of the first signal and the second signal can be weighted addition or other similar processing; this embodiment does not limit the specific fusion processing method. Optionally, the fusion processing circuit can be set in the pixel unit, or it can be set independently, or it can be set in the peripheral circuit corresponding to the pixel unit, as long as it can perform the fusion processing of the first signal and the second signal. This embodiment achieves the beneficial effect of high dynamic range image acquisition by fusing the first signal and the second signal, and can be used in more complex scenes, such as low-light alternating scenes and high-speed motion and stillness alternating scenes. Compared with conventional pixel image sensors or pulse pixel image sensors of the prior art, the image sensor output by the pixel unit provided in this embodiment has a significant improvement in image quality.

[0052] Figure 3 This is a schematic diagram of charge generation in a pixel unit of a fusion sensor provided in yet another exemplary embodiment of this disclosure. For example... Figure 3 As shown, in this embodiment, in response to the mode control signal controlling the bridge transistor 100 to close, the first photodiode 111 and the second photodiode 101 respectively perform photoelectric conversion, and the photoelectric charge accumulated in the first photodiode 111 is transferred to the second photodiode 101 through the channel formed by the closure of the bridge transistor 100.

[0053] like Figure 3 As shown, in this embodiment, when the mode control signal controls the bridge transistor 100 to close and the charge transfer transistor 115 to open, the bridge transistor forms a channel between the first potential well 211 of the first photodiode 111 and the second potential well 201 of the second photodiode 101. The lowest potential of this channel is located at the highest potential well of the first potential well. Photoelectric charge can be transferred through this channel. Furthermore, since the depth of the first potential well 211 is less than the depth of the second potential well 201, the photoelectric charge accumulated in the first potential well 211 will flow to the second potential well 201 through the channel. That is, it is equivalent to only 3T pixel units working.

[0054] The photoelectric charge accumulated by the first photodiode 111 and the second photodiode 101 is output through the second output circuit 130 to obtain the second target signal.

[0055] In this embodiment, the second target signal is output only through the second output circuit. The second target signal is determined based on the photoelectric charge converted from the light signal collected by the first photodiode and the second photodiode. This is equivalent to increasing the light signal collection area, giving the pixel unit higher photosensitivity. It is suitable for high-speed motion scenes or strong light scenes, and improves the output image quality of the image sensor using this pixel unit.

[0056] Figure 4This is a planar schematic diagram of a portion of the structure in a pixel unit of a fusion sensor provided in yet another exemplary embodiment of this disclosure. For example... Figure 4 As shown, in this embodiment, the bridging transistor 100 is positioned near the center between the first photodiode 111 and the second photodiode 101. By positioning the bridging transistor near the center, the charge flow rate between the first and second photodiodes can be accelerated, resulting in more thorough charge transfer and improved efficiency. The charge transfer transistor 115 is positioned similarly to the bridging transistor 100, also near the center of the first photodiode. Positioning the charge transfer transistor near the center also accelerates the charge flow rate of the first photodiode, resulting in more thorough charge transfer and improved efficiency.

[0057] Figure 5 This is a schematic diagram of charge generation in a pixel unit of a fusion sensor provided in another exemplary embodiment of this disclosure. For example... Figure 5 As shown, in this embodiment, in response to the mode control signal, the bridge transistor 100 is turned off while the second photodiode 101 is reset, the charge transfer transistor 115 is turned on, and the first photodiode 111 performs photoelectric conversion; this is equivalent to only the first pixel unit (4T pixel unit) working, the second pixel unit (3T pixel unit) being in a non-working state (performing a reset), and only the signal collected by the 4T pixel unit (determined based on the first signal) is output; the first photodiode 111 outputs the accumulated photoelectric charge through the first output circuit 120 to obtain the first signal.

[0058] The bridging transistor 100 remains in the off state, with its channel minimum potential around 0V. During pixel unit exposure, the first photodiode 111 collects photoelectric charge in the first potential well 211, and the second photodiode 101, after collecting charge in the second potential well 201, is transferred to the power supply Vdd via a reset control. That is, the accumulated photoelectric charge in the second photodiode 101 is constantly cleared. This is equivalent to only the first photodiode 111 performing light signal acquisition and conversion.

[0059] The working mode provided in this embodiment is equivalent to only 4T pixel units working. At this time, the pixel units are suitable for single scenes, relatively low-speed motion scenes or scenes with weak light intensity.

[0060] Figure 6 This is a schematic diagram of the structure of a fusion sensor pixel unit provided in another exemplary embodiment of this disclosure. For example... Figure 6 As shown, the first output circuit 120 includes:

[0061] The first reset transistor 112 is connected to one end of the first photodiode 111 via a charge transfer transistor, and is used to control the first photodiode 111 to perform a reset.

[0062] The first source follower transistor 113 is used to detect and follow the change in photoelectric charge of the first photodiode 111 to determine the first signal.

[0063] The first pixel selection transistor 114 is used to determine whether to output the first signal based on the control of the first external control signal.

[0064] The drain terminal of the first source follower transistor 113 is connected to the power supply signal, and its source terminal is connected to the source terminal of the first pixel selection transistor 114. The drain terminal of the first pixel selection transistor 114 serves as the first output terminal of the pixel unit, outputting a first signal, while its gate terminal receives a first external control signal.

[0065] In this embodiment, the first output circuit 120 and the first photodiode 111 are combined to form a complete 4T pixel unit structure, and the function of each component can be understood with reference to the 4T pixel unit (conventional pixel).

[0066] The source terminal of the first reset transistor 112 is connected to one end of the first photodiode 111 through the charge transfer transistor 115, the drain terminal is connected to the power supply signal Vdd, and the gate terminal receives the first reset signal. The first photodiode is reset according to the control of the first reset signal. Optionally, when the first reset signal is high, the first reset transistor 112 is turned on, and when the charge transfer transistor 115 is turned on, the photoelectric charge accumulated in the first photodiode 111 is transferred to the power supply signal terminal until the photoelectric charge in the first photodiode 111 is cleared, that is, the first photodiode 111 is reset.

[0067] The charge transfer transistor 115 is turned off when the bridging transistor 100 is turned on and turned on when the bridging transistor 100 is turned off, and is used to transfer the photoelectric charge accumulated in the first photodiode 111 to the first source follower transistor; in this embodiment, the charge transfer transistor 115 conducts the path for the first photodiode 111 to transfer photoelectric charge outward. The source terminal of the charge transfer transistor 115 is connected to the first photodiode 111, and the drain terminal is connected to the gate terminal of the first reset transistor 112 and the first source follower transistor 113. The gate terminal receives a transmission control signal and is turned on or off according to the control of the transmission control signal. Optionally, as shown... Figure 6As shown, the active region (N+ region in the figure, corresponding to the source terminal) of the charge transfer transistor 115 is connected to the first reset transistor 112 and the first source follower transistor 113. Optionally, the charge transfer transistor 115, the first photodiode 111, the second photodiode 101, and the bridge transistor 100 are disposed on the same semiconductor substrate.

[0068] like Figure 6 As shown, the second output circuit 130 includes:

[0069] The second reset transistor 102 is connected to one end of the second photodiode 101 and is used to control the first photodiode 101 to perform a reset.

[0070] The second source follower transistor 103 is used to detect and follow the change in photoelectric charge of the second photodiode 101 to determine the second signal or the second target signal.

[0071] The second pixel selection transistor 104 is used to determine whether to output a second signal or a second target signal based on the control of a second external control signal.

[0072] In this configuration, the source terminal of the second reset transistor 102 is connected to one end of the second photodiode 101, the drain terminal is connected to the power supply signal Vdd, and the gate terminal receives the second reset signal. The second photodiode 101 is reset according to the control of the second reset signal.

[0073] The drain terminal of the second source follower transistor 103 is connected to the power supply signal Vdd, the gate terminal is connected to one end of the second photodiode 101, and the source terminal is connected to the source terminal of the second pixel selection transistor 104.

[0074] The drain terminal of the second pixel selection transistor 104 serves as the second output terminal of the pixel unit to output the second signal or the second target signal, while the gate terminal receives the second external control signal.

[0075] In this embodiment, in the corresponding Figure 5 When the pixel unit is in the working mode shown, the mode control signal controls the bridge transistor 100 to turn off and simultaneously controls the second photodiode 101 to perform a reset. At this time, the mode control signal gives the bridge transistor 100 a low-level switching control signal, gives the second reset transistor 102 a high-level second reset signal, and gives the charge transfer transistor 115 a high-level transfer control signal. At this time, only the photoelectric charge accumulated by the first photodiode is output.

[0076] In this embodiment, Figure 6 The device shown within the dashed box is a schematic diagram of its vertical cross-section. For example... Figure 6As shown, a bridging transistor 100 is contained within the dashed box (corresponding to the semiconductor substrate). The bridging transistor 100 is located between the first photodiode 111 and the second photodiode 101, and is used to connect or disconnect the channel between the first photodiode 111 and the second photodiode 101; the photocharge collection region PD2 of the first photodiode 111 (corresponding to the first potential well 211), the photocharge collection region PD1 of the second photodiode 101 (corresponding to the second potential well 201), and the active region of the charge transport transistor 115 are also shown. Figure 6 As shown, Vpix1 is the signal output terminal of the 4T pixel, which is the first output terminal of the pixel unit provided in this embodiment of the present disclosure, and is used to output a first signal determined by the accumulated photoelectric charge of the first photodiode; Vpix2 is the signal output terminal of the 3T pixel, which is the second output terminal of the pixel unit provided in this embodiment of the present disclosure, and is used to output a second signal determined by the accumulated photoelectric charge of the second photodiode, or a second target signal determined by the accumulated photoelectric charge of the first photodiode and the second photodiode.

[0077] In addition, this disclosure also provides an electronic device, including:

[0078] The processor, and the memory communicatively connected to the processor, further include the fusion sensor pixel unit described in any of the above embodiments;

[0079] The memory stores computer-executed instructions;

[0080] The processor executes computer execution instructions stored in the memory to control the fused sensor pixel unit.

[0081] The electronic devices provided in this disclosure can be included in any of the following: image data acquisition devices, audio / video players, navigation devices, entertainment devices, communication devices, roadside traffic facilities, devices in motor vehicles, industrial testing equipment, flight equipment, medical devices, security equipment, etc.

[0082] The electronic equipment provided in this disclosure can be applied to any of the following: image data acquisition equipment, audio / video player, navigation equipment, entertainment equipment, communication equipment, roadside traffic facilities, equipment in motor vehicles, industrial testing equipment, flight equipment, medical equipment, security equipment, etc.

[0083] Figure 7 This is a schematic diagram illustrating the structure of an application embodiment of the electronic device disclosed herein. Below, reference is made to… Figure 7 This describes an electronic device according to embodiments of the present disclosure. The electronic device may be either or both of a first device and a second device, or a standalone device independent of them, which may communicate with the first device and the second device to receive acquired input signals from them.

[0084] like Figure 7 As shown, the electronic device includes one or more processors and memory.

[0085] A processor can be a central processing unit (CPU) or other form of processing unit with data processing and / or instruction execution capabilities, and can control other components in an electronic device to perform desired functions.

[0086] The memory can store one or more computer program products, and the memory can include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program products can be stored on the computer-readable storage medium, and the processor can run the computer program products to implement the fusion sensor pixel units and / or other desired functions of the various embodiments of this disclosure described above.

[0087] In one example, the electronic device may also include input devices and output devices, which are interconnected via a bus system and / or other forms of connection mechanism (not shown).

[0088] In addition, the input device may also include, for example, a keyboard, a mouse, etc.

[0089] This output device can output various information to the outside, including determined distance information, direction information, etc. The output device may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0090] Of course, for the sake of simplicity, Figure 7 Only some of the components of the electronic device relevant to this disclosure are shown, omitting components such as buses, input / output interfaces, etc. In addition, the electronic device may include any other suitable components depending on the specific application.

[0091] In addition to the methods and apparatus described above, embodiments of this disclosure may also be computer program products comprising computer program instructions that, when executed by a processor, cause the processor to perform the fusion sensor pixel units according to the various embodiments of this disclosure described in the foregoing portion of this specification.

[0092] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this disclosure. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on a user's computing device, partially on a user's computing device, as a standalone software package, partially on a user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0093] Furthermore, embodiments of this disclosure may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the fusion sensor pixel units according to the various embodiments of this disclosure described in the foregoing portion of this specification.

[0094] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0095] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.

[0096] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For system embodiments, since they largely correspond to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0097] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0098] The methods and apparatus of this disclosure may be implemented in many ways. For example, they may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order of steps for the methods is for illustrative purposes only, and the steps of the methods of this disclosure are not limited to the order specifically described above unless otherwise specifically stated. Furthermore, in some embodiments, this disclosure may also be implemented as a program recorded on a recording medium, the program including machine-readable instructions for implementing the methods according to this disclosure. Thus, this disclosure also covers recording media storing programs for performing the methods according to this disclosure.

[0099] It should also be noted that in the apparatus, devices, and methods of this disclosure, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions to this disclosure.

[0100] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0101] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.

Claims

1. A fusion sensor pixel unit, characterized in that, include: Semiconductor substrate, bridging transistor, first pixel unit, and second pixel unit; The first pixel unit and the second pixel unit are different; The first pixel unit includes a first photodiode, a charge transfer transistor, and a first output circuit; The first photodiode is connected to the first output circuit via the charge transfer transistor; The second pixel unit includes a second photodiode and a second output circuit that are interconnected; the potential well of the first photodiode and the potential well of the second photodiode have different depths. The bridging transistor, the first photodiode, the charge transport transistor, and the second photodiode are disposed on the semiconductor substrate, and the bridging transistor is used to connect the first photodiode and the second photodiode.

2. The pixel unit according to claim 1, characterized in that, The drain terminal of the bridging transistor is connected to the first photodiode, the source terminal is connected to the second photodiode, and the gate terminal receives a mode control signal, which controls the transistor to turn on or off according to the mode control signal.

3. The pixel unit according to claim 2, characterized in that, Also includes: A fusion processing circuit is connected to the first output circuit and the second output circuit respectively. The fusion processing circuit is used to receive the first signal output by the first output circuit and the second signal output by the second output circuit, and output the first target signal.

4. The pixel unit according to claim 3, characterized in that, The first output circuit includes: a first reset transistor, a first source follower transistor, and a first pixel selection transistor; The source terminal of the first reset transistor is connected to one end of the first photodiode through the charge transfer transistor, the drain terminal is connected to the power supply signal, and the gate terminal receives the first reset signal. The drain terminal of the first source follower transistor is connected to the power supply signal, and the source terminal is connected to the source terminal of the first pixel selection transistor. The first pixel selection transistor outputs the first signal by using its drain terminal as the first output terminal of the pixel unit, and its gate terminal receives the first external control signal.

5. The pixel unit according to claim 4, characterized in that, The source terminal of the charge transport transistor is connected to the first photodiode, and the drain terminal is connected to the gate terminal of the first reset transistor and the first source follower transistor. The gate terminal receives a transmission control signal and is turned on or off according to the control of the transmission control signal.

6. The pixel unit according to any one of claims 3-5, characterized in that, The second output circuit includes: a second reset transistor, a second source follower transistor, and a second pixel selection transistor; The source terminal of the second reset transistor is connected to one end of the second photodiode, the drain terminal is connected to the power supply signal, and the gate terminal receives the second reset signal; The drain terminal of the second source follower transistor is connected to the power supply signal, the gate terminal is connected to one end of the second photodiode, and the source terminal is connected to the source terminal of the second pixel selection transistor. The drain terminal of the second pixel selection transistor serves as the second output terminal of the pixel unit to output the second signal or the second target signal, while the gate terminal receives the second external control signal.

7. An electronic device, characterized in that, Includes: a processor, and a memory communicatively connected to the processor, and further includes the fusion sensor pixel unit as described in any one of claims 1-6; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory to control the fused sensor pixel unit.

8. The device according to claim 7, characterized in that, The electronic device is included in any of the following: image data acquisition device, audio / video player, navigation device, entertainment device, communication device, roadside traffic facility, device in motor vehicle, industrial testing device, flight equipment, medical device, security device.