Chip test carrier and chip test equipment

Abstract

The utility model relates to a chip test carrier and chip test equipment, and relates to the technical field of semiconductors, the chip test carrier comprises a carrier plate main body and a cover plate, the carrier plate main body comprises a bottom plate and a limiting enclosing wall, the bottom plate is provided with a probe, the limiting enclosing wall is arranged on the edge of the bottom plate and surrounds the probe, and the limiting enclosing wall is arranged on the periphery of the bottom plate. The limiting enclosing wall and the bottom plate form a positioning cavity with an opening; the cover plate is detachably arranged on the limiting wall, and the cover plate is configured to block the opening and press the chip to be tested. The chip to be tested is placed in the positioning cavity of the carrier plate main body, and the opening is sealed by the cover plate, so that the direct influence of the external environment on the chip to be tested can be effectively isolated, the physical protection level of the chip is improved, the damage risk is reduced, and the chip to be tested can be better fixed by the positioning cavity and the cover plate. Therefore, the fixing and protecting effects of the to-be-tested chip in the testing process are better, a good testing effect can be achieved, and the yield of products is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically, to a chip testing carrier and a chip testing device. Background Technology

[0002] While wafer-level testing is relatively mature for advanced process chips (such as HBM chips), there are no good solutions for chip-level testing.

[0003] Taking HBM chips as an example, HBM stands for High Bandwidth Memory, a high-performance DRAM based on 3D stacking technology, designed to meet the high demands for memory bandwidth and capacity in fields such as high-performance computing, artificial intelligence, and graphics processing. HBM is a new type of memory chip technology that achieves high-speed, high-bandwidth memory access by vertically stacking multiple DRAM chips and using advanced packaging technologies such as through-silicon vias (TSVs) and microbumps.

[0004] The manufacturing process of HBM chips mainly includes: thinning and bumping the memory core wafer, and then cutting it to obtain multiple bare dies; thinning and bumping the logic wafer; stacking multiple bare dies on the logic wafer to obtain a stacked wafer; cutting the stacked wafer and debonding or peeling it to obtain multiple stacked chips under test; and packaging these stacked chips under test in tape and reel before entering the subsequent process of mass production and shipment.

[0005] In existing technologies, chips need to be tested before leaving the factory. However, the existing test carriers for chips have poor fixation and protection effects, and the external environment has a significant impact on the chips under test, making it difficult to achieve good test results. Utility Model Content

[0006] The purpose of this application is to provide a chip test carrier and a chip test device that can better fix and protect the chip under test during the test process, achieve good test results, and improve product yield.

[0007] To achieve the above objectives, the present invention provides the following solution:

[0008] In a first aspect, this utility model provides a chip testing carrier, comprising:

[0009] The carrier board body includes a base plate and a limiting wall. The base plate is provided with probes for electrical contact with the chip under test. The limiting wall is provided at the edge of the base plate and surrounds the probes. The limiting wall and the base plate form a positioning cavity with an opening. The positioning cavity is used to accommodate and position the chip under test.

[0010] A cover plate is detachably mounted on the limiting wall and is configured to block the opening and press against the chip under test.

[0011] In the above technical solutions, the chip under test (DUT) is directly exposed to the external environment and is susceptible to physical damage, contamination, and electrostatic discharge (ESD). By placing the DUT within the positioning cavity of the carrier board and sealing the opening with a cover plate, the direct influence of the external environment on the DUT can be effectively isolated, improving the chip's physical protection level, reducing the risk of damage, and enabling the positioning cavity to accommodate and position the DUT. Furthermore, the cover plate, pressed onto the DUT, provides better fixation. Therefore, the chip testing carrier provided by this invention offers better fixation and protection for the DUT during testing, achieving better testing results and improving product yield.

[0012] In an optional embodiment, the cover plate is provided with locking structures on both sides of its edges, and the locking structures are fastened to the outside of the limiting wall.

[0013] In the above technical solution, the locking structure ensures a tight connection between the cover plate and the carrier board, reducing the impact of the external environment on the chip under test due to loosening or assembly gaps. It also prevents the intrusion of contaminants such as dust and moisture, further guaranteeing the airtightness of the testing environment. Furthermore, during testing, the test carrier may be subjected to various external forces; the locking structure effectively prevents the cover plate from accidentally detaching due to vibration, impact, or other external forces, ensuring the stability and safety of the chip under test.

[0014] In an optional embodiment, the locking structure includes a retaining spring piece disposed on one side edge of the cover plate and extending at least partially from the edge of the cover plate toward the limiting wall. The outer side wall of the limiting wall is provided with a slot, and the retaining spring piece is correspondingly engaged in the slot and elastically abuts against the outer side wall of the limiting wall.

[0015] In the above technical solution, the tight connection between the cover plate and the limiting wall is achieved by using the cooperation of the retaining spring and the slot. The structure is simple and easy to assemble. The retaining spring elastically abuts against the limiting wall, which can ensure that the structure and assembly are more stable, and further ensure the tight connection between the cover plate and the carrier plate body.

[0016] In an optional embodiment, the locking structure further includes a rotating shaft and a pressing spring. Both sides of the cover plate are provided with a retaining positioning seat. The rotating shaft is rotatably mounted on the retaining positioning seat. The pressing spring and the retaining spring are integrally connected to the rotating shaft. The pressing spring is bent relative to the retaining spring and is located on the side of the cover plate away from the bottom plate. The pressing spring is configured to drive the retaining spring to rotate in the direction of disengaging from the slot when pressed.

[0017] In the above technical solution, by setting a pressing spring, during disassembly, you only need to press down on the pressing spring to unlock the holding spring, which is very convenient and makes it easy to remove the chip under test after testing.

[0018] In an optional embodiment, the clamping positioning seat has a positioning hole, the end of the rotating shaft is correspondingly fitted into the positioning hole, and the end of the rotating shaft is also provided with a torsion spring, which is configured to provide elastic force to the clamping spring to engage with the slot.

[0019] In the above technical solution, by setting a torsion spring, a spring force is provided to the retaining spring piece in its natural state to engage with the slot, ensuring that the retaining spring piece remains engaged with the slot after assembly, thus guaranteeing the fixing effect. During disassembly, simply pressing down on the spring piece and overcoming the spring force is sufficient to unlock it, which is very convenient.

[0020] In an optional embodiment, the retaining spring includes at least two spring support legs, and the outer wall of the limiting wall is provided with at least two of the retaining slots, with the spring support legs respectively inserted into the retaining slots.

[0021] In the above technical solution, by setting multiple spring clips and multiple slots, it can ensure the fixed holding effect on the one hand, and achieve alignment during assembly on the other hand, thus ensuring assembly accuracy.

[0022] In an optional embodiment, a hook is provided at one end of the spring clip that engages with the slot. The hook is bent toward the center of the cover plate. The inner wall of the slot is also provided with a corresponding recessed positioning groove, and the hook engages with the positioning groove.

[0023] In the above technical solution, by setting a hook, the positioning groove can be inserted in the horizontal direction, so the cover plate and the limiting wall can be better connected in the vertical direction, and the fixing and holding effect is better.

[0024] In an optional embodiment, a pressing block is further provided on the side of the cover plate near the base plate. The pressing block protrudes toward the base plate and abuts against the back of the chip under test.

[0025] In the above technical solution, by setting a pressing block, it can be pressed against the back of the chip under test to better press the chip under test, ensure electrical contact between the chip under test and the probe, and thus ensure accurate connection of the test circuit.

[0026] In an optional embodiment, the pressing block is used to have an elastic material layer disposed on one side surface of the chip under test.

[0027] In the above technical solution, by setting an elastic material layer, on the one hand, it can prevent the chip under test from being scratched when the cover is pressed, and on the other hand, it can play a buffering role to avoid damage to the chip under test due to excessive downward pressure.

[0028] In an optional embodiment, a temperature control plate is further provided inside the pressing block, which is used to heat or cool the chip under test.

[0029] In an optional embodiment, the carrier board body further includes a test board, which is disposed on the side of the base plate away from the limiting wall. The probe is disposed on the surface of the base plate and makes electrical contact with the chip under test, and the probe is electrically connected to the test board.

[0030] In the above technical solution, the test board is integrated as a whole, which makes it easy to bring out the electrical contacts of the probes, and thus facilitates contact testing by an external testing machine.

[0031] In an optional embodiment, the probe includes at least one of a spring-loaded needle and a microelectromechanical system (MEMS) needle.

[0032] Among them, the MEMS pin: Due to the high precision of MEMS technology, the MEMS pin can provide extremely small contact points to ensure precise alignment with the bumps and solder joints of the chip under test. This high-precision connection helps reduce testing errors and improve the quality of signal transmission.

[0033] Pogo pins are known for their unique spring structure, which allows the pins to automatically adjust their position under pressure to ensure optimal contact with the contact points. This self-adaptive capability ensures stable connections even with minute positional deviations. The spring structure of the Pogo pin not only provides excellent contact performance but also gives it outstanding durability. The spring can withstand repeated insertions, removals, and compressions without easily breaking, which is especially important for applications requiring frequent testing and replacement of the chip under test.

[0034] In an optional embodiment, the edge of the test board is further provided with probe pads, which are connected to the probes and are configured to be connected to the test machine during testing.

[0035] In the above technical solutions, high-density chips, such as HBM chips, have a microbump pitch of 73µm and a test pad pitch of approximately 165µm. These extremely small pitches place extremely high demands on the accuracy of the testing process. Due to the very small pitch, traditional test sockets face significant challenges in achieving accurate contact with the uBump or test pads. Even minute deviations or misalignments can lead to poor contact or failure. Therefore, this embodiment designs probes on the base plate to contact the microbumps or test pads of the HBM chip. The probes are also connected to probe pads, which are relatively large. This allows the tester to test the HBM chip through the probe pads, reducing the testing difficulty.

[0036] In an optional implementation, the base plate is provided with alignment marks, which are configured to align with the chip under test.

[0037] In the above technical solution, by designing alignment marks, alignment can be achieved during the loading of the chip under test, ensuring accurate alignment between the chip under test and the probe, and providing a clear reference point for the gripping robotic arm. The robotic arm can quickly identify and locate the correct position, and perform clamping, hovering, alignment and placement of the chip under test by the robotic arm, realizing the automation of the whole process, improving production efficiency and reducing the uncertainty and errors caused by manual operation.

[0038] In an optional embodiment, the limiting wall is further provided with a positioning notch, and the edge of the cover plate is provided with a positioning protrusion. The positioning protrusion is adapted to the positioning notch so that the cover plate is positioned on the limiting wall.

[0039] In the above technical solution, by designing positioning protrusions and positioning notches, a certain positioning and assembly action can be performed during the cover plate fastening process to ensure accurate alignment of the cover plate.

[0040] Secondly, this utility model provides a chip testing device, including a testing machine and a chip testing carrier as described in any of the foregoing embodiments, wherein the testing machine is connected to the carrier body and electrically connected to the probe.

[0041] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description

[0042] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 This is an overall front view of the chip testing carrier provided in the embodiments of this application;

[0044] Figure 2 For this Figure 1 Schematic diagram of the internal structure of the main body of the intermediate plate;

[0045] Figure 3 for Figure 1 Top view of the main body of the intermediate plate;

[0046] Figure 4 This is a cross-sectional view of the internal structure of the chip testing carrier provided in an embodiment of this application;

[0047] Figure 5 A cross-sectional view of the internal structure of a chip testing carrier provided for other preferred embodiments of this application;

[0048] Figure 6 This is a schematic diagram of the probe structure of the chip test carrier provided in the embodiments of this application;

[0049] Figure 7 A schematic diagram of the probe structure of a chip test carrier provided for application of other preferred embodiments;

[0050] Figure 8 This is an overall top view of the chip testing carrier provided in the embodiments of this application;

[0051] Figure 9 This is an overall bottom view of the chip testing carrier provided in the embodiments of this application;

[0052] Figure 10 This is an overall side view of the chip testing carrier provided in an embodiment of this application.

[0053] icon:

[0054] 100-Chip test carrier; 110-Carrier board body; 120-Base plate; 121-Probe; 122-Alignment mark; 130-Limiting wall; 131-Slot; 132-Positioning notch; 133-Positioning groove; 140-Cover plate; 141-Pressure block; 142-Elastic material layer; 143-Positioning protrusion; 144-Holding positioning seat; 150-Locking structure; 151-Holding spring; 152-Rotating shaft; 153-Pressing spring; 154-Torsion spring; 155-Spring support foot; 156-Hook; 160-Test board; 161-Detection pad; 170-Temperature control board; 171-Temperature sensor; 200-Chip under test. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0056] In the description of this application, it should be noted that the terms "inner" and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0057] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "setup" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0058] It should be noted that, where there is no conflict, the features in the embodiments of this application can be combined with each other.

[0059] Please see Figures 1 to 3 This utility model provides a chip testing carrier 100, which can better fix and protect the chip under test 200 during the testing process, achieve good testing results, and improve product yield.

[0060] The chip testing carrier 100 provided in this embodiment of the present invention includes a carrier body 110 and a cover plate 140. The carrier body 110 includes a base plate 120 and a limiting wall 130. The base plate 120 is provided with a probe 121 for electrical contact with the chip under test 200. The limiting wall 130 is provided at the edge of the base plate 120 and surrounds the probe 121. The limiting wall 130 and the base plate 120 form a positioning cavity with an opening, which is used to accommodate and position the chip under test 200. The cover plate 140 is detachably provided on the limiting wall 130 and is configured to block the opening and press the chip under test 200.

[0061] It should be noted that the chip under test 200, directly exposed to the external environment, is susceptible to physical damage, contamination, and electrostatic discharge (ESD). By placing the chip under test 200 within the positioning cavity of the carrier board body 110 and sealing the opening with the cover plate 140, the direct influence of the external environment on the chip under test 200 can be effectively isolated, improving the physical protection level of the chip, reducing the risk of damage, and enabling the positioning cavity to accommodate and position the chip under test 200. Furthermore, the cover plate 140, pressed onto the chip under test 200, provides better fixation. Therefore, the chip testing carrier 100 provided in this embodiment of the invention provides better fixation and protection for the chip under test 200 during testing, achieving better testing results and improving product yield.

[0062] Please see Figures 1 to 3 In some embodiments, locking structures 150 are provided on both sides of the cover plate 140, and the locking structures 150 are fastened to the outside of the limiting wall 130. Preferably, locking structures 150 are provided on both the left and right sides of the cover plate 140, and the two locking structures 150 are fastened to the left and right sides of the limiting wall 130 respectively. The locking structures 150 can ensure a tight connection between the cover plate 140 and the carrier plate body 110, reduce the impact of the external environment on the chip under test 200 due to loosening or assembly gaps, and prevent the intrusion of contaminants such as dust and moisture, further ensuring the airtightness of the test environment. Moreover, during the test, the test carrier may be affected by various external forces, and the locking structures 150 can effectively prevent the cover plate 140 from accidentally falling off due to external forces such as vibration and impact, ensuring the stability and safety of the chip under test 200.

[0063] Please see Figure 4 , Figures 8 to 10 Furthermore, the locking structure 150 includes a retaining spring 151, which is disposed on one side edge of the cover plate 140 and extends at least partially from the edge of the cover plate 140 toward the limiting wall. The outer wall of the limiting wall is provided with a slot 131, into which the retaining spring 151 is engaged and elastically abuts against the outer wall of the limiting wall. Specifically, the retaining spring 151 is a metal spring, and retaining springs 151 are provided on both the left and right edges of the cover plate 140. The tight connection between the cover plate 140 and the limiting wall 130 is achieved through the cooperation of the retaining spring 151 and the slot 131. The structure is simple and easy to assemble, and the elastic abutment of the retaining spring 151 against the limiting wall ensures greater structural and assembly stability, further guaranteeing a tight connection between the cover plate 140 and the carrier plate body.

[0064] In some embodiments, the locking structure 150 further includes a rotating shaft 152 and a pressing spring 153. Both sides of the cover plate 140 are provided with a retaining positioning seat 144. The rotating shaft 152 is rotatably mounted on the retaining positioning seat 144. The pressing spring 153 and the retaining spring 151 are integrally connected to the rotating shaft 152. The pressing spring 153 is bent relative to the retaining spring 151 and is located on the side of the cover plate 140 away from the bottom plate 120. The pressing spring 153 is configured to drive the retaining spring 151 to rotate in the direction of disengaging from the slot 131 when pressed. Specifically, the rotating shaft 152, the pressing spring 153, and the holding spring 151 are integrated, and the pressing spring 153 and the holding spring 151 are designed with an acute angle. When the pressing spring 153 is pressed down by hand, it can drive the rotating shaft 152 to rotate relative to the holding positioning seat 144, thereby driving the holding spring 151 to rotate and disengage from the slot 131, thus unlocking. Therefore, by setting the pressing spring 153, during disassembly, only pressing down the pressing spring 153 by hand is needed to unlock the holding spring 151, which is very convenient and makes it easy to remove the chip under test 200 after testing.

[0065] It should be noted that in other preferred embodiments of this utility model, the retaining spring 151 can also be fixedly disposed on the edge of the cover plate 140, and the assembly and disassembly actions can be completed by the deformation of the retaining spring 151 itself, thereby simplifying the structure and reducing costs.

[0066] In some embodiments, the clamping positioning seat 144 has a positioning hole, the end of the rotating shaft 152 is correspondingly fitted into the positioning hole, and the end of the rotating shaft 152 is also provided with a torsion spring 154, which is configured to provide elastic force to the clamping spring 151 to engage with the slot 131. Specifically, the clamping positioning seat 144 is provided with an assembly port, and a positioning hole is formed on the side wall opposite to the assembly port. Torsion springs 154 are provided at both ends of the rotating shaft 152 and are correspondingly fitted into the assembly port to achieve rotational assembly. At the same time, the torsion spring 154 is sleeved on the end of the rotating shaft 152, and one end of the torsion spring 154 is fixed to the rotating shaft 152, and the other end is fixed to the clamping positioning seat 144, so as to provide elastic force to the rotating shaft 152. This elastic force enables the clamping spring 151 to elastically abut against the limiting wall 130. By incorporating a torsion spring 154, a spring force is provided to the retaining spring 151 to engage with the slot 131 under natural conditions, ensuring that the retaining spring 151 remains engaged with the slot 131 after assembly, thus guaranteeing a secure hold. During disassembly, simply pressing down on the spring 153 and overcoming the spring force of the torsion spring 154 is sufficient to unlock the retaining spring 151, making disassembly very convenient.

[0067] In some embodiments, the retaining spring 151 includes at least two spring support legs 155, and the outer wall of the limiting enclosure 130 is provided with at least two slots 131, into which the spring support legs 155 are respectively inserted. Specifically, the spring support legs 155 extend downwards, preferably two in number, while the outer side of the limiting enclosure 130 is provided with two slots 131, into which the two spring support legs 155 are respectively inserted to achieve assembly. By providing multiple spring support legs 155 and multiple slots 131, the fixed retaining effect can be guaranteed on the one hand, and the alignment can be achieved during assembly, ensuring assembly accuracy on the other hand.

[0068] In some embodiments, the end of the spring clip 155 that engages with the slot 131 is provided with a hook 156. The hook 156 is bent toward the center of the cover plate 140, and the inner wall of the slot 131 is also provided with a corresponding recessed positioning groove 133. The hook 156 engages with the positioning groove 133. Specifically, the hook 156 is bent in the horizontal direction, while the positioning groove 133 is recessed in the horizontal direction. By providing the hook 156, it can be inserted into the positioning groove 133 in the horizontal direction. Therefore, in the vertical direction, a tight connection between the cover plate 140 and the limiting wall 130 can be better achieved, and the fixing and holding effect is better.

[0069] Please see Figure 4 In some embodiments, a pressing block 141 is also provided on the side of the cover plate 140 near the base plate 120. The pressing block 141 protrudes towards the base plate 120 and abuts against the back of the chip under test 200. Specifically, the pressing block 141 can be integrally disposed on the bottom surface of the cover plate 140, and the size of the pressing block 141 can be adapted to the size of the chip under test 200, so that the pressing block 141 can be pressed precisely against the back of the chip under test 200. By providing the pressing block 141, it can be correspondingly abutted against the back of the chip under test 200 to better press the chip under test 200, ensuring electrical contact between the chip under test 200 and the probe 121, thereby ensuring accurate connection of the test circuit.

[0070] Furthermore, the pressing block 141 is used to deposit an elastic material layer 142 on one side surface of the chip under test 200. This elastic material layer 142 may be a silicone layer. 、 Materials such as thermally conductive gel, PI layer or Teflon that can achieve elastic buffering can be used to prevent the chip under test 200 from being scratched when the cover plate 140 is pressed, and can also play a buffering role to avoid damage to the chip under test 200 due to excessive downward pressure.

[0071] In other preferred embodiments of this utility model, see [link to other embodiments]. Figure 5The pressing block 141 also includes a temperature control board 170, which is used to heat or cool the chip under test to maintain the test environment within a reasonable temperature range. Specifically, the temperature control board 170 can be a thermoelectric cooler, which can be led out to the outside via internal wires and electrically connected to an external power source. Furthermore, the thermoelectric cooler has a heating surface and a cooling surface, which can be adjusted by reversing the positive and negative terminals, allowing the temperature control board 170 to heat or cool the chip under test as needed.

[0072] Furthermore, in order to better control the temperature in the test environment (i.e., the positioning cavity), a temperature sensor 171 can be added to the inner wall of the limiting wall 130. The temperature sensor 171 is connected to the temperature control board 170 and can provide real-time feedback on the temperature information in the positioning cavity, so that the temperature control board 170 can adjust the heating and cooling power according to the actual temperature.

[0073] In particular, in the embodiment where a temperature control plate 170 is added, the pressing block 141 can be made of a thermally conductive material, such as a copper or aluminum block, to achieve better heat dissipation.

[0074] Please continue reading Figures 4 to 10 In some embodiments, the carrier board body 110 further includes a test board 160, which is disposed on the side of the base plate 120 away from the limiting wall 130. The probe 121 is disposed on the surface of the base plate 120 and makes electrical contact with the chip under test 200, and the probe 121 is electrically connected to the test board 160.

[0075] Probe 121 includes at least one of a spring-loaded pin and a microelectromechanical system (MEMS) pin. The MEMS pin, due to the high precision of MEMS technology, provides extremely small contact points, ensuring precise mating with the bumps and test solder joints of the chip under test (DUT) 200. This high-precision connection helps reduce test errors and improve signal transmission quality. The Pogo pin is known for its unique spring structure, which allows the pin to automatically adjust its position under pressure to ensure optimal contact with the contact points. This adaptive capability ensures a stable connection even with minute positional deviations. The spring structure of the Pogo pin not only provides excellent contact performance but also gives it outstanding durability. The spring can withstand multiple insertions, removals, and compressions without easily being damaged, which is particularly important for applications requiring frequent testing and replacement of the DUT 200.

[0076] Preferably, in this embodiment, probe 121 is a MEMS pin, which is disposed on the surface of the base plate 120. The chip under test 200 is electrically connected to probe 121. An electrical connection layer is also disposed around the periphery of the base plate 120. This electrical connection layer is connected to the pads on the back of the base plate 120 through conductive vias at the bottom. Figure 6 In other preferred embodiments of this invention, probe 121 is connected to an edge electrical connection layer, which is directly connected to the pads of the external test board 160 via metal leads. This utilizes metal leads instead of forming conductive holes on the base plate 120, significantly reducing costs. Figure 7 .

[0077] Please see Figure 8 and Figure 9 In some embodiments, the edge of the test board 160 is also provided with probe pads 161, which are connected to probes 121 and configured to connect to the test machine during testing. Specifically, the high-density chip can be a 3D / 2.5D chip or an HBM chip, with a microbump spacing of less than 50μm. These extremely small spacings place extremely high demands on the accuracy of the testing process. Due to the extremely small spacing, traditional test sockets face significant challenges in attempting to make accurate contact with the bumps or test pads. Even a small deviation or misalignment can lead to poor contact or failure. Therefore, this embodiment designs probes 121 on the base plate 120 to contact the microbumps or test pads of the HBM chip. The probes 121 are also connected to probe pads 161. The probe pads 161 are relatively large, allowing the test machine to test the HBM chip through the probe pads 161, thus reducing the testing difficulty.

[0078] Please see Figure 2 and Figure 3 In some embodiments, the base plate 120 is provided with alignment marks 122, which are configured to align with the chip under test 200. Specifically, the alignment marks 122 can be special markings such as crosshairs, and the chip under test 200 can also be correspondingly marked. When actually loading the chip under test 200, a robotic arm can be used to align the chip under test 200 and load it into the positioning cavity. By designing the alignment marks 122, alignment can be achieved during the loading of the chip under test 200, ensuring accurate alignment between the chip under test 200 and the probe 121. It also provides a clear reference point for the gripping robotic arm, which can quickly identify and locate the correct position. The robotic arm performs gripping, hovering, alignment, and placement of the chip under test 200, automating the entire process, improving production efficiency, and reducing the uncertainty and errors caused by manual operation.

[0079] See Figure 1 and Figure 2In some embodiments, the limiting wall 130 is further provided with a positioning notch 132, and the edge of the cover plate 140 is provided with a positioning protrusion 143. The positioning protrusion 143 is adapted to the positioning notch 132 so that the cover plate 140 is positioned on the limiting wall 130. Specifically, the limiting wall 130 is provided with positioning notches 132 on both the front and rear sides, and the cover plate 140 is provided with positioning protrusions 143 on the front and rear edges. The positioning protrusions 143 can precisely seal the positioning notch 132 to ensure the airtightness of the positioning cavity. At the same time, by designing the positioning protrusions 143 and the positioning notch 132, a certain positioning and assembly action can be performed during the fastening process of the cover plate 140, ensuring the accurate alignment of the cover plate 140.

[0080] In this embodiment of the application, the tests on the chip under test 200 include: logic chip testing, dynamic vector aging stress testing, TSV testing, high-speed performance testing, PHY I / O testing, 2.5D SIP testing, and Burn-in testing.

[0081] Among them, logic chip testing: As one of the core components of HBM KGSD, the performance of the logic chip directly affects the stability and reliability of the entire system. The test content includes functional testing, timing testing, power consumption testing, etc., to ensure that the logic chip can work normally under various operating conditions.

[0082] Dynamic Vector Aging Stress Testing: Dynamic vector aging stress testing aims to simulate the aging process of chips during long-term use to assess their lifespan and reliability. Specific testing methods include applying a specific dynamic vector to the chip and observing its performance changes under different stress conditions to predict its lifespan.

[0083] TSV Testing: TSV (Through Silicon Vias) is a key technology for HBM to achieve vertical chip stacking, and its quality directly affects the speed and stability of data transmission. Testing includes evaluating the electrical performance of the TSV, such as resistance, capacitance, and inductance, as well as the reliability of the connection between the TSV and the microbumps.

[0084] High-speed performance testing: HBM is designed to provide extremely high data transfer rates, therefore, high-speed performance testing is an important indicator for evaluating its performance. Specific testing methods include using dedicated high-speed testing equipment to test key performance indicators of HBM such as bandwidth and latency.

[0085] PHY I / O Testing: PHY I / O (Physical Layer Input / Output) is the interface between the HBM and external devices, and its performance directly affects the quality and efficiency of data transmission. Testing includes the I / O interface's speed, timing, and signal integrity to ensure the accuracy and stability of data transmission.

[0086] 2.5D SIP Testing: 2.5D SIP (System-in-Package) technology integrates multiple chips and components into a single package, forming a compact system-level solution. Comprehensive testing of all chips and components within the package is required, including functional testing, interconnect testing, and thermal testing, to ensure the performance and reliability of the entire system.

[0087] Burn-in test: Burn-in test is an accelerated aging test method designed to quickly expose potential manufacturing defects or early failure modes by simulating the long-term operation of a chip under extreme conditions.

[0088] Following the aforementioned testing process, a repair phase is typically performed, including screening and replacement, parameter adjustment, and fault analysis. Screening and replacement involves removing defective chips from the production batch and replacing them with qualified chips. Parameter adjustment involves adjusting parameters to improve chip performance for defects that can be optimized through software or firmware modifications. Fault analysis involves a detailed analysis of the failed chips to identify the root cause of the failure, enabling improvements in subsequent production processes.

[0089] This utility model embodiment also provides a chip testing device, including a testing machine and the aforementioned chip testing carrier 100. The chip testing carrier 100 includes a carrier body 110 and a cover plate 140. The carrier body 110 includes a base plate 120, a limiting wall 130, and a testing plate 160. The base plate 120 is provided with a probe 121 for electrical contact with the chip under test 200. The limiting wall 130 is provided at the edge of the base plate 120 and surrounds the probe 121. The limiting wall 130 and the base plate 120 form a positioning cavity with an opening, which is used to accommodate and position the chip under test 200. The cover plate 140 is detachably provided on the limiting wall 130, and the cover plate 140 is configured to block the opening and press the chip under test 200. The test board 160 is set on the side of the base plate 120 away from the limiting wall 130. One end of the probe 121 is exposed on the base plate 120 and makes electrical contact with the chip under test 200. The other end of the probe 121 is connected to the test board 160. The tester is connected to the test board 160 of the carrier board body 110 and is electrically connected to the probe 121.

[0090] The tester makes electrical contact with the probe pads 161 on the test board 160, thereby enabling testing through the probe pads 161.

[0091] In summary, the chip testing carrier 100 and chip testing equipment provided in this embodiment of the present invention, by placing the chip under test 200 in the positioning cavity of the carrier body 110 and sealing the opening with the cover plate 140, can effectively isolate the chip under test 200 from the direct influence of the external environment, improve the physical protection level of the chip, reduce the risk of damage, and the positioning cavity can accommodate and position the chip under test 200. Furthermore, the cover plate 140, pressed onto the chip under test 200, can better fix the chip under test 200. Therefore, the chip testing carrier 100 provided by this invention can better fix and protect the chip under test 200 during testing, achieve good testing results, and improve product yield. Moreover, the locking device ensures a tight connection between the cover plate 140 and the carrier body 110, reducing the influence of the external environment on the chip under test 200 due to loosening or assembly gaps.

[0092] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A chip testing carrier, characterized in that, include: The carrier board body (110) includes a base plate (120) and a limiting wall (130). The base plate (120) is provided with a probe (121) for electrical contact with the chip under test (200). The limiting wall (130) is disposed at the edge of the base plate (120) and surrounds the probe (121). The limiting wall (130) and the base plate (120) form a positioning cavity with an opening. The positioning cavity is used to accommodate and position the chip under test (200). A cover plate (140) is detachably disposed on the limiting wall (130) and the cover plate (140) is configured to block the opening and press against the chip under test (200).

2. The chip testing carrier according to claim 1, characterized in that, The cover plate (140) is provided with locking structures (150) on both sides of its edges, and the locking structures (150) are fastened to the outside of the limiting wall (130).

3. The chip testing carrier according to claim 2, characterized in that, The locking structure (150) includes a retaining spring (151), which is disposed on one side edge of the cover plate (140) and extends at least partially from the edge of the cover plate (140) toward the limiting wall. The outer wall of the limiting wall is provided with a slot (131), and the retaining spring (151) is correspondingly engaged in the slot (131) and elastically abuts against the outer wall of the limiting wall.

4. The chip testing carrier according to claim 3, characterized in that, The locking structure (150) further includes a rotating shaft (152) and a pressing spring (153). Both sides of the cover plate (140) are provided with a retaining positioning seat (144). The rotating shaft (152) is rotatably mounted on the retaining positioning seat (144). The pressing spring (153) and the retaining spring (151) are integrally connected to the rotating shaft (152). The pressing spring (153) is bent relative to the retaining spring (151) and is located on the side of the cover plate (140) away from the bottom plate (120). The pressing spring (153) is configured to drive the retaining spring (151) to rotate in the direction of disengaging from the slot (131) when pressed.

5. The chip testing carrier according to claim 4, characterized in that, The clamping positioning seat (144) has a positioning hole, and the end of the rotating shaft (152) is correspondingly fitted into the positioning hole. The end of the rotating shaft (152) is also provided with a torsion spring (154), which is configured to provide the clamping spring (151) with a spring force to engage with the slot (131).

6. The chip testing carrier according to claim 3, characterized in that, The retaining spring (151) includes at least two spring support feet (155), and the outer wall of the limiting wall (130) is provided with at least two of the retaining slots (131), and the spring support feet (155) are respectively inserted into the retaining slots (131).

7. The chip testing carrier according to claim 6, characterized in that, The end of the spring clip support (155) that is inserted into the slot (131) is provided with a hook (156). The hook (156) is bent toward the center of the cover plate (140). The inner wall of the slot (131) is also provided with a concave positioning groove (133). The hook (156) is inserted into the positioning groove (133).

8. The chip testing carrier according to claim 1, characterized in that, The cover plate (140) is also provided with a pressing block (141) on the side near the base plate (120). The pressing block (141) protrudes toward the base plate (120) and abuts against the back of the chip under test (200).

9. The chip testing carrier according to claim 8, characterized in that, The pressing block (141) is used to have an elastic material layer (142) disposed on one side surface of the chip under test (200).

10. The chip testing carrier according to claim 8, characterized in that, The pressing block (141) is also provided with a temperature control plate (170), which is used to heat or cool the chip under test.

11. The chip testing carrier according to claim 1, characterized in that, The carrier board body (110) also includes a test board (160), which is disposed on the side of the base plate (120) away from the limiting wall (130). The probe (121) is disposed on the surface of the base plate (120) and makes electrical contact with the chip under test (200), and the probe (121) is electrically connected to the test board (160).

12. The chip testing carrier according to claim 11, characterized in that, The probe (121) includes at least one of a spring needle and a microelectromechanical system (MEMS) needle.

13. The chip testing carrier according to claim 11, characterized in that, The edge of the test board (160) is also provided with a probe pad (161), which is connected to the probe (121) and is configured to be connected to the test machine during testing.

14. The chip testing carrier according to claim 1, characterized in that, The base plate (120) is provided with an alignment mark (122), which is configured to align with the chip under test (200).

15. The chip testing carrier according to claim 1, characterized in that, The limiting wall (130) is also provided with a positioning notch (132), and the edge of the cover plate (140) is provided with a positioning protrusion (143). The positioning protrusion (143) is adapted to the positioning notch (132) so that the cover plate (140) is positioned on the limiting wall (130).

16. A chip testing device, characterized in that, It includes a tester and a chip test carrier as described in any one of claims 1-15, the tester being connected to the carrier body (110) and electrically connected to the probe (121).

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