Voltage generator circuit

Abstract

The utility model relates to a circuit. In one embodiment, a circuit includes: a bandgap voltage generator circuit formed using only bipolar transistors, where the bandgap voltage generator circuit includes an output node at which a bandgap reference voltage is generated and a transconductance amplifier circuit in a current control feedback loop, the transconductance amplifier circuit having a differential input receiving a base current; and a compensation current sink circuit configured to sink, from the output node, a compensation current corresponding to a base current at a differential input of the transconductance amplifier.

Description

Technical Field

[0001] This disclosure generally relates to bandgap type reference voltage generator circuits, and particularly to bandgap reference voltage generator circuits formed using only bipolar transistors to address flicker noise problems and including compensation circuitry configured to compensate for bipolar base current effects. Background Technology

[0002] refer to Figure 1A and Figure 1B The diagram shows a circuit diagram for a conventional current-mode bandgap reference voltage generator circuit 10. Circuit 10 includes a current mirror circuit 12 and a bandgap core circuit 14.

[0003] The current mirror circuit 12 is formed by p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) M1, M2, and M3. The source terminals of transistors M1, M2, and M3 are coupled (preferably connected) to a power supply node Vdd. The gate terminals of transistors M1, M2, and M3 are coupled (preferably connected) to each other and biased by a voltage Vout to generate mirror currents. The drain terminal of transistor M1 outputs a first mirror current, the drain terminal of transistor M2 outputs a second mirror current, and the drain terminal of transistor M3 outputs a third mirror current. The third mirror current output from the drain terminal of transistor M3 is applied across resistor R3 to generate a bandgap reference voltage Vbg at the output node of circuit 10. Resistor R3 has a first terminal coupled (preferably connected) to the drain of transistor M3 at the output node and a second terminal coupled (preferably connected) to the ground node Gnd.

[0004] The bandgap core circuit 14 includes a differential amplifier circuit 16, such as an operational amplifier (OP-AMP), configured in a current-controlled feedback loop that generates a bias voltage Vout, which controls the mirrored current generated by transistors M1, M2, and M3. The non-inverting (+) input of the differential amplifier circuit 16 receives a voltage V+ at the drain of transistor M1, while the inverting (-) input receives a voltage V- at the drain of transistor M2. The bandgap core circuit 14 also includes PNP bipolar transistors Q1 and Q2. The collector terminals of transistors Q1 and Q2 are coupled (preferably connected) to ground node Gnd. The base terminals of transistors Q1 and Q2 are coupled (preferably connected) to each other and to ground node Gnd. Therefore, transistors Q1 and Q2 of the bandgap core circuit 14 are each connected in a diode configuration. The emitter terminal of transistor Q1 is coupled (preferably connected) to intermediate node 18. The emitter terminal of transistor Q2 is coupled (preferably connected) to the drain of transistor M2 at the inverting (-) input of differential amplifier circuit 16. Resistor R1 has a first terminal coupled (preferably connected) to intermediate node 18 and a second terminal coupled (preferably connected) to the drain of transistor M1 at the non-inverting (+) input of differential amplifier circuit 16. First resistor R2 has a first terminal coupled (preferably connected) to the drain of transistor M1 at the non-inverting (+) input of differential amplifier circuit 16 and a second terminal coupled (preferably connected) to ground node Gnd. Second resistor R2 has a first terminal coupled (preferably connected) to the emitter of transistor Q2 at the inverting (-) input of differential amplifier circuit 16 and a second terminal coupled (preferably connected) to node Gnd.

[0005] As an example, the differential amplifier circuit 16 includes a differential pair 20 of input transistors M5 and M6, coupled to a current mirror load circuit 22 formed by transistors M7 and M8. Input transistors M5 and M6 are n-channel MOSFETs. Load transistors M7 and M8 are p-channel MOSFETs. The common source terminal of transistors M5 and M6 is coupled (preferably connected) to a tail current source 20, which is connected to ground node Gnd. The gate terminal of input transistor M5 (at the non-inverting (+) input) receives the voltage V+ at the drain of transistor M1, and the gate terminal of input transistor M6 (at the inverting (-) input) receives the voltage V- at the drain of transistor M2. The drain terminal of input transistor M5 is coupled (preferably connected) to the drain and gate terminals of load transistor M7. The drain terminal of input transistor M6 is coupled (preferably connected) at the output of the amplifier to the drain terminal of load transistor M8. The gate terminals of transistors M7 and M8 are coupled (preferably connected) to each other. Transistor M7 is connected in a diode configuration. The output voltage Vout of the differential amplifier circuit 16 is generated at the common drain terminal of transistors M6 and M8 and is a function of the difference between voltages V+ and V-, and the magnitudes of the first, second, and third mirror currents at the drain terminals of transistors M1, M2, and M3 are functions of voltage Vout.

[0006] The operating principle of circuit 10 is to generate a voltage that is complementary to the absolute temperature (CTAT) and a voltage that is proportional to the absolute temperature (PTAT), and then add these voltages together according to a scaling ratio to achieve the cancellation of positive and negative temperature coefficients.

[0007] The PTAT component is generated using the base-emitter voltage (V) between two forward bias voltages with different current densities (m) applied by transistors Q1 and Q2. BE The difference is PTAT. Therefore, the voltage across resistor R1 is actually PTAT:

[0008]

[0009] The current flowing through resistor R2 is CTAT:

[0010]

[0011] The output bandgap voltage Vbg can be expressed as follows:

[0012]

[0013] Therefore, the operating point of circuit 10 can be scaled by setting the resistance of resistors R2 and R3, and the temperature coefficient can be adjusted by setting the resistance of resistors R1 and R2.

[0014] Circuit 10 has a known problem. MOSFETs M5, M6, M7, and M8 introduce flicker (1 / f) noise that can interfere with the output voltage Vbg. This is problematic when the output voltage Vbg provides a reference voltage for noise-sensitive circuits such as analog-to-digital converters (ADCs).

[0015] To address the problem of flicker noise, there are teachings in the art regarding the use of chopper technology. See, for example, U.S. Patent Application Publication No. 2010 / 0295529 and U.S. Patent No. 10,983,547 (both incorporated herein by reference). However, there are several disadvantages associated with the use of chopper technology, including the need for more complex circuitry and a stable (e.g., external) clock source to control the switching operation. Summary of the Invention

[0016] According to one aspect of this disclosure, a circuit is provided, comprising: a bandgap voltage generator circuit formed using only bipolar transistors, wherein the bandgap voltage generator circuit includes an output node thereon that generates a bandgap reference voltage and a transconductance amplifier circuit located in a current-controlled feedback loop, the transconductance amplifier circuit having a differential input that receives a base current; and a compensation current sinking circuit configured to sink a compensation current from the output node corresponding to the base current at the differential input of the transconductance amplifier.

[0017] According to embodiments of the present disclosure, the transconductance amplifier circuit includes a first bipolar transistor configured with a diode connection, a second bipolar transistor coupled to its base terminal to receive base current, and a compensation current absorption circuit includes a third bipolar transistor configured with a diode connection, the third bipolar transistor coupled to its base terminal to receive compensation current, and a fourth bipolar transistor.

[0018] According to embodiments of this disclosure, the first bipolar transistor and the third bipolar transistor are matched transistors.

[0019] According to embodiments of this disclosure, the second bipolar transistor and the fourth bipolar transistor are matched transistors.

[0020] According to embodiments of this disclosure, the transconductance amplifier circuit further includes a tail current source coupled to a second bipolar transistor; and the current sink circuit further includes an additional current source coupled to a fourth bipolar transistor; wherein the current magnitude of the tail current source is twice the current magnitude of the additional current source.

[0021] According to embodiments of this disclosure, the circuit further includes: a bandgap voltage generator circuit coupled to a virtual ground; a shift resistor coupled between the virtual ground and the circuit ground; and a voltage drop across the shift resistor equal to or substantially equal to the voltage drop across the tail current source.

[0022] According to embodiments of this disclosure, the circuit further includes a current buffer circuit configured to buffer the output current of the transconductance amplifier circuit to generate a bias current for a current-controlled feedback loop.

[0023] According to an embodiment of the present disclosure, the current buffer circuit includes: a first follower circuit having an input coupled to receive the output current of a transconductance amplifier circuit; and a second follower circuit having an input coupled to receive the output of the first follower circuit and an output configured to generate a bias current.

[0024] According to embodiments of the present disclosure, a first follower circuit includes a first follower transistor coupled to a first current source at the output of the first follower circuit, wherein a control terminal of the first follower transistor is configured to receive an output current from a transconductance amplifier circuit, and a second follower circuit includes a second follower transistor coupled to a second current source at the output of the second follower circuit, wherein a control terminal of the second follower transistor is coupled to the output of the first follower circuit.

[0025] According to embodiments of the present disclosure, a first current source is configured to provide current to a first follower transistor, and a second current source is configured to absorb current from a second follower transistor.

[0026] According to another aspect of this disclosure, a circuit is provided, comprising: a current mirror circuit including a first bipolar transistor, a second bipolar transistor, and a third bipolar transistor, wherein an output voltage is generated at an output node in response to a third mirror current output by the third bipolar transistor; and a bandgap core circuit including: a fourth bipolar transistor and a fifth bipolar transistor, respectively coupled to the first bipolar transistor and the second bipolar transistor, and configured to use the base-emitter voltage difference of the fourth bipolar transistor and the fifth bipolar transistor respectively according to the voltage difference between the base and emitter of the first bipolar transistor and the second bipolar transistor. The transistor outputs a first mirror current and a second mirror current to generate a temperature-to-absolute (CTAT) voltage and a temperature-to-absolute (PTAT) voltage; and a transconductance amplifier circuit having differential inputs coupled to the first bipolar transistor and the second bipolar transistor respectively to receive base currents, and an output coupled to apply bias currents to the base terminals of the first bipolar transistor, the second bipolar transistor, and the third bipolar transistor; and a current sink circuit configured to sink a compensation current from the output node corresponding to the base current at the differential input of the transconductance amplifier circuit.

[0027] According to embodiments of the present disclosure, the transconductance amplifier circuit includes a sixth bipolar transistor configured with a diode connection, the sixth bipolar transistor being coupled to a seventh bipolar transistor whose base terminal receives base current; and the current sink circuit includes an eighth bipolar transistor configured with a diode connection, the eighth bipolar transistor being coupled to a ninth bipolar transistor whose base terminal receives compensation current.

[0028] According to embodiments of this disclosure, the sixth bipolar transistor and the eighth bipolar transistor are matched transistors.

[0029] According to embodiments of this disclosure, the seventh bipolar transistor and the ninth bipolar transistor are matched transistors.

[0030] According to embodiments of this disclosure, the transconductance amplifier circuit further includes a tail current source coupled to a seventh bipolar transistor; and the current sink circuit further includes an additional current source coupled to a ninth bipolar transistor; wherein the current magnitude of the tail current source is twice the current magnitude of the additional current source.

[0031] According to embodiments of this disclosure, the circuit further includes: a fourth bipolar transistor and a fifth bipolar transistor coupled to a virtual ground; a shift resistor coupled between the virtual ground and the circuit ground; and a voltage drop across the shift resistor equal to or substantially equal to the voltage drop across the tail current source.

[0032] According to embodiments of the present disclosure, the transconductance amplifier circuit includes a transconductance amplifier and a current buffer, wherein the current buffer is configured to buffer the output current of the transconductance amplifier to generate a bias current applied to the base terminals of the first bipolar transistor, the second bipolar transistor, and the third bipolar transistor.

[0033] According to an embodiment of the present disclosure, the current buffer includes: a first follower circuit having an input coupled to receive the output current of a transconductance amplifier; and a second follower circuit having an input coupled to receive the output of the first follower circuit and an output configured to generate a bias current.

[0034] According to embodiments of the present disclosure, a first follower circuit includes a first follower transistor coupled to a first current source at the output of the first follower circuit, wherein a control terminal of the first follower transistor is configured to receive the output current of a transconductance amplifier, and wherein a second follower circuit includes a second follower transistor coupled to a second current source at the output of the second follower circuit, wherein a control terminal of the second follower transistor is coupled to the output of the first follower circuit.

[0035] According to embodiments of the present disclosure, a first current source is configured to provide current to a first follower transistor, and a second current source is configured to draw current from a second follower transistor. Attached Figure Description

[0036] To better understand the embodiments, reference will now be made to the accompanying drawings by way of example only, in which:

[0037] Figure 1A and Figure 1B A circuit diagram of a conventional current-mode bandgap reference voltage generator circuit is shown; and

[0038] Figure 2A and Figure 2B A circuit diagram for a flicker-free noise current-mode bandgap reference voltage generator circuit is shown. Detailed Implementation

[0039] The same features in the various figures are represented by the same figures. In particular, common structural and / or functional features among the multiple embodiments may have the same reference numerals and may be deployed with the same structure, dimensions, and material properties.

[0040] Unless otherwise stated, when referring to two elements connected together, it means that there is no direct connection between them except for the conductor, and when referring to two elements coupled together, it means that the two elements can be connected or they can be coupled via one or more other elements.

[0041] In the following description, when referring to terms that define absolute position (such as “front,” “back,” “top,” “bottom,” “left,” “right,” etc.), or terms that define relative position (such as “above,” “below,” “upper,” “lower,” etc.), or terms that define direction (such as “horizontal,” “vertical,” etc.), reference will be made to the orientation of the accompanying drawings unless otherwise stated.

[0042] Now for reference Figure 2A and Figure 2B These figures show circuit diagrams of a flicker-free noise-free current-mode bandgap reference voltage generator circuit 110. Circuit 110 includes a current mirror circuit 112, a bandgap core circuit 114, and a compensation current absorption circuit 115.

[0043] The current mirror circuit 112 is formed by PNP bipolar transistors QA, QB, and QC. The emitter terminals of transistors QA, QB, and QC are coupled (preferably connected) to the power supply node Vdd. The base terminals of transistors QA, QB, and QC are coupled (preferably connected) to each other and biased by a bias current Ibias to generate mirror currents. A first mirror current is output from the collector terminal of transistor QA, a second mirror current is output from the collector terminal of transistor QB, and a third mirror current is output from the collector terminal of transistor QC. The third mirror current output from the collector terminal of transistor QC is applied across resistor R3 to generate a bandgap reference voltage Vbg at the output node 134 of circuit 110. Resistor R3 has a first terminal coupled (preferably connected) to the collector of transistor QC at the output node 134 and a second terminal coupled (preferably connected) to the ground node Gnd.

[0044] The bandgap core circuit 114 includes a differential operational transconductance amplifier (OTA) circuit 116 configured in a current-controlled feedback loop, which generates an output current Iout that controls transistors QA, QB, and QC to generate mirror currents. The non-inverting (+) input of the differential OTA circuit 116 receives a voltage V+ at the collector of transistor QA, while the inverting (-) input receives a voltage V- at the collector of transistor QB. The bandgap core circuit 114 also includes PNP bipolar transistors Q1 and Q2. The collector terminals of transistors Q1 and Q2 are coupled (preferably connected) to a virtual ground node 150. The base terminals of transistors Q1 and Q2 are coupled (preferably connected) to each other and to the virtual ground node 150. Therefore, transistors Q1 and Q2 of the bandgap core circuit 114 are each connected in a diode configuration. The emitter terminal of transistor Q1 is coupled (preferably connected) to an intermediate node 118. The emitter terminal of transistor Q2 is coupled (preferably connected) to the collector of transistor QB at the inverting (-) input of differential OTA circuit 116. Resistor R1 has a first terminal coupled (preferably connected) to intermediate node 118 and a second terminal coupled (preferably connected) to the collector of transistor QA at the non-inverting (+) input of differential OTA circuit 116. First resistor R2 has a first terminal coupled (preferably connected) to the collector of transistor QA at the non-inverting (+) input of differential OTA circuit 116 and a second terminal coupled (preferably connected) to virtual ground node 150. Second resistor R2 has a first terminal coupled (preferably connected) to the emitter of transistor Q2 at the inverting (-) input of differential OTA circuit 116 and a second terminal coupled (preferably connected) to virtual ground node 150.

[0045] Resistor Rshift has a first terminal coupled (preferably connected) to virtual ground node 150 and a second terminal coupled (preferably connected) to circuit ground node Gnd. It should be noted that in an alternative embodiment, resistor Rshift can be omitted, and thus virtual ground node 150 and ground node Gnd will be the same node. This alternative embodiment... Figure 2A The number 152 is indicated by a dotted line connected by a double arrow.

[0046] The differential OTA circuit 116 includes a differential pair 120 of input transistors Q5 and Q6, coupled to a current mirror load circuit 122 formed by transistors Q7 and Q8. Input transistors Q5 and Q6 are NPN bipolar transistors. Load transistors Q7 and Q8 are PNP bipolar transistors. The common emitter terminal of transistors Q5 and Q6 is coupled (preferably connected) to a tail current source 124, which is connected to ground node Gnd. The base terminal of input transistor Q5 (at the non-inverting (+) input) receives the voltage V+ (and base current Ib) at the collector of transistor QA, and the base terminal of input transistor Q6 (at the inverting (-) input) receives the voltage V- (and base current Ib) at the collector of transistor QB. The collector terminal of input transistor Q5 is coupled (preferably connected) to the collector and base terminal of load transistor Q7. The collector terminal of input transistor Q6 is coupled (preferably connected) to the collector terminal of load transistor Q8 at the output of the amplifier. The base terminals of transistors Q7 and Q8 are coupled (preferably connected) to each other. Transistor Q7 is connected in a diode configuration. The output current Iout of the differential OTA circuit 116 generated at the common collector terminal of transistors Q6 and Q8 is a function of the difference between voltages V+ and V-. The stabilizing capacitor Cs has a first terminal coupled (preferably connected) to the common collector terminal of transistors Q6 and Q8, and a second terminal coupled (preferably connected) to the ground node Gnd.

[0047] An OTA amplifier 116 (and) formed from bipolar transistor devices is used. Figure 1B The differential amplifier 16 (formed by MOSFET devices) helps to solve the flicker (1 / f) noise problem. Flicker noise is also mitigated by using bipolar transistors QA, QB, and QC (with...) in the current mirror circuit 112. Figure 1A The MOSFET devices M1, M2, and M3 in the diagram are addressed. A major drawback of using bipolar transistors in the differential pair 120 for input transistors Q5 and Q6 is their base current Ib. It will be noted that the mirror current flowing through each of transistors QA, QB, and QC has three components: the PTAT current Iptat across R1, the CTAT current Ictat across R2, and the base current Ib flowing into the base of transistor pair 120. The base current Ib is undesirable and must be compensated for. The effect of this base current Ib is compensated at the output node 134, which generates the reference voltage Vbg. The compensation current sink circuit 115 operates to sink the compensation current Ib' from the third current flowing through transistor QC, where the compensation current Ib' corresponds to the base current Ib (i.e., equal to or substantially equal to the base current Ib within the limits of circuit tolerances).

[0048] The current sink circuit 115 replicates half of the differential OTA circuit 116 using a bipolar PNP transistor QD (matched to transistor Q7), an NPN transistor QE (matched to transistor Q5), and a current source 140 (corresponding to tail current source 124, but with a different current magnitude). The emitter terminal of transistor QD is coupled (preferably connected) to the power supply node Vdd. The collector and base terminals of transistor QD are coupled (preferably connected) to each other at an intermediate node 142. Transistor QD is connected in a diode configuration. The collector terminal of transistor QE is coupled (preferably connected) to the intermediate node 142. The base terminal of transistor QE is coupled (preferably connected) to the output node 134 and biased by a compensation current Ib' corresponding to the base current Ib at transistor pair 120 in amplifier 116. The emitter terminal of transistor QE is coupled (preferably connected) to the current source 140, which is connected to the ground node Gnd. Because the current absorption circuit 115 replicates only half of the differential OTA circuit 116, the current source 140 absorbs a current Is whose magnitude is half the magnitude of the current 2Is absorbed by the current source 124.

[0049] Because amplifier 116 is an OTA type, it cannot effectively drive resistive loads (i.e., it cannot draw a current of 3Ib from the base of the connection of transistors QA, QB, and QC with a current Iout) without introducing a significant offset to the amplifier input. To address this issue, the bandgap core circuit 114 also includes a current buffer circuit 130. The output current Iout is buffered by the current buffer circuit 130 to generate a bias current Ibias. The magnitudes of the first, second, and third mirror currents at the collectors of transistors QA, QB, and QC are functions of the bias current Ibias.

[0050] The current buffer circuit 130 includes a first follower circuit formed by a first transistor T1, which has a control terminal coupled (preferably connected) to receive the amplifier output current Iout, a reference terminal coupled (preferably connected) to the ground node Gnd, and a follower terminal coupled (preferably connected) to receive a first source current Isrc generated by a first current source 150 coupled to the power supply node Vdd. The current buffer circuit 130 also includes a second follower circuit formed by a second transistor T2, which has a control terminal coupled (preferably connected) to the follower terminal of transistor T1, a reference terminal coupled (preferably connected) to the power supply node Vdd, and a follower terminal coupled (preferably connected) to receive a sink current Isnk generated by a second current source 152 coupled to the ground node Gnd. A bias current Ibias is generated at the follower terminal of transistor T2.

[0051] exist Figure 2BIn the preferred embodiment shown, the current buffer circuit 130 is implemented as a source follower circuit, wherein the first transistor T1 is a p-channel MOSFET device and the second transistor T2 is an n-channel MOSFET device. The drain of transistor T1 is connected to ground, and the source of transistor T1 is connected to the first current source 150 and to the gate of transistor T2. The drain of transistor T2 is connected to the power supply node Vdd, and the source of transistor T2 is connected to the second current source 152 and provides the current Ibias. The embodiment illustrated using MOSFET devices for transistors T1 and T2 is preferred because there is no current consumption at the gate terminal. It will be noted that any flicker noise introduced by using MOSFET devices for transistors T1 and T2 is considered to have a negligible contribution to the overall noise in the output voltage Vbg.

[0052] The use of the first follower circuit and the second follower circuit in the current buffer circuit 130 allows approximately the same voltage to be maintained at the collector terminals of transistors Q7 and Q8, ensuring linear operation of transistor Q8 when generating current Iout, thereby avoiding any early differential effect.

[0053] In the implementation using resistor Rshift, the resistance of resistor Rshift is selected based on the first and second currents of the mirror (in transistors QA and QB) and the base current Ib such that the voltage drop across the resistor is equal to or substantially equal to (within the design tolerances) the voltage drop across the current source 124 in amplifier 116.

[0054] While the invention has been illustrated and described in detail in the accompanying drawings and the foregoing description, such illustrations and descriptions should be considered illustrative or exemplary rather than restrictive; the invention is not limited to the disclosed embodiments. Other variations of the disclosed embodiments will be understood and implemented by those skilled in the art in practicing the claimed invention upon studying the drawings, the disclosure, and the appended claims.

Claims

1. A voltage generator circuit, characterized in that, include: A bandgap voltage generator circuit formed using only bipolar transistors, wherein the bandgap voltage generator circuit includes an output node that generates a bandgap reference voltage thereon and a transconductance amplifier circuit located in a current-controlled feedback loop, the transconductance amplifier circuit having a differential input that receives the base current; and The compensation current absorption circuit is configured to absorb the compensation current from the output node corresponding to the base current at the differential input of the transconductance amplifier.

2. The voltage generator circuit as described in claim 1, characterized in that: The transconductance amplifier circuit includes a first bipolar transistor with a diode-connected configuration, a second bipolar transistor coupled to its base terminal to receive base current, and... The compensation current absorption circuit includes a third bipolar transistor with a diode connection configuration, which is coupled to a fourth bipolar transistor whose base terminal receives the compensation current.

3. The voltage generator circuit as described in claim 2, characterized in that, The first bipolar transistor and the third bipolar transistor are matched transistors.

4. The voltage generator circuit as described in claim 2, characterized in that, The second and fourth bipolar transistors are matching transistors.

5. The voltage generator circuit as described in claim 2, characterized in that: The transconductance amplifier circuit also includes a tail current source coupled to the second bipolar transistor; and The current absorption circuit also includes an additional current source coupled to the fourth bipolar transistor. The current value of the tail current source is twice the current value of the other current source.

6. The voltage generator circuit as described in claim 5, characterized in that, Also includes: The bandgap voltage generator circuit is coupled to virtual ground; A shift resistor, coupled between virtual ground and circuit ground; as well as The voltage drop across the shift resistor is equal to or substantially equal to the voltage drop across the tail current source.

7. The voltage generator circuit as described in claim 1, characterized in that, It also includes a current buffer circuit, which is configured to buffer the output current of the transconductance amplifier circuit to generate a bias current for the current control feedback loop.

8. The voltage generator circuit as described in claim 7, characterized in that, The current buffer circuit includes: The first follower circuit has an input terminal coupled to receive the output current of the transconductance amplifier circuit; and The second follower circuit has an input coupled to receive the output of the first follower circuit and an output configured to generate a bias current.

9. The voltage generator circuit as described in claim 8, characterized in that, The first follower circuit includes a first follower transistor coupled to a first current source at its output, wherein the control terminal of the first follower transistor is configured to receive the output current of the transconductance amplifier circuit, and the second follower circuit includes a second follower transistor coupled to a second current source at its output, wherein the control terminal of the second follower transistor is coupled to the output of the first follower circuit.

10. The voltage generator circuit as described in claim 9, characterized in that, The first current source is configured to provide current to the first follower transistor, and the second current source is configured to draw current from the second follower transistor.

11. A voltage generator circuit, characterized in that, include: A current mirror circuit includes a first bipolar transistor, a second bipolar transistor, and a third bipolar transistor, wherein an output voltage is generated at the output node in response to a third mirror current output by the third bipolar transistor; The bandgap core circuit includes: A fourth bipolar transistor and a fifth bipolar transistor are coupled to a first bipolar transistor and a second bipolar transistor, respectively, and are configured to use the difference between the base-emitter voltages of the fourth and fifth bipolar transistors to generate a temperature-complementary (CTAT) voltage and a temperature-proportional (PTAT) voltage, respectively, based on a first mirror current and a second mirror current output from the first and second bipolar transistors; and A transconductance amplifier circuit has differential input terminals coupled to a first bipolar transistor and a second bipolar transistor, respectively, to receive base current, and an output terminal coupled to apply bias current to the base terminals of the first, second, and third bipolar transistors; and The current sinking circuit is configured to sink a compensation current from the output node that corresponds to the base current at the differential input of the transconductance amplifier circuit.

12. The voltage generator circuit as described in claim 11, characterized in that: The transconductance amplifier circuit includes a sixth bipolar transistor configured with diode connections, which is coupled to a seventh bipolar transistor whose base terminal receives base current; and The current absorption circuit includes an eighth bipolar transistor configured with a diode connection, which is coupled to a ninth bipolar transistor whose base terminal receives compensation current.

13. The voltage generator circuit as described in claim 12, characterized in that, The sixth and eighth bipolar transistors are matched transistors.

14. The voltage generator circuit as described in claim 12, characterized in that, The seventh bipolar transistor and the ninth bipolar transistor are matching transistors.

15. The voltage generator circuit as described in claim 12, characterized in that: The transconductance amplifier circuit also includes a tail current source coupled to the seventh bipolar transistor; and The current absorption circuit also includes an additional current source coupled to the ninth bipolar transistor. The current value of the tail current source is twice the current value of the other current source.

16. The voltage generator circuit as described in claim 15, characterized in that, Also includes: The fourth and fifth bipolar transistors are coupled to virtual ground; A shift resistor, coupled between virtual ground and circuit ground; as well as The voltage drop across the shift resistor is equal to or substantially equal to the voltage drop across the tail current source.

17. The voltage generator circuit as described in claim 11, characterized in that, The transconductance amplifier circuit includes a transconductance amplifier and a current buffer, wherein the current buffer is configured to buffer the output current of the transconductance amplifier to generate a bias current applied to the base terminals of the first bipolar transistor, the second bipolar transistor, and the third bipolar transistor.

18. The voltage generator circuit as described in claim 17, characterized in that, The current buffer includes: The first follower circuit has an input coupled to receive the output current of the transconductance amplifier; and The second follower circuit has an input coupled to receive the output of the first follower circuit and an output configured to generate a bias current.

19. The voltage generator circuit as described in claim 18, characterized in that, The first follower circuit includes a first follower transistor coupled to a first current source at its output, wherein the control terminal of the first follower transistor is configured to receive the output current of the transconductance amplifier, and the second follower circuit includes a second follower transistor coupled to a second current source at its output, wherein the control terminal of the second follower transistor is coupled to the output of the first follower circuit.

20. The voltage generator circuit as described in claim 19, characterized in that, The first current source is configured to provide current to the first follower transistor, and the second current source is configured to draw current from the second follower transistor.

Images