LDO circuit and integrated circuit
By introducing a switching control module, a regulation module, and a filtering module into the LDO circuit, the bias voltage of the switching transistor is adjusted, which solves the voltage error problem caused by unstable power input and improves voltage accuracy and reduces interference ripple.
Patent Information
- Application Number
- CN202423183354.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2034-12-20
AI Technical Summary
The existing LDO circuit has a large output voltage error under unstable power input, which causes errors and interference ripple in the MCU's AD sampling voltage, resulting in software bugs and abnormal interrupt functions.
By combining a switching control module, an adjustment module, and a filtering module, precise current control is achieved by adjusting the bias voltage of the switching transistor, thereby reducing output voltage error.
This reduces the output voltage error of the LDO circuit, ensures voltage accuracy within 0.5%, reduces interference ripple, and improves system stability.
Smart Images

Figure CN223513493U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of integrated circuits, in particular to an LDO circuit and an integrated circuit. BACKGROUND
[0002] In the related art, the output voltage error of the existing LDO circuit is about 5%, when the product circuit encounters unstable power input and is stabilized by the LDO, and then supplies power to the MCU system network, it may cause a large error in the AD sampling voltage of the MCU, and generate a significant interference ripple, thereby causing software BUG and abnormal interrupt function. CONTENT OF THE INVENTION
[0003] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application provides an LDO circuit and an integrated circuit, which aims to reduce the output voltage error of the LDO circuit.
[0004] In a first aspect, an embodiment of the present application provides an LDO circuit, characterized in that it comprises:
[0005] a switch control module, provided with a switch tube, a power input end and a power output end, the switch tube being used to control the current flowing from the power input end to the power output end;
[0006] an adjustment module, connected with the switch control module, used to adjust the bias voltage of the switch tube;
[0007] a filter module, connected with the switch control module.
[0008] According to some embodiments of the present application, the switch tube comprises:
[0009] a first switch tube and a second switch tube;
[0010] the input end of the first switch tube and the input end of the second switch tube are both connected to the power input end, the output end of the first switch tube is connected to the power output end, the control end of the first switch tube is connected to the output end of the second switch tube, and the control end of the second switch tube is connected to the filter module.
[0011] According to some embodiments of the present application, the switch control module further comprises:
[0012] a first resistor, one end of which is connected to the power input end, and the other end of which is connected to the input end of the second switch tube.
[0013] According to some embodiments of the present application, the adjustment module comprises:
[0014] a voltage stabilizer, a second resistor and a third resistor;
[0015] a first end of the voltage stabilizer is connected to ground, a second end of the voltage stabilizer is connected to a control end of the second switch tube, one end of the second resistor is connected to the power input end, the other end of the second resistor and one end of the third resistor are both connected to a third end of the voltage stabilizer, and the other end of the third resistor is connected to the first end of the voltage stabilizer.
[0016] According to some embodiments of the present application, the adjusting module further comprises:
[0017] a first capacitor, one end of the first capacitor is connected to the first end of the voltage stabilizer, and the other end of the first capacitor is connected to the third end of the voltage stabilizer.
[0018] According to some embodiments of the present application, the adjusting module further comprises:
[0019] a fourth resistor, one end of the fourth resistor is connected to the power input end, and the other end of the fourth resistor is connected to the control end of the second switch tube.
[0020] According to some embodiments of the present application, the adjusting module further comprises:
[0021] a voltage stabilizer, a second resistor and a third resistor;
[0022] a first end of the voltage stabilizer is connected to ground, a second end of the voltage stabilizer is connected to a control end of the second switch tube, one end of the second resistor and one end of the third resistor are both connected to a third end of the voltage stabilizer, the other end of the second resistor is connected to an output end of the first switch tube, and the other end of the third resistor is connected to ground.
[0023] According to some embodiments of the present application, the filtering module comprises:
[0024] a second capacitor, one end of the second capacitor is connected to the control end of the second switch tube, and the other end of the second capacitor is connected to ground.
[0025] According to some embodiments of the present application, the filtering module further comprises:
[0026] a third capacitor, a fourth capacitor and a fifth capacitor, one end of the third capacitor is connected to an input end of the second switch tube, the other end of the third capacitor is connected to ground, one end of the fourth capacitor is connected to a control end of the first switch tube, the other end of the fourth capacitor is connected to ground, one end of the fifth capacitor is connected to an output end of the first switch tube, and the other end of the fifth capacitor is connected to ground.
[0027] Secondly, embodiments of this application provide an integrated circuit including the LDO circuit described in the first aspect.
[0028] According to the technical solution of the embodiments of this application, at least the following beneficial effects are achieved: The embodiments of this application propose an LDO circuit and integrated circuit, wherein the LDO circuit includes a switch control module, an adjustment module, and a filter module. The switch control module is provided with a switching transistor, a power input terminal, and a power output terminal. The switching transistor is used to control the current flowing from the power input terminal to the power output terminal. The adjustment module is connected to the switch control module and is used to adjust the bias voltage of the switching transistor. The filter module is connected to the switch control module. Because the embodiments of this application adjust the bias voltage of the switching transistor of the switch control module through the adjustment module, precise control of the output of the switch control module can be achieved, thereby reducing the output voltage error of the LDO circuit.
[0029] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0030] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the embodiments of this utility model are described below. It should be understood that the drawings described below are only for the convenience of clearly illustrating some embodiments of the technical solutions of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. The utility model will be further described below in conjunction with the drawings and embodiments:
[0031] Figure 1 This is a schematic diagram of the structure of an LDO circuit provided in one embodiment of this application;
[0032] Figure 2 This is a circuit diagram of an LDO circuit provided in one embodiment of this application;
[0033] Figure 3 This is a circuit diagram of an LDO circuit provided in another embodiment of this application. Detailed Implementation
[0034] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0035] In the description of this application, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0036] In the description of this utility model, "several" means one or more, "multiple" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. If "first" or "second" is used in the description, it is only for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.
[0037] In this utility model, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.
[0038] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0039] In some cases, the voltage error of existing LDO circuits is around 5%. When the product circuit encounters an unstable power input and is regulated by the LDO to supply power to the MCU system network, this may cause a large error in the MCU's AD sampling voltage and generate significant interference ripple, thereby causing software bugs and interrupt function abnormalities.
[0040] Based on the above, this application proposes an LDO circuit and integrated circuit to reduce the output voltage error of the LDO circuit.
[0041] The various embodiments of the LDO circuit of this application will be further described below with reference to the accompanying drawings.
[0042] like Figure 1 , Figure 2 and Figure 3 As shown, Figure 1 This is a schematic diagram of the structure of an LDO circuit provided in one embodiment of this application. Figure 2 This is a circuit diagram of an LDO circuit provided in one embodiment of this application. Figure 3 This is a circuit diagram of an LDO circuit provided in another embodiment of this application.
[0043] In one embodiment, the LDO circuit includes a switch control module 100, an adjustment module 200, and a filter module 300.
[0044] Understandably, the switch control module 100 is equipped with a switching transistor, a power input terminal 110, and a power output terminal 120. The switching transistor is used to control the current flowing from the power input terminal 110 to the power output terminal 120. The adjustment module 200 is connected to the switch control module 100 and is used to adjust the bias voltage of the switching transistor. The filter module 300 is connected to the switch control module 100.
[0045] It is worth noting that, since the bias voltage of the switching transistor of the switch control module 100 is adjusted by the adjustment module 200 in this embodiment, precise control of the output of the switch control module 100 can be achieved, thereby reducing the output voltage error of the LDO circuit.
[0046] In another embodiment, the switching transistors include a first switching transistor Q1 and a second switching transistor Q2.
[0047] It is understood that the input terminals of the first switch Q1 and the second switch Q2 are both connected to the power input terminal 110, the output terminal of the first switch Q1 is connected to the power output terminal 120, the control terminal of the first switch Q1 is connected to the output terminal of the second switch Q2, and the control terminal of the second switch Q2 is connected to the filter module 300.
[0048] It is understandable that since the control terminal of the first switch Q1 is connected to the output terminal of the second switch Q2, the output of the first switch Q1 can be precisely controlled by adjusting the operating state of the second switch Q2, thereby reducing the output voltage error of the LDO circuit.
[0049] It is understood that the first switch Q1 and the second switch Q2 mentioned above can be field-effect transistors (FETs) and transistors, or other switches capable of controlling on / off states. A high input level turns the switch on, and a low input level turns it off. This application does not specifically limit the structural type of the first switch Q1 and the second switch Q2. For example, when using an NPN transistor as the switch, the control terminal of the first switch Q1 and the second switch Q2 can be the base. When using a junction field-effect transistor (JFET) as the switch, the control terminal of the first switch Q1 and the second switch Q2 can be the gate. Switches have the characteristics of long lifespan, safety and reliability, no mechanical wear, fast switching speed, and small size. Switches can control the on / off state of large currents with a very small current, and have a wide range of applications.
[0050] In another embodiment, the switch control module 100 further includes a first resistor R1.
[0051] It is understandable that one end of the first resistor R1 is connected to the power input terminal 110, and the other end of the first resistor R1 is connected to the input terminal of the second switching transistor Q2.
[0052] Understandably, the current at the power input terminal 110 is limited by the first resistor R1 and then transmitted to the second switch Q2. By adjusting the operating state of the second switch Q2, precise control of the output of the first switch Q1 is achieved, ensuring that the output voltage of the first switch Q1 meets the preset accuracy requirements, such as an error of no more than 0.5%, thereby reducing the output voltage error of the LDO circuit.
[0053] In another embodiment, the adjustment module 200 includes a voltage regulator D1, a second resistor R2, and a third resistor R3.
[0054] It is understandable that, such as Figure 2 As shown, the first terminal of voltage regulator D1 is connected to ground, the second terminal of voltage regulator D1 is connected to the control terminal of the second switching transistor Q2, one end of the second resistor R2 is connected to the power input terminal 110, the other end of the second resistor R2 and one end of the third resistor R3 are both connected to the third terminal of voltage regulator D1, and the other end of the third resistor R3 is connected to the first terminal of voltage regulator D1.
[0055] Understandably, the current from the power input terminal 110, after passing through the second resistor R2 and the third resistor R3, will generate a voltage divider midpoint voltage. This midpoint voltage is then input to the inside of the voltage regulator D1 and compared with the reference point voltage inside the voltage regulator D1. Based on the comparison result, the voltage regulator D1 will adjust the bias voltage of the control terminal of the second switch Q2 in real time, thereby adjusting the operating state of the second switch Q2, achieving precise control of the output of the first switch Q1, and thus reducing the output voltage error of the LDO circuit.
[0056] It is understandable that, such as Figure 3 As shown, the first terminal of voltage regulator D1 is connected to ground, the second terminal of voltage regulator D1 is connected to the control terminal of the second switch Q2, one end of the second resistor R2 and one end of the third resistor R3 are both connected to the third terminal of voltage regulator D1, the other end of the second resistor R2 is connected to the output terminal of the first switch Q1, and the other end of the third resistor R3 is connected to ground.
[0057] Understandably, the current from the power output terminal 120, after passing through the second resistor R2 and the third resistor R3, will generate a voltage divider midpoint voltage. This midpoint voltage is then input to the inside of the voltage regulator D1 and compared with the reference point voltage inside the voltage regulator D1. Based on the comparison result, the voltage regulator D1 will adjust the bias voltage at the control terminal of the second switch Q2 in real time, thereby adjusting the operating state of the second switch Q2, achieving precise control of the output of the first switch Q1, and thus reducing the output voltage error of the LDO circuit.
[0058] In another embodiment, the adjustment module 200 further includes a first capacitor C1.
[0059] It is understandable that one end of the first capacitor C1 is connected to the first terminal of the voltage regulator D1, and the other end of the first capacitor C1 is connected to the third terminal of the voltage regulator D1.
[0060] Understandably, the first capacitor C1 is used for filtering, thereby providing a stable input signal to the Zener diode, and thus ensuring the performance and reliability of the entire LDO circuit.
[0061] It is understood that the first capacitor C1 mentioned above refers to a capacitor capable of charging and discharging. Capacitors are mainly divided into aluminum electrolytic capacitors, ceramic capacitors, and mica capacitors. Among them, aluminum electrolytic capacitors are characterized by large capacitance and positive and negative polarity, making them suitable for power supply filtering or low-frequency circuits; ceramic capacitors are characterized by small size, good heat resistance, low loss, and high insulation resistance, but small capacitance, making them suitable for high-frequency circuits; mica capacitors are characterized by low dielectric loss, high insulation resistance, and a small temperature coefficient, making them suitable for high-frequency circuits. The type of the first capacitor C1 mentioned above can be selected according to the actual situation, and no specific limitation is given here.
[0062] In another embodiment, the adjustment module further includes a fourth resistor R4.
[0063] It is understandable that one end of the fourth resistor R4 is connected to the power input terminal 110, and the other end is connected to the control terminal of the second switching transistor Q2.
[0064] Understandably, the current from the power input terminal 110, after passing through the second resistor R2 and the third resistor R3, will generate a voltage divider midpoint voltage. This midpoint voltage is then input to the inside of the voltage regulator D1 and compared with the reference point voltage inside the voltage regulator D1. Based on the comparison result, the voltage regulator D1 will adjust the bias voltage of the control terminal of the second switch Q2 through the fourth resistor R4 in real time, thereby adjusting the operating state of the second switch Q2, achieving precise control of the output of the first switch Q1, and thus reducing the output voltage error of the LDO circuit.
[0065] In another embodiment, the filtering module 300 includes a second capacitor C2.
[0066] It is understandable that one end of the second capacitor C2 is connected to the control terminal of the second switching transistor Q2, and the other end is connected to ground.
[0067] It is understandable that the second capacitor C2 can repeatedly charge and discharge, thereby filtering the output signal.
[0068] It is understood that the second capacitor C2 mentioned above refers to a capacitor capable of charging and discharging. Capacitors are mainly divided into aluminum electrolytic capacitors, ceramic capacitors, and mica capacitors. Among them, aluminum electrolytic capacitors are characterized by large capacitance and positive and negative polarity, making them suitable for power supply filtering or low-frequency circuits; ceramic capacitors are characterized by small size, good heat resistance, low loss, and high insulation resistance, but small capacitance, making them suitable for high-frequency circuits; mica capacitors are characterized by low dielectric loss, high insulation resistance, and a small temperature coefficient, making them suitable for high-frequency circuits. The type of the second capacitor C2 mentioned above can be selected according to the actual situation, and no specific limitation is given here.
[0069] In another embodiment, the filtering module 300 further includes a third capacitor C3, a fourth capacitor C4, and a fifth capacitor C5.
[0070] Understandably, one end of the third capacitor C3 is connected to the input terminal of the second switch Q2, and the other end of the third capacitor C3 is connected to ground. One end of the fourth capacitor C4 is connected to the control terminal of the first switch Q1, and the other end of the fourth capacitor C4 is connected to ground. One end of the fifth capacitor C5 is connected to the output terminal of the first switch Q1, and the other end of the fifth capacitor C5 is connected to ground.
[0071] It is understandable that the third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 can repeatedly charge and discharge to filter the output signal.
[0072] It should be noted that the filtering effect of the second capacitor C2 is significantly better than that of the fifth capacitor C5.
[0073] It is understandable that filtering the output signal through the second capacitor C2, the third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 can improve the smoothness of the output voltage and reduce ripple, thereby reducing the output voltage error of the LDO circuit.
[0074] It is understood that the third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 mentioned above refer to capacitors capable of charging and discharging. Capacitors are mainly divided into aluminum electrolytic capacitors, ceramic capacitors, and mica capacitors. Among them, aluminum electrolytic capacitors are characterized by large capacitance and positive and negative polarity, making them suitable for power supply filtering or low-frequency circuits; ceramic capacitors are characterized by small size, good heat resistance, low loss, and high insulation resistance, but small capacitance, making them suitable for high-frequency circuits; mica capacitors are characterized by low dielectric loss, high insulation resistance, and a small temperature coefficient, making them suitable for high-frequency circuits. The types of the third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 mentioned above can be selected according to the actual situation, and are not specifically limited here.
[0075] Furthermore, one embodiment of this application also provides an integrated circuit that includes the LDO circuit described in the above embodiment.
[0076] It is worth noting that since the integrated circuit of this application embodiment includes the LDO circuit of the above embodiment, the specific implementation and technical effects of the integrated circuit of this application embodiment can refer to the specific implementation and technical effects of the LDO circuit of any of the above embodiments.
[0077] The above provides a detailed description of the preferred embodiments of this application. However, this application is not limited to the above-described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.
Claims
1. An LDO circuit, characterized in that, include: The switch control module is equipped with a switch transistor, a power input terminal and a power output terminal. The switch transistor is used to control the current flowing from the power input terminal to the power output terminal. An adjustment module, which is connected to the switch control module, is used to adjust the bias voltage of the switching transistor; The filtering module is connected to the switch control module.
2. The LDO circuit according to claim 1, characterized in that, The switching transistor includes: First switching transistor and second switching transistor; The input terminals of the first and second switching transistors are both connected to the power input terminal, the output terminal of the first switching transistor is connected to the power output terminal, the control terminal of the first switching transistor is connected to the output terminal of the second switching transistor, and the control terminal of the second switching transistor is connected to the filter module.
3. An LDO circuit according to claim 2, characterized in that, The switch control module also includes: A first resistor, one end of which is connected to the power input terminal, and the other end of which is connected to the input terminal of the second switching transistor.
4. An LDO circuit according to claim 2, characterized in that, The adjustment module includes: Voltage regulator, second resistor, and third resistor; The first terminal of the voltage regulator is connected to ground, the second terminal of the voltage regulator is connected to the control terminal of the second switching transistor, one end of the second resistor is connected to the power input terminal, the other end of the second resistor and one end of the third resistor are both connected to the third terminal of the voltage regulator, and the other end of the third resistor is connected to the first terminal of the voltage regulator.
5. An LDO circuit according to claim 4, characterized in that, The adjustment module further includes: A first capacitor, one end of which is connected to the first terminal of the voltage regulator, and the other end of which is connected to the third terminal of the voltage regulator.
6. An LDO circuit according to claim 5, characterized in that, The adjustment module further includes: A fourth resistor, one end of which is connected to the power input terminal, and the other end of which is connected to the control terminal of the second switching transistor.
7. An LDO circuit according to claim 2, characterized in that, The adjustment module further includes: Voltage regulator, second resistor, and third resistor; The first terminal of the voltage regulator is connected to ground, the second terminal of the voltage regulator is connected to the control terminal of the second switching transistor, one end of the second resistor and one end of the third resistor are both connected to the third terminal of the voltage regulator, the other end of the second resistor is connected to the output terminal of the first switching transistor, and the other end of the third resistor is connected to ground.
8. An LDO circuit according to claim 2, characterized in that, The filtering module includes: The second capacitor has one end connected to the control terminal of the second switching transistor and the other end connected to ground.
9. An LDO circuit according to claim 8, characterized in that, The filtering module further includes: The third capacitor, fourth capacitor, and fifth capacitor are connected as follows: one end of the third capacitor is connected to the input terminal of the second switching transistor, and the other end of the third capacitor is connected to ground; one end of the fourth capacitor is connected to the control terminal of the first switching transistor, and the other end of the fourth capacitor is connected to ground; one end of the fifth capacitor is connected to the output terminal of the first switching transistor, and the other end of the fifth capacitor is connected to ground.
10. An integrated circuit, characterized in that, Includes the LDO circuit as described in any one of claims 1 to 9.