Control circuit based on USB3.2 Gen2X2 high-speed flash disk

Abstract

The utility model discloses a control circuit based on a USB 3.2 Gen2X2 high-speed flash disk, and relates to the technical field of electronic circuits, the control circuit based on the USB 3.2 Gen2X2 high-speed flash disk comprises a main control chip U1, a USB TYPE C chip, a USB TYPE A chip, a power supply circuit, an indicating lamp circuit and a USB TYPE C slot circuit; the main control chip U1 is electrically connected with the USB TYPE C chip, the USB TYPE A chip, the power supply circuit, the indicating lamp circuit and the USB TYPE C slot circuit; the USB TYPE C slot circuit comprises a double-row pin connector J1, the double-row pin connector J1 is provided with 12 pins in total, and a second pin, a third pin, a fourth pin, a fifth pin, a seventh pin, a ninth pin and a tenth pin of the double-row pin connector J1 are all electrically connected with the main control chip U1; and 3.3 V voltage is applied to the twelfth pin of the double-pin header connector J1. The beneficial effects of the utility model are that a function of convenient switching of double connectors can be supported so as to optimize user experience.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, and more specifically, to a control circuit based on a USB 3.2 Gen2X2 high-speed flash drive. Background Technology

[0002] OTG (On the Go) is a type of UFD (USB Flash Disk). Its main feature is that it allows different devices to exchange data directly without the need for a computer. For example, smartphones and game consoles can be used as master devices for storage without needing to be connected to a computer as slave devices. The difference in appearance is that OTG flash drives have two connectors, commonly known as "dual-headed dragons".

[0003] Traditional high-speed OTG flash drives use analog switching chips to switch channels (different channels correspond to different connectors), currently supporting the USB 3.2 Gen2 X1 protocol specification (10Gbps, or 1250MB / s). USB 3.2 Gen2 X2 (20Gbps, or 2500MB / s) uses twice the number of USB 3.2 Gen2 data interfaces, with a 24-pin USB Type-C connector, supporting double the data transfer. However, when applying USB 3.2 Gen2 X2 to OTG flash drives, the analog switching chip technology supporting 10Gbps is immature, resulting in low efficiency and significant frequency reduction losses.

[0004] Therefore, this utility model provides a control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive, which supports convenient switching between dual connectors to optimize the user experience. Utility Model Content

[0005] To overcome the shortcomings of the existing technology, this utility model provides a control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive, which can support convenient switching between dual connectors to optimize the user experience.

[0006] The technical solution adopted by this utility model to solve its technical problem is: a control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive, the improvement of which is that the control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive includes a main control chip U1, a USB TYPE C chip, a USB TYPE A chip, a power supply circuit, an indicator light circuit, and a USB TYPE C slot circuit; the main control chip U1 is electrically connected to the USB TYPE C chip, the USB TYPE A chip, the power supply circuit, the indicator light circuit, and the USB TYPE C slot circuit;

[0007] The USB Type-C slot circuit includes a dual-row pin connector J1, which has a total of 12 pins. Pins 2, 3, 4, 5, 7, 9 and 10 of the dual-row pin connector J1 are electrically connected to the main control chip U1. Pin 12 of the dual-row pin connector J1 is supplied with 3.3V voltage.

[0008] In the above structure, the power supply circuit includes a power connector circuit, a DC power supply circuit, an I / O interface power supply circuit, and a flash memory driver circuit; the power connector, DC power supply circuit, I / O interface power supply circuit, and flash memory driver circuit are all electrically connected to the main control chip.

[0009] In the above structure, the power connector circuit includes a relay J5, a protection diode D3, a rectifier diode matrix, resistors R555, R556, and R559. The relay J5 includes pins RXP1, RXN1, RXP2, RXN2, CC1, CC2, TXP1, TXN1, TXP2, TXN2, VBUS, GND, DN, and DP. All pins RXP1, RXN1, RXP2, RXN2, CC1, CC2, TXP1, TXN1, TXP2, TXN2, VBUS, DN, and DP of the relay J5 are connected to one end of the rectifier diode matrix. Pins CC1 and CC2 of the relay J5 are electrically connected to the main control chip U1. Pins DN and DP of the relay J5 are connected to the USB Type-C chip and the USB Type-C interface. Chip A is electrically connected; the positive terminal of the protection diode D3 is grounded, and the negative terminal is electrically connected to the VBUS pin of relay J5; the other end of the rectifier diode matrix is ​​grounded; one end of resistor R555 is electrically connected to one end of resistor R556 and the CC1 pin of relay J5, and the other end of resistor R555 is electrically connected to the VBUS pin of relay J5, while the other end of resistor R556 is grounded; one end of resistor R559 is electrically connected to the CC2 pin of relay J5, and the other end is grounded.

[0010] In the above structure, the DC power supply circuit includes a linear regulator U7, inductors L1 and L5, capacitors C19, C22, C30, C50, C807, resistors R21, R72, R74, and R75. The linear regulator U7 includes an IN pin, an LX pin, an EN pin, an FB pin, and a GND pin. The LX pin of the linear regulator U7 is connected to one end of inductor L1, the IN pin is connected to one end of resistor R74 and one end of capacitor C30, and the EN pin is connected to the other end of resistor R74 and resistor R75. One end of inductor L5 is connected to the FB pin, which is connected to one end of capacitor C807, one end of resistor R21, and one end of resistor R72. The GND pin is grounded. The other end of inductor L1 is connected to the other end of resistor R21, the other end of capacitor C807, one end of capacitor C19, one end of capacitor C22, and one end of inductor L5. The other end of inductor L5 is connected to one end of capacitor C50. The other ends of capacitor C30, resistor R75, resistor R72, capacitor C19, capacitor C22, and capacitor C50 are grounded.

[0011] In the above structure, the flash memory driver circuit includes a buck converter U10, inductors L6 and L10, capacitors C32, C33, C41, and C59, resistors R55, R56, and R131. The buck converter U10 includes an IN pin, an LX pin, a PG pin, an EN pin, an FB pin, and a GND pin. The IN pin of the buck converter U10 is connected to one end of capacitor C33, the LX pin is connected to one end of inductor L6, and the PG pin is connected to one end of resistor R131. The EN pin is connected to the main control chip U1; the FB pin is connected to one end of resistor R55, one end of resistor R56, and one end of capacitor C59; the GND pin is grounded; the other end of inductor L6 is connected to the other end of capacitor C59, the other end of resistor R55, the other end of capacitor C32, the other end of capacitor C41, and the main control chip U1; the other ends of capacitor C33, resistor R56, capacitor C41, and capacitor C32 are grounded; the other end of resistor R131 is connected to the main control chip U1.

[0012] In the above structure, the IO interface power supply circuit includes a linear regulator U4, an inductor L4, capacitors C18, C28, C91, C808, resistors R35 and R45. The linear regulator U4 includes an IN pin, an LX pin, an EN pin, an FB pin, and a GND pin. The IN pin of the linear regulator U4 is connected to one end of capacitor C28, the LX pin is connected to one end of inductor L4, the EN pin is connected to the main control chip UI, and the FB pin is connected to one end of capacitor C91, one end of resistor R35, one end of resistor R45, and the main control chip U1. The other end of inductor L4 is connected to one end of capacitor C808, the other end of resistor R35, one end of capacitor C18, and one end of the main control chip U1. The other ends of capacitor C18, capacitor C28, and resistor R45 are connected.

[0013] In the above structure, the indicator circuit includes LED D1, LED D4, resistor R7, and resistor R47; the positive terminal of LED D1 is connected to one end of resistor R7, and the negative terminal of LED D1 and the other end of resistor R7 are both connected to the main control chip U1; the positive terminal of LED D4 is connected to one end of resistor R47, and the negative terminal of LED D4 and the other end of resistor R47 are both connected to the main control chip U1.

[0014] In the above structure, the control circuit based on the USB3.2 Gen2 X2 high-speed flash drive also includes a clock circuit, which includes a crystal oscillator, capacitor C1, capacitor C2, and resistor R2. The crystal oscillator has four pins. The first pin of the crystal oscillator is connected to one end of capacitor C1, one end of resistor R2, and the main control chip U1. The third pin is connected to one end of capacitor C2, the other end of resistor R2, and the main control chip U1. The second pin is connected to the fourth pin, the other end of capacitor C1, and the other end of capacitor C2 and grounded.

[0015] In the above structure, the main control chip U1 is model SM2320.

[0016] The beneficial effects of this utility model are as follows: This solution supports the function of the USB Type-C connector through a USB Type-C chip, supports the function of the USB Type-A connector through a USB Type-A chip, supports the insertion and removal of the USB Type-C connector through a USB Type-C slot circuit, and monitors the insertion and removal status of the USB Type-C connector and the USB Type-C slot circuit through the main control chip U1, controlling the switching of the application functions of the USB Type-C connector and the USB Type-A connector. That is, when the USB Type-C connector is connected to the dual-pin connector J1, the main control chip U1 controls the USB 3.2 Gen2 X2 high-speed flash drive to use the USB Type-A connector function; when the USB Type-C connector is removed from the dual-pin connector J1, the main control chip U1 controls the USB 3.2 Gen2 X2 high-speed flash drive to use the USB Type-C connector function, thereby supporting the function of convenient switching between the two connectors to optimize the user experience. Attached Figure Description

[0017] Figure 1 This is a block diagram of a control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to the present invention;

[0018] Figure 2 This is a schematic diagram of the main control chip U1 of the control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0019] Figure 3 This is a schematic diagram of a USB TYPEC chip for the control circuit of a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0020] Figure 4 This is a schematic diagram of a USB TYPEA chip for the control circuit of a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0021] Figure 5 This is a schematic diagram of a USB TYPEC slot circuit based on the control circuit of a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0022] Figure 6 This is a schematic diagram of the power connector circuit of the control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0023] Figure 7 This is a schematic diagram of the DC power supply circuit for the control circuit of a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0024] Figure 8 This is a schematic diagram of the I / O interface power supply circuit of the control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0025] Figure 9 This is a schematic diagram of a flash drive circuit for a control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0026] Figure 10 This is a schematic diagram of the indicator light circuit of the control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0027] Figure 11 This is a schematic diagram of the clock circuit of the control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to this utility model;

[0028] Figure 12 A schematic diagram of the structure of a USB 3.2 Gen2 X2 high-speed flash drive is shown as an example embodiment. Figure 1 ;

[0029] Figure 13 A schematic diagram of the structure of a USB 3.2 Gen2 X2 high-speed flash drive is shown as an example embodiment. Figure 2 . Detailed Implementation

[0030] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0031] The following will clearly and completely describe the concept, specific structure, and technical effects of this utility model in conjunction with embodiments and accompanying drawings, so as to fully understand the purpose, features, and effects of this utility model. Obviously, the described embodiments are only a part of the embodiments of this utility model, not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are all within the scope of protection of this utility model. Furthermore, all connections / linkages involved in the patent do not simply refer to direct contact between components, but rather to the ability to form a better connection structure by adding or reducing connecting accessories according to specific implementation conditions. The various technical features in this utility model can be combined interactively without contradicting each other.

[0032] Reference Figures 1-5As shown, this utility model discloses a control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive. The control circuit includes a main control chip U1, a USB Type-C chip, a USB Type-A chip, a power supply circuit, an indicator light circuit, and a USB Type-C slot circuit. The main control chip U1 is electrically connected to the USB Type-C chip, USB Type-A chip, power supply circuit, indicator light circuit, and USB Type-C slot circuit. The USB Type-C slot circuit includes a dual-row pin connector J1 with 12 pins. Pins 2, 3, 4, 5, 7, 9, and 10 of the dual-row pin connector J1 are electrically connected to the main control chip U1. Pin 12 of the dual-row pin connector J1 receives a 3.3V voltage. The main control chip U1 is an SM2320.

[0033] It should be noted that, in this embodiment, the main control chip U1 is responsible for the data transmission, management, and control of the entire USB 3.2 Gen2 X2 high-speed flash drive; the USB TYPE C chip is used to support the physical connection of the USB TYPE C connector and the processing of the data transmission protocol, responsible for data interaction between the main control chip U1 and the USB device, and providing an appropriate electrical interface for data transmission; the USB TYPE A chip is designed to support the USB TYPE A connector function and is responsible for data transmission between the main control chip U1 and the USB device; the power supply circuit is responsible for providing stable voltage and current to the entire control circuit; the indicator light circuit is used to indicate the connector interface type currently used by the USB 3.2 Gen2 X2 high-speed flash drive; the USB TYPE C slot circuit mainly provides a physical connection for the USB TYPE C connector to facilitate the switching between the USB TYPE C connector function and the USB TYPE A connector function. Specifically, the USB TYPE C slot circuit is designed with a dual-row pin connector J1. When the USB TYPE C connector is plugged into the dual-row pin connector J1, the connector function of the USB 3.2 Gen2 X2 high-speed flash drive switches to USB TYPE A. When the USB Type-C connector is disconnected from the dual-pin connector J1, the connector function of the USB 3.2 Gen2 X2 high-speed flash drive switches to the USB Type-C connector function. In specific implementations of this invention, the main control chip U1 is electrically connected to the USB Type-C chip, USB Type-A chip, power circuit, indicator light circuit, and USB Type-C slot circuit. It monitors the insertion and removal status of the USB Type-C connector and the USB Type-C slot circuit, and controls the switching of application functions between the USB Type-C connector and the USB Type-A connector. Specifically, when the USB Type-C connector is connected to the dual-pin connector J1, the main control chip U1 controls the USB 3.2 Gen2 X2 high-speed flash drive to use the USB Type-A connector function; when the USB Type-C connector is disconnected from the dual-pin connector J1, the main control chip U1 controls the USB 3.2 Gen2 X2 high-speed flash drive to use the USB Type-C connector function. This supports convenient switching between the two connectors to optimize the user experience.

[0034] Reference Figures 2-9As shown, the power supply circuit includes a power connector circuit, a DC power supply circuit, an I / O interface power supply circuit, and a flash memory driver circuit; the power connector, DC power supply circuit, I / O interface power supply circuit, and flash memory driver circuit are all electrically connected to the main control chip; the power connector circuit includes a relay J5, a protection diode D3, a rectifier diode matrix, resistors R555, R556, and R559; the relay J5 includes pins RXP1, RXN1, RXP2, RXN2, CC1, CC2, TXP1, and TXN1. Pins J1, J2, J3, J4, J5, J6, J7, J8, J9, J1 ... Chip A is electrically connected; the positive terminal of the protection diode D3 is grounded, and the negative terminal is electrically connected to the VBUS pin of relay J5; the other end of the rectifier diode matrix is ​​grounded; one end of resistor R555 is electrically connected to one end of resistor R556 and the CC1 pin of relay J5, and the other end of resistor R555 is electrically connected to the VBUS pin of relay J5, while the other end of resistor R556 is grounded; one end of resistor R559 is electrically connected to the CC2 pin of relay J5, and the other end is grounded; the DC power supply circuit includes a linear regulator U7, inductors L1 and L5, capacitors C19, C22, C30, C50, C807, resistors R21, R72, R74, and R75; the linear regulator U7 includes an IN pin, an LX pin, and an EN pin. The linear regulator U7 has the following pins: LX pin connected to one end of inductor L1, IN pin connected to one end of resistor R74 and one end of capacitor C30, EN pin connected to the other end of resistor R74 and one end of resistor R75, FB pin connected to one end of capacitor C807, one end of resistor R21 and one end of resistor R72, and GND pin grounded. The other end of inductor L1 is connected to the other end of resistor R21, the other end of capacitor C807, one end of capacitor C19, one end of capacitor C22, and one end of inductor L5. The other end of inductor L5 is connected to one end of capacitor C50. The other ends of capacitor C30, resistor R75, resistor R72, capacitor C19, capacitor C22, and capacitor C50 are grounded.The flash memory driver circuit includes a buck converter U10, inductors L6 and L10, capacitors C32, C33, C41, C59, resistors R55, R56, and R131. The buck converter U10 includes an IN pin, an LX pin, a PG pin, an EN pin, an FB pin, and a GND pin. The IN pin of the buck converter U10 is connected to one end of capacitor C33, the LX pin is connected to one end of inductor L6, the PG pin is connected to one end of resistor R131, the EN pin is connected to the main control chip U1, the FB pin is connected to one end of resistor R55, one end of resistor R56, and one end of capacitor C59, and the GND pin is grounded. The other end of inductor L6 is connected to the other end of capacitor C59, the other end of resistor R55, the other end of capacitor C32, the other end of capacitor C41, and the main control chip U1. The other ends of capacitor C33, resistor R56, and capacitor C41 are connected to the other end of... One end of the resistor R131 and the other end of the capacitor C32 are grounded; the other end of the resistor R131 is connected to the main control chip U1; the IO interface power supply circuit includes a linear regulator U4, an inductor L4, capacitors C18, C28, C91, C808, resistors R35 and R45; the linear regulator U4 includes an IN pin, an LX pin, an EN pin, an FB pin, and a GND pin. The IN pin of the linear regulator U4 is connected to one end of capacitor C28, the LX pin is connected to one end of inductor L4, the EN pin is connected to the main control chip U1, and the FB pin is connected to one end of capacitor C91, one end of resistor R35, one end of resistor R45, and the main control chip U1; the other end of inductor L4 is connected to one end of capacitor C808, the other end of resistor R35, one end of capacitor C18, and one end of the main control chip U1; the other ends of capacitor C18, capacitor C28, and resistor R45 are connected.

[0035] It should be noted that, in this embodiment, the power connector circuit is the bridge between the power system and the external power interface. Its main function is to receive external power and distribute it reasonably to other circuits through relays and protection circuits. The DC power supply circuit is used to convert the voltage from the power connector into a stable DC voltage required by the control circuit. The flash memory drive circuit is mainly responsible for providing the required stable voltage to the flash memory chip and performing voltage conversion to adapt to the flash memory's operating conditions. The IO interface power supply circuit provides the required voltage to the IO interface of the main control chip U1 to ensure a stable connection to external devices (such as USB devices). In the specific implementation of this utility model, the design of the power connector circuit, DC power supply circuit, IO interface power supply circuit, and flash memory drive circuit can ensure that the power requirements of different modules inside the USB 3.2 Gen2 X2 high-speed flash drive are met, preventing voltage fluctuations or interference from affecting the normal operation of the system.

[0036] Reference Figure 10 As shown, the indicator circuit includes LED D1, LED D4, resistor R7, and resistor R47; the positive terminal of LED D1 is connected to one end of resistor R7, and the negative terminal of LED D1 and the other end of resistor R7 are both connected to the main control chip U1; the positive terminal of LED D4 is connected to one end of resistor R47, and the negative terminal of LED D4 and the other end of resistor R47 are both connected to the main control chip U1.

[0037] It should be noted that, in this embodiment, the indicator light circuit is used to indicate the connector interface type currently used by the USB 3.2 Gen2 X2 high-speed flash drive. Specifically, the main control chip U1 controls the different on / off states of LEDs D1 and D4 to indicate whether the USB 3.2 Gen2 X2 high-speed flash drive is currently using the USB TYPE C connector function or the USB TYPE A connector function.

[0038] Reference Figure 11 As shown, the control circuit based on the USB 3.2 Gen2 X2 high-speed flash drive also includes a clock circuit, which includes a crystal oscillator, capacitor C1, capacitor C2, and resistor R2. The crystal oscillator has four pins. The first pin of the crystal oscillator is connected to one end of capacitor C1, one end of resistor R2, and the main control chip U1. The third pin is connected to one end of capacitor C2, the other end of resistor R2, and the main control chip U1. The second pin is connected to the fourth pin, the other end of capacitor C1, and the other end of capacitor C2 and grounded.

[0039] It should be noted that, in this embodiment, the clock circuit is mainly used to provide a high-precision clock signal to the main control chip U1 to adapt to the high-speed data transmission of the USB 3.2 Gen2 X2 high-speed flash drive. The clock signal is generated by a crystal oscillator, which adjusts its oscillation frequency through capacitors C1 and C2 and resistor R2 to ensure timing synchronization and data transmission accuracy.

[0040] It should also be noted that, in this embodiment, the control circuit based on the USB 3.2 Gen2 X2 high-speed flash drive is applied to a USB 3.2 Gen2 X2 high-speed flash drive, as shown in the reference. Figure 12 and Figure 13As shown, the USB 3.2 Gen2 X2 high-speed flash drive includes a USB Type A connector 1, a USB Type C connector 2, a flat cable 4, an adapter assembly 3, and a cap 5. The adapter assembly 3 includes a second housing 301 and an adapter circuit board 302. The USB Type A connector 1 further includes a first circuit board 103, a USB Type A interface 101, a first housing 102, and a heat sink 104. The USB Type C connector 2 includes a third housing 202, a USB Type C interface 203, and a second circuit board 201. The first circuit board 103 and the second circuit board 201 are electrically connected via the flat cable 4. The first circuit board 103 is soldered to the adapter circuit board 302 to achieve electrical connection between them. Furthermore, the USB Type C chip is mounted on the second circuit board 201, and the USB Type A chip is mounted on the first circuit board. The main control chip U1, power supply circuit, indicator light circuit, and USB Type A chip are also included. The C slot circuit and clock circuit are located on the adapter circuit board 302. Through the design of the above circuits and chips on each circuit board, the USB 3.2 Gen2 X2 high-speed flash drive can support the function of convenient switching between dual connectors, so as to optimize the user experience.

[0041] The above is a detailed description of the preferred embodiments of the present utility model. However, the present utility model is not limited to the described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present utility model. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive, characterized in that, The control circuit based on the USB 3.2 Gen2 X2 high-speed flash drive includes a main control chip U1, a USB TYPE C chip, a USB TYPE A chip, a power supply circuit, an indicator light circuit, and a USB TYPE C slot circuit; the main control chip U1 is electrically connected to the USB TYPE C chip, the USB TYPE A chip, the power supply circuit, the indicator light circuit, and the USB TYPE C slot circuit. The USB Type-C slot circuit includes a dual-row pin connector J1, which has a total of 12 pins. Pins 2, 3, 4, 5, 7, 9 and 10 of the dual-row pin connector J1 are electrically connected to the main control chip U1. Pin 12 of the dual-row pin connector J1 is supplied with 3.3V voltage.

2. The control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to claim 1, characterized in that, The power supply circuit includes a power connector circuit, a DC power supply circuit, an I / O interface power supply circuit, and a flash memory driver circuit; the power connector, DC power supply circuit, I / O interface power supply circuit, and flash memory driver circuit are all electrically connected to the main control chip.

3. The control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to claim 2, characterized in that, The power connector circuit includes a relay J5, a protection diode D3, a rectifier diode matrix, resistors R555, R556, and R559. The relay J5 includes pins RXP1, RXN1, RXP2, RXN2, CC1, CC2, TXP1, TXN1, TXP2, TXN2, VBUS, GND, DN, and DP. All pins RXP1, RXN1, RXP2, RXN2, CC1, CC2, TXP1, TXN1, TXP2, TXN2, VBUS, DN, and DP of the relay J5 are connected to one end of the rectifier diode matrix. Pins CC1 and CC2 of the relay J5 are electrically connected to the main control chip U1. Pins DN and DP of the relay J5 are connected to the USB Type-C chip and the USB Type-C interface. Chip A is electrically connected; the positive terminal of the protection diode D3 is grounded, and the negative terminal is electrically connected to the VBUS pin of relay J5; the other end of the rectifier diode matrix is ​​grounded; one end of resistor R555 is electrically connected to one end of resistor R556 and the CC1 pin of relay J5, and the other end of resistor R555 is electrically connected to the VBUS pin of relay J5, while the other end of resistor R556 is grounded; one end of resistor R559 is electrically connected to the CC2 pin of relay J5, and the other end is grounded.

4. The control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to claim 2, characterized in that, The DC power supply circuit includes a linear regulator U7, inductors L1 and L5, capacitors C19, C22, C30, C50, C807, resistors R21, R72, R74, and R75. The linear regulator U7 includes an IN pin, an LX pin, an EN pin, an FB pin, and a GND pin. The LX pin of the linear regulator U7 is connected to one end of inductor L1, the IN pin is connected to one end of resistor R74 and one end of capacitor C30, and the EN pin is connected to the other end of resistor R74 and one end of resistor R75. The terminals are connected as follows: the FB pin is connected to one end of capacitor C807, one end of resistor R21, and one end of resistor R72; the GND pin is grounded; the other end of inductor L1 is connected to the other end of resistor R21, the other end of capacitor C807, one end of capacitor C19, one end of capacitor C22, and one end of inductor L5; the other end of inductor L5 is connected to one end of capacitor C50; the other ends of capacitor C30, resistor R75, resistor R72, capacitor C19, capacitor C22, and capacitor C50 are grounded.

5. The control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to claim 2, characterized in that, The flash memory driver circuit includes a buck converter U10, inductors L6 and L10, capacitors C32, C33, C41, and C59, resistors R55, R56, and R131. The buck converter U10 includes an IN pin, an LX pin, a PG pin, an EN pin, an FB pin, and a GND pin. The IN pin of the buck converter U10 is connected to one end of capacitor C33, the LX pin is connected to one end of inductor L6, the PG pin is connected to one end of resistor R131, and the EN pin... Connected to the main control chip U1, the FB pin is connected to one end of resistor R55, one end of resistor R56, and one end of capacitor C59, and the GND pin is grounded; the other end of inductor L6 is connected to the other end of capacitor C59, the other end of resistor R55, the other end of capacitor C32, the other end of capacitor C41, and the main control chip U1; the other end of capacitor C33, the other end of resistor R56, the other end of capacitor C41, and the other end of capacitor C32 are grounded; the other end of resistor R131 is connected to the main control chip U1.

6. The control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to claim 2, characterized in that, The IO interface power supply circuit includes a linear regulator U4, an inductor L4, capacitors C18, C28, C91, and C808, resistors R35 and R45. The linear regulator U4 includes an IN pin, an LX pin, an EN pin, an FB pin, and a GND pin. The IN pin of the linear regulator U4 is connected to one end of capacitor C28, the LX pin is connected to one end of inductor L4, the EN pin is connected to the main control chip UI, and the FB pin is connected to one end of capacitor C91, one end of resistor R35, one end of resistor R45, and the main control chip U1. The other end of inductor L4 is connected to one end of capacitor C808, the other end of resistor R35, one end of capacitor C18, and one end of the main control chip U1. The other ends of capacitor C18, capacitor C28, and resistor R45 are connected together.

7. The control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to claim 1, characterized in that, The indicator circuit includes LED D1, LED D4, resistor R7, and resistor R47; the positive terminal of LED D1 is connected to one end of resistor R7, and the negative terminal of LED D1 and the other end of resistor R7 are both connected to the main control chip U1; the positive terminal of LED D4 is connected to one end of resistor R47, and the negative terminal of LED D4 and the other end of resistor R47 are both connected to the main control chip U1.

8. The control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to claim 1, characterized in that, The control circuit based on the USB 3.2 Gen2 X2 high-speed flash drive also includes a clock circuit, which includes a crystal oscillator, capacitor C1, capacitor C2, and resistor R2. The crystal oscillator has four pins. The first pin of the crystal oscillator is connected to one end of capacitor C1, one end of resistor R2, and the main control chip U1. The third pin is connected to one end of capacitor C2, the other end of resistor R2, and the main control chip U1. The second pin is connected to the fourth pin, the other end of capacitor C1, and the other end of capacitor C2 and grounded.

9. The control circuit based on a USB 3.2 Gen2 X2 high-speed flash drive according to claim 1, characterized in that, The main control chip U1 is model SM2320.

Images